sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / clk / sunxi-ng / ccu_mult.c
blob678b6cb49f01b7b176ca84f425ee5a91d6486728
1 /*
2 * Copyright (C) 2016 Maxime Ripard
3 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 */
11 #include <linux/clk-provider.h>
13 #include "ccu_gate.h"
14 #include "ccu_mult.h"
16 struct _ccu_mult {
17 unsigned long mult, min, max;
20 static void ccu_mult_find_best(unsigned long parent, unsigned long rate,
21 struct _ccu_mult *mult)
23 int _mult;
25 _mult = rate / parent;
26 if (_mult < mult->min)
27 _mult = mult->min;
29 if (_mult > mult->max)
30 _mult = mult->max;
32 mult->mult = _mult;
35 static unsigned long ccu_mult_round_rate(struct ccu_mux_internal *mux,
36 unsigned long parent_rate,
37 unsigned long rate,
38 void *data)
40 struct ccu_mult *cm = data;
41 struct _ccu_mult _cm;
43 _cm.min = 1;
44 _cm.max = 1 << cm->mult.width;
45 ccu_mult_find_best(parent_rate, rate, &_cm);
47 return parent_rate * _cm.mult;
50 static void ccu_mult_disable(struct clk_hw *hw)
52 struct ccu_mult *cm = hw_to_ccu_mult(hw);
54 return ccu_gate_helper_disable(&cm->common, cm->enable);
57 static int ccu_mult_enable(struct clk_hw *hw)
59 struct ccu_mult *cm = hw_to_ccu_mult(hw);
61 return ccu_gate_helper_enable(&cm->common, cm->enable);
64 static int ccu_mult_is_enabled(struct clk_hw *hw)
66 struct ccu_mult *cm = hw_to_ccu_mult(hw);
68 return ccu_gate_helper_is_enabled(&cm->common, cm->enable);
71 static unsigned long ccu_mult_recalc_rate(struct clk_hw *hw,
72 unsigned long parent_rate)
74 struct ccu_mult *cm = hw_to_ccu_mult(hw);
75 unsigned long val;
76 u32 reg;
78 reg = readl(cm->common.base + cm->common.reg);
79 val = reg >> cm->mult.shift;
80 val &= (1 << cm->mult.width) - 1;
82 ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1,
83 &parent_rate);
85 return parent_rate * (val + 1);
88 static int ccu_mult_determine_rate(struct clk_hw *hw,
89 struct clk_rate_request *req)
91 struct ccu_mult *cm = hw_to_ccu_mult(hw);
93 return ccu_mux_helper_determine_rate(&cm->common, &cm->mux,
94 req, ccu_mult_round_rate, cm);
97 static int ccu_mult_set_rate(struct clk_hw *hw, unsigned long rate,
98 unsigned long parent_rate)
100 struct ccu_mult *cm = hw_to_ccu_mult(hw);
101 struct _ccu_mult _cm;
102 unsigned long flags;
103 u32 reg;
105 ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1,
106 &parent_rate);
108 _cm.min = cm->mult.min;
109 _cm.max = 1 << cm->mult.width;
110 ccu_mult_find_best(parent_rate, rate, &_cm);
112 spin_lock_irqsave(cm->common.lock, flags);
114 reg = readl(cm->common.base + cm->common.reg);
115 reg &= ~GENMASK(cm->mult.width + cm->mult.shift - 1, cm->mult.shift);
117 writel(reg | ((_cm.mult - 1) << cm->mult.shift),
118 cm->common.base + cm->common.reg);
120 spin_unlock_irqrestore(cm->common.lock, flags);
122 return 0;
125 static u8 ccu_mult_get_parent(struct clk_hw *hw)
127 struct ccu_mult *cm = hw_to_ccu_mult(hw);
129 return ccu_mux_helper_get_parent(&cm->common, &cm->mux);
132 static int ccu_mult_set_parent(struct clk_hw *hw, u8 index)
134 struct ccu_mult *cm = hw_to_ccu_mult(hw);
136 return ccu_mux_helper_set_parent(&cm->common, &cm->mux, index);
139 const struct clk_ops ccu_mult_ops = {
140 .disable = ccu_mult_disable,
141 .enable = ccu_mult_enable,
142 .is_enabled = ccu_mult_is_enabled,
144 .get_parent = ccu_mult_get_parent,
145 .set_parent = ccu_mult_set_parent,
147 .determine_rate = ccu_mult_determine_rate,
148 .recalc_rate = ccu_mult_recalc_rate,
149 .set_rate = ccu_mult_set_rate,