sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / clk / sunxi-ng / ccu_nk.c
blobeaf0fdf78d2ba278299c8eb93c4b40eb20ce4201
1 /*
2 * Copyright (C) 2016 Maxime Ripard
3 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 */
11 #include <linux/clk-provider.h>
13 #include "ccu_gate.h"
14 #include "ccu_nk.h"
16 struct _ccu_nk {
17 unsigned long n, min_n, max_n;
18 unsigned long k, min_k, max_k;
21 static void ccu_nk_find_best(unsigned long parent, unsigned long rate,
22 struct _ccu_nk *nk)
24 unsigned long best_rate = 0;
25 unsigned int best_k = 0, best_n = 0;
26 unsigned int _k, _n;
28 for (_k = nk->min_k; _k <= nk->max_k; _k++) {
29 for (_n = nk->min_n; _n <= nk->max_n; _n++) {
30 unsigned long tmp_rate = parent * _n * _k;
32 if (tmp_rate > rate)
33 continue;
35 if ((rate - tmp_rate) < (rate - best_rate)) {
36 best_rate = tmp_rate;
37 best_k = _k;
38 best_n = _n;
43 nk->k = best_k;
44 nk->n = best_n;
47 static void ccu_nk_disable(struct clk_hw *hw)
49 struct ccu_nk *nk = hw_to_ccu_nk(hw);
51 return ccu_gate_helper_disable(&nk->common, nk->enable);
54 static int ccu_nk_enable(struct clk_hw *hw)
56 struct ccu_nk *nk = hw_to_ccu_nk(hw);
58 return ccu_gate_helper_enable(&nk->common, nk->enable);
61 static int ccu_nk_is_enabled(struct clk_hw *hw)
63 struct ccu_nk *nk = hw_to_ccu_nk(hw);
65 return ccu_gate_helper_is_enabled(&nk->common, nk->enable);
68 static unsigned long ccu_nk_recalc_rate(struct clk_hw *hw,
69 unsigned long parent_rate)
71 struct ccu_nk *nk = hw_to_ccu_nk(hw);
72 unsigned long rate, n, k;
73 u32 reg;
75 reg = readl(nk->common.base + nk->common.reg);
77 n = reg >> nk->n.shift;
78 n &= (1 << nk->n.width) - 1;
80 k = reg >> nk->k.shift;
81 k &= (1 << nk->k.width) - 1;
83 rate = parent_rate * (n + 1) * (k + 1);
85 if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
86 rate /= nk->fixed_post_div;
88 return rate;
91 static long ccu_nk_round_rate(struct clk_hw *hw, unsigned long rate,
92 unsigned long *parent_rate)
94 struct ccu_nk *nk = hw_to_ccu_nk(hw);
95 struct _ccu_nk _nk;
97 if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
98 rate *= nk->fixed_post_div;
100 _nk.min_n = nk->n.min;
101 _nk.max_n = 1 << nk->n.width;
102 _nk.min_k = nk->k.min;
103 _nk.max_k = 1 << nk->k.width;
105 ccu_nk_find_best(*parent_rate, rate, &_nk);
106 rate = *parent_rate * _nk.n * _nk.k;
108 if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
109 rate = rate / nk->fixed_post_div;
111 return rate;
114 static int ccu_nk_set_rate(struct clk_hw *hw, unsigned long rate,
115 unsigned long parent_rate)
117 struct ccu_nk *nk = hw_to_ccu_nk(hw);
118 unsigned long flags;
119 struct _ccu_nk _nk;
120 u32 reg;
122 if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
123 rate = rate * nk->fixed_post_div;
125 _nk.min_n = nk->n.min;
126 _nk.max_n = 1 << nk->n.width;
127 _nk.min_k = nk->k.min;
128 _nk.max_k = 1 << nk->k.width;
130 ccu_nk_find_best(parent_rate, rate, &_nk);
132 spin_lock_irqsave(nk->common.lock, flags);
134 reg = readl(nk->common.base + nk->common.reg);
135 reg &= ~GENMASK(nk->n.width + nk->n.shift - 1, nk->n.shift);
136 reg &= ~GENMASK(nk->k.width + nk->k.shift - 1, nk->k.shift);
138 writel(reg | ((_nk.k - 1) << nk->k.shift) | ((_nk.n - 1) << nk->n.shift),
139 nk->common.base + nk->common.reg);
141 spin_unlock_irqrestore(nk->common.lock, flags);
143 ccu_helper_wait_for_lock(&nk->common, nk->lock);
145 return 0;
148 const struct clk_ops ccu_nk_ops = {
149 .disable = ccu_nk_disable,
150 .enable = ccu_nk_enable,
151 .is_enabled = ccu_nk_is_enabled,
153 .recalc_rate = ccu_nk_recalc_rate,
154 .round_rate = ccu_nk_round_rate,
155 .set_rate = ccu_nk_set_rate,