sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / clk / sunxi-ng / ccu_phase.h
blob75a091a4c5658d198d130f2c30a8ab2d8c25810b
1 /*
2 * Copyright (c) 2016 Maxime Ripard. All rights reserved.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #ifndef _CCU_PHASE_H_
15 #define _CCU_PHASE_H_
17 #include <linux/clk-provider.h>
19 #include "ccu_common.h"
21 struct ccu_phase {
22 u8 shift;
23 u8 width;
25 struct ccu_common common;
28 #define SUNXI_CCU_PHASE(_struct, _name, _parent, _reg, _shift, _width, _flags) \
29 struct ccu_phase _struct = { \
30 .shift = _shift, \
31 .width = _width, \
32 .common = { \
33 .reg = _reg, \
34 .hw.init = CLK_HW_INIT(_name, \
35 _parent, \
36 &ccu_phase_ops, \
37 _flags), \
38 } \
41 static inline struct ccu_phase *hw_to_ccu_phase(struct clk_hw *hw)
43 struct ccu_common *common = hw_to_ccu_common(hw);
45 return container_of(common, struct ccu_phase, common);
48 extern const struct clk_ops ccu_phase_ops;
50 #endif /* _CCU_PHASE_H_ */