sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / clk / versatile / clk-versatile.c
bloba89a927567e0cfae45df95b8aed7cc2218509fc3
1 /*
2 * Clock driver for the ARM Integrator/AP, Integrator/CP, Versatile AB and
3 * Versatile PB boards.
4 * Copyright (C) 2012 Linus Walleij
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/clk-provider.h>
11 #include <linux/err.h>
12 #include <linux/of.h>
13 #include <linux/of_address.h>
15 #include "clk-icst.h"
17 #define INTEGRATOR_HDR_LOCK_OFFSET 0x14
19 #define VERSATILE_SYS_OSCCLCD_OFFSET 0x1c
20 #define VERSATILE_SYS_LOCK_OFFSET 0x20
22 /* Base offset for the core module */
23 static void __iomem *cm_base;
25 static const struct icst_params cp_auxosc_params = {
26 .vco_max = ICST525_VCO_MAX_5V,
27 .vco_min = ICST525_VCO_MIN,
28 .vd_min = 8,
29 .vd_max = 263,
30 .rd_min = 3,
31 .rd_max = 65,
32 .s2div = icst525_s2div,
33 .idx2s = icst525_idx2s,
36 static const struct clk_icst_desc cm_auxosc_desc __initconst = {
37 .params = &cp_auxosc_params,
38 .vco_offset = 0x1c,
39 .lock_offset = INTEGRATOR_HDR_LOCK_OFFSET,
42 static const struct icst_params versatile_auxosc_params = {
43 .vco_max = ICST307_VCO_MAX,
44 .vco_min = ICST307_VCO_MIN,
45 .vd_min = 4 + 8,
46 .vd_max = 511 + 8,
47 .rd_min = 1 + 2,
48 .rd_max = 127 + 2,
49 .s2div = icst307_s2div,
50 .idx2s = icst307_idx2s,
53 static const struct clk_icst_desc versatile_auxosc_desc __initconst = {
54 .params = &versatile_auxosc_params,
55 .vco_offset = VERSATILE_SYS_OSCCLCD_OFFSET,
56 .lock_offset = VERSATILE_SYS_LOCK_OFFSET,
58 static void __init cm_osc_setup(struct device_node *np,
59 const struct clk_icst_desc *desc)
61 struct clk *clk = ERR_PTR(-EINVAL);
62 const char *clk_name = np->name;
63 const char *parent_name;
65 if (!cm_base) {
66 /* Remap the core module base if not done yet */
67 struct device_node *parent;
69 parent = of_get_parent(np);
70 if (!parent) {
71 pr_err("no parent on core module clock\n");
72 return;
74 cm_base = of_iomap(parent, 0);
75 if (!cm_base) {
76 pr_err("could not remap core module base\n");
77 return;
81 parent_name = of_clk_get_parent_name(np, 0);
82 clk = icst_clk_register(NULL, desc, clk_name, parent_name, cm_base);
83 if (!IS_ERR(clk))
84 of_clk_add_provider(np, of_clk_src_simple_get, clk);
87 static void __init of_integrator_cm_osc_setup(struct device_node *np)
89 cm_osc_setup(np, &cm_auxosc_desc);
91 CLK_OF_DECLARE(integrator_cm_auxosc_clk,
92 "arm,integrator-cm-auxosc", of_integrator_cm_osc_setup);
94 static void __init of_versatile_cm_osc_setup(struct device_node *np)
96 cm_osc_setup(np, &versatile_auxosc_desc);
98 CLK_OF_DECLARE(versatile_cm_auxosc_clk,
99 "arm,versatile-cm-auxosc", of_versatile_cm_osc_setup);