sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / crypto / qce / common.h
bloba4addd4f7d6cfac37236eccb387f798e6b80d604
1 /*
2 * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #ifndef _COMMON_H_
15 #define _COMMON_H_
17 #include <linux/crypto.h>
18 #include <linux/types.h>
19 #include <crypto/aes.h>
20 #include <crypto/hash.h>
22 /* key size in bytes */
23 #define QCE_SHA_HMAC_KEY_SIZE 64
24 #define QCE_MAX_CIPHER_KEY_SIZE AES_KEYSIZE_256
26 /* IV length in bytes */
27 #define QCE_AES_IV_LENGTH AES_BLOCK_SIZE
28 /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
29 #define QCE_MAX_IV_SIZE AES_BLOCK_SIZE
31 /* maximum nonce bytes */
32 #define QCE_MAX_NONCE 16
33 #define QCE_MAX_NONCE_WORDS (QCE_MAX_NONCE / sizeof(u32))
35 /* burst size alignment requirement */
36 #define QCE_MAX_ALIGN_SIZE 64
38 /* cipher algorithms */
39 #define QCE_ALG_DES BIT(0)
40 #define QCE_ALG_3DES BIT(1)
41 #define QCE_ALG_AES BIT(2)
43 /* hash and hmac algorithms */
44 #define QCE_HASH_SHA1 BIT(3)
45 #define QCE_HASH_SHA256 BIT(4)
46 #define QCE_HASH_SHA1_HMAC BIT(5)
47 #define QCE_HASH_SHA256_HMAC BIT(6)
48 #define QCE_HASH_AES_CMAC BIT(7)
50 /* cipher modes */
51 #define QCE_MODE_CBC BIT(8)
52 #define QCE_MODE_ECB BIT(9)
53 #define QCE_MODE_CTR BIT(10)
54 #define QCE_MODE_XTS BIT(11)
55 #define QCE_MODE_CCM BIT(12)
56 #define QCE_MODE_MASK GENMASK(12, 8)
58 /* cipher encryption/decryption operations */
59 #define QCE_ENCRYPT BIT(13)
60 #define QCE_DECRYPT BIT(14)
62 #define IS_DES(flags) (flags & QCE_ALG_DES)
63 #define IS_3DES(flags) (flags & QCE_ALG_3DES)
64 #define IS_AES(flags) (flags & QCE_ALG_AES)
66 #define IS_SHA1(flags) (flags & QCE_HASH_SHA1)
67 #define IS_SHA256(flags) (flags & QCE_HASH_SHA256)
68 #define IS_SHA1_HMAC(flags) (flags & QCE_HASH_SHA1_HMAC)
69 #define IS_SHA256_HMAC(flags) (flags & QCE_HASH_SHA256_HMAC)
70 #define IS_CMAC(flags) (flags & QCE_HASH_AES_CMAC)
71 #define IS_SHA(flags) (IS_SHA1(flags) || IS_SHA256(flags))
72 #define IS_SHA_HMAC(flags) \
73 (IS_SHA1_HMAC(flags) || IS_SHA256_HMAC(flags))
75 #define IS_CBC(mode) (mode & QCE_MODE_CBC)
76 #define IS_ECB(mode) (mode & QCE_MODE_ECB)
77 #define IS_CTR(mode) (mode & QCE_MODE_CTR)
78 #define IS_XTS(mode) (mode & QCE_MODE_XTS)
79 #define IS_CCM(mode) (mode & QCE_MODE_CCM)
81 #define IS_ENCRYPT(dir) (dir & QCE_ENCRYPT)
82 #define IS_DECRYPT(dir) (dir & QCE_DECRYPT)
84 struct qce_alg_template {
85 struct list_head entry;
86 u32 crypto_alg_type;
87 unsigned long alg_flags;
88 const u32 *std_iv;
89 union {
90 struct crypto_alg crypto;
91 struct ahash_alg ahash;
92 } alg;
93 struct qce_device *qce;
96 void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len);
97 int qce_check_status(struct qce_device *qce, u32 *status);
98 void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step);
99 int qce_start(struct crypto_async_request *async_req, u32 type, u32 totallen,
100 u32 offset);
102 #endif /* _COMMON_H_ */