sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / gpio / gpio-104-idi-48.c
blob2d2763ea1a68277eedf82f6e9c132be6f8706923
1 /*
2 * GPIO driver for the ACCES 104-IDI-48 family
3 * Copyright (C) 2015 William Breathitt Gray
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * This driver supports the following ACCES devices: 104-IDI-48A,
15 * 104-IDI-48AC, 104-IDI-48B, and 104-IDI-48BC.
17 #include <linux/bitops.h>
18 #include <linux/device.h>
19 #include <linux/errno.h>
20 #include <linux/gpio/driver.h>
21 #include <linux/io.h>
22 #include <linux/ioport.h>
23 #include <linux/interrupt.h>
24 #include <linux/irqdesc.h>
25 #include <linux/isa.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/moduleparam.h>
29 #include <linux/spinlock.h>
31 #define IDI_48_EXTENT 8
32 #define MAX_NUM_IDI_48 max_num_isa_dev(IDI_48_EXTENT)
34 static unsigned int base[MAX_NUM_IDI_48];
35 static unsigned int num_idi_48;
36 module_param_array(base, uint, &num_idi_48, 0);
37 MODULE_PARM_DESC(base, "ACCES 104-IDI-48 base addresses");
39 static unsigned int irq[MAX_NUM_IDI_48];
40 module_param_array(irq, uint, NULL, 0);
41 MODULE_PARM_DESC(irq, "ACCES 104-IDI-48 interrupt line numbers");
43 /**
44 * struct idi_48_gpio - GPIO device private data structure
45 * @chip: instance of the gpio_chip
46 * @lock: synchronization lock to prevent I/O race conditions
47 * @ack_lock: synchronization lock to prevent IRQ handler race conditions
48 * @irq_mask: input bits affected by interrupts
49 * @base: base port address of the GPIO device
50 * @irq: Interrupt line number
51 * @cos_enb: Change-Of-State IRQ enable boundaries mask
53 struct idi_48_gpio {
54 struct gpio_chip chip;
55 spinlock_t lock;
56 spinlock_t ack_lock;
57 unsigned char irq_mask[6];
58 unsigned base;
59 unsigned irq;
60 unsigned char cos_enb;
63 static int idi_48_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
65 return 1;
68 static int idi_48_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
70 return 0;
73 static int idi_48_gpio_get(struct gpio_chip *chip, unsigned offset)
75 struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip);
76 unsigned i;
77 const unsigned register_offset[6] = { 0, 1, 2, 4, 5, 6 };
78 unsigned base_offset;
79 unsigned mask;
81 for (i = 0; i < 48; i += 8)
82 if (offset < i + 8) {
83 base_offset = register_offset[i / 8];
84 mask = BIT(offset - i);
86 return !!(inb(idi48gpio->base + base_offset) & mask);
89 /* The following line should never execute since offset < 48 */
90 return 0;
93 static void idi_48_irq_ack(struct irq_data *data)
97 static void idi_48_irq_mask(struct irq_data *data)
99 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
100 struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip);
101 const unsigned offset = irqd_to_hwirq(data);
102 unsigned i;
103 unsigned mask;
104 unsigned boundary;
105 unsigned long flags;
107 for (i = 0; i < 48; i += 8)
108 if (offset < i + 8) {
109 mask = BIT(offset - i);
110 boundary = i / 8;
112 idi48gpio->irq_mask[boundary] &= ~mask;
114 if (!idi48gpio->irq_mask[boundary]) {
115 idi48gpio->cos_enb &= ~BIT(boundary);
117 spin_lock_irqsave(&idi48gpio->lock, flags);
119 outb(idi48gpio->cos_enb, idi48gpio->base + 7);
121 spin_unlock_irqrestore(&idi48gpio->lock, flags);
124 return;
128 static void idi_48_irq_unmask(struct irq_data *data)
130 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
131 struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip);
132 const unsigned offset = irqd_to_hwirq(data);
133 unsigned i;
134 unsigned mask;
135 unsigned boundary;
136 unsigned prev_irq_mask;
137 unsigned long flags;
139 for (i = 0; i < 48; i += 8)
140 if (offset < i + 8) {
141 mask = BIT(offset - i);
142 boundary = i / 8;
143 prev_irq_mask = idi48gpio->irq_mask[boundary];
145 idi48gpio->irq_mask[boundary] |= mask;
147 if (!prev_irq_mask) {
148 idi48gpio->cos_enb |= BIT(boundary);
150 spin_lock_irqsave(&idi48gpio->lock, flags);
152 outb(idi48gpio->cos_enb, idi48gpio->base + 7);
154 spin_unlock_irqrestore(&idi48gpio->lock, flags);
157 return;
161 static int idi_48_irq_set_type(struct irq_data *data, unsigned flow_type)
163 /* The only valid irq types are none and both-edges */
164 if (flow_type != IRQ_TYPE_NONE &&
165 (flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH)
166 return -EINVAL;
168 return 0;
171 static struct irq_chip idi_48_irqchip = {
172 .name = "104-idi-48",
173 .irq_ack = idi_48_irq_ack,
174 .irq_mask = idi_48_irq_mask,
175 .irq_unmask = idi_48_irq_unmask,
176 .irq_set_type = idi_48_irq_set_type
179 static irqreturn_t idi_48_irq_handler(int irq, void *dev_id)
181 struct idi_48_gpio *const idi48gpio = dev_id;
182 unsigned long cos_status;
183 unsigned long boundary;
184 unsigned long irq_mask;
185 unsigned long bit_num;
186 unsigned long gpio;
187 struct gpio_chip *const chip = &idi48gpio->chip;
189 spin_lock(&idi48gpio->ack_lock);
191 spin_lock(&idi48gpio->lock);
193 cos_status = inb(idi48gpio->base + 7);
195 spin_unlock(&idi48gpio->lock);
197 /* IRQ Status (bit 6) is active low (0 = IRQ generated by device) */
198 if (cos_status & BIT(6)) {
199 spin_unlock(&idi48gpio->ack_lock);
200 return IRQ_NONE;
203 /* Bit 0-5 indicate which Change-Of-State boundary triggered the IRQ */
204 cos_status &= 0x3F;
206 for_each_set_bit(boundary, &cos_status, 6) {
207 irq_mask = idi48gpio->irq_mask[boundary];
209 for_each_set_bit(bit_num, &irq_mask, 8) {
210 gpio = bit_num + boundary * 8;
212 generic_handle_irq(irq_find_mapping(chip->irqdomain,
213 gpio));
217 spin_unlock(&idi48gpio->ack_lock);
219 return IRQ_HANDLED;
222 static int idi_48_probe(struct device *dev, unsigned int id)
224 struct idi_48_gpio *idi48gpio;
225 const char *const name = dev_name(dev);
226 int err;
228 idi48gpio = devm_kzalloc(dev, sizeof(*idi48gpio), GFP_KERNEL);
229 if (!idi48gpio)
230 return -ENOMEM;
232 if (!devm_request_region(dev, base[id], IDI_48_EXTENT, name)) {
233 dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
234 base[id], base[id] + IDI_48_EXTENT);
235 return -EBUSY;
238 idi48gpio->chip.label = name;
239 idi48gpio->chip.parent = dev;
240 idi48gpio->chip.owner = THIS_MODULE;
241 idi48gpio->chip.base = -1;
242 idi48gpio->chip.ngpio = 48;
243 idi48gpio->chip.get_direction = idi_48_gpio_get_direction;
244 idi48gpio->chip.direction_input = idi_48_gpio_direction_input;
245 idi48gpio->chip.get = idi_48_gpio_get;
246 idi48gpio->base = base[id];
247 idi48gpio->irq = irq[id];
249 spin_lock_init(&idi48gpio->lock);
250 spin_lock_init(&idi48gpio->ack_lock);
252 dev_set_drvdata(dev, idi48gpio);
254 err = gpiochip_add_data(&idi48gpio->chip, idi48gpio);
255 if (err) {
256 dev_err(dev, "GPIO registering failed (%d)\n", err);
257 return err;
260 /* Disable IRQ by default */
261 outb(0, base[id] + 7);
262 inb(base[id] + 7);
264 err = gpiochip_irqchip_add(&idi48gpio->chip, &idi_48_irqchip, 0,
265 handle_edge_irq, IRQ_TYPE_NONE);
266 if (err) {
267 dev_err(dev, "Could not add irqchip (%d)\n", err);
268 goto err_gpiochip_remove;
271 err = request_irq(irq[id], idi_48_irq_handler, IRQF_SHARED, name,
272 idi48gpio);
273 if (err) {
274 dev_err(dev, "IRQ handler registering failed (%d)\n", err);
275 goto err_gpiochip_remove;
278 return 0;
280 err_gpiochip_remove:
281 gpiochip_remove(&idi48gpio->chip);
282 return err;
285 static int idi_48_remove(struct device *dev, unsigned int id)
287 struct idi_48_gpio *const idi48gpio = dev_get_drvdata(dev);
289 free_irq(idi48gpio->irq, idi48gpio);
290 gpiochip_remove(&idi48gpio->chip);
292 return 0;
295 static struct isa_driver idi_48_driver = {
296 .probe = idi_48_probe,
297 .driver = {
298 .name = "104-idi-48"
300 .remove = idi_48_remove
302 module_isa_driver(idi_48_driver, num_idi_48);
304 MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
305 MODULE_DESCRIPTION("ACCES 104-IDI-48 GPIO driver");
306 MODULE_LICENSE("GPL v2");