sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / gpio / gpio-pca953x.c
blobd5d72d84b719014feaf38bcdd4b39fdbb67c6b61
1 /*
2 * PCA953x 4/8/16/24/40 bit I/O ports
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
7 * Derived from drivers/i2c/chips/pca9539.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/gpio.h>
17 #include <linux/interrupt.h>
18 #include <linux/i2c.h>
19 #include <linux/platform_data/pca953x.h>
20 #include <linux/slab.h>
21 #include <asm/unaligned.h>
22 #include <linux/of_platform.h>
23 #include <linux/acpi.h>
24 #include <linux/regulator/consumer.h>
26 #define PCA953X_INPUT 0
27 #define PCA953X_OUTPUT 1
28 #define PCA953X_INVERT 2
29 #define PCA953X_DIRECTION 3
31 #define REG_ADDR_AI 0x80
33 #define PCA957X_IN 0
34 #define PCA957X_INVRT 1
35 #define PCA957X_BKEN 2
36 #define PCA957X_PUPD 3
37 #define PCA957X_CFG 4
38 #define PCA957X_OUT 5
39 #define PCA957X_MSK 6
40 #define PCA957X_INTS 7
42 #define PCAL953X_IN_LATCH 34
43 #define PCAL953X_INT_MASK 37
44 #define PCAL953X_INT_STAT 38
46 #define PCA_GPIO_MASK 0x00FF
47 #define PCA_INT 0x0100
48 #define PCA_PCAL 0x0200
49 #define PCA953X_TYPE 0x1000
50 #define PCA957X_TYPE 0x2000
51 #define PCA_TYPE_MASK 0xF000
53 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
55 static const struct i2c_device_id pca953x_id[] = {
56 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
57 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
58 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
59 { "pca9536", 4 | PCA953X_TYPE, },
60 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
61 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
62 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
63 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
64 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
65 { "pca9556", 8 | PCA953X_TYPE, },
66 { "pca9557", 8 | PCA953X_TYPE, },
67 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
68 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
69 { "pca9698", 40 | PCA953X_TYPE, },
71 { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
73 { "max7310", 8 | PCA953X_TYPE, },
74 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
75 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
76 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
77 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
78 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
79 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
80 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
81 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
82 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
83 { "xra1202", 8 | PCA953X_TYPE },
84 { }
86 MODULE_DEVICE_TABLE(i2c, pca953x_id);
88 static const struct acpi_device_id pca953x_acpi_ids[] = {
89 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
90 { }
92 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
94 #define MAX_BANK 5
95 #define BANK_SZ 8
97 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
99 struct pca953x_reg_config {
100 int direction;
101 int output;
102 int input;
105 static const struct pca953x_reg_config pca953x_regs = {
106 .direction = PCA953X_DIRECTION,
107 .output = PCA953X_OUTPUT,
108 .input = PCA953X_INPUT,
111 static const struct pca953x_reg_config pca957x_regs = {
112 .direction = PCA957X_CFG,
113 .output = PCA957X_OUT,
114 .input = PCA957X_IN,
117 struct pca953x_chip {
118 unsigned gpio_start;
119 u8 reg_output[MAX_BANK];
120 u8 reg_direction[MAX_BANK];
121 struct mutex i2c_lock;
123 #ifdef CONFIG_GPIO_PCA953X_IRQ
124 struct mutex irq_lock;
125 u8 irq_mask[MAX_BANK];
126 u8 irq_stat[MAX_BANK];
127 u8 irq_trig_raise[MAX_BANK];
128 u8 irq_trig_fall[MAX_BANK];
129 #endif
131 struct i2c_client *client;
132 struct gpio_chip gpio_chip;
133 const char *const *names;
134 unsigned long driver_data;
135 struct regulator *regulator;
137 const struct pca953x_reg_config *regs;
139 int (*write_regs)(struct pca953x_chip *, int, u8 *);
140 int (*read_regs)(struct pca953x_chip *, int, u8 *);
143 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
144 int off)
146 int ret;
147 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
148 int offset = off / BANK_SZ;
150 ret = i2c_smbus_read_byte_data(chip->client,
151 (reg << bank_shift) + offset);
152 *val = ret;
154 if (ret < 0) {
155 dev_err(&chip->client->dev, "failed reading register\n");
156 return ret;
159 return 0;
162 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
163 int off)
165 int ret;
166 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
167 int offset = off / BANK_SZ;
169 ret = i2c_smbus_write_byte_data(chip->client,
170 (reg << bank_shift) + offset, val);
172 if (ret < 0) {
173 dev_err(&chip->client->dev, "failed writing register\n");
174 return ret;
177 return 0;
180 static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
182 return i2c_smbus_write_byte_data(chip->client, reg, *val);
185 static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
187 __le16 word = cpu_to_le16(get_unaligned((u16 *)val));
189 return i2c_smbus_write_word_data(chip->client,
190 reg << 1, (__force u16)word);
193 static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
195 int ret;
197 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]);
198 if (ret < 0)
199 return ret;
201 return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]);
204 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
206 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
208 return i2c_smbus_write_i2c_block_data(chip->client,
209 (reg << bank_shift) | REG_ADDR_AI,
210 NBANK(chip), val);
213 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
215 int ret = 0;
217 ret = chip->write_regs(chip, reg, val);
218 if (ret < 0) {
219 dev_err(&chip->client->dev, "failed writing register\n");
220 return ret;
223 return 0;
226 static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
228 int ret;
230 ret = i2c_smbus_read_byte_data(chip->client, reg);
231 *val = ret;
233 return ret;
236 static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
238 int ret;
240 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
241 val[0] = (u16)ret & 0xFF;
242 val[1] = (u16)ret >> 8;
244 return ret;
247 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
249 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
251 return i2c_smbus_read_i2c_block_data(chip->client,
252 (reg << bank_shift) | REG_ADDR_AI,
253 NBANK(chip), val);
256 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
258 int ret;
260 ret = chip->read_regs(chip, reg, val);
261 if (ret < 0) {
262 dev_err(&chip->client->dev, "failed reading register\n");
263 return ret;
266 return 0;
269 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
271 struct pca953x_chip *chip = gpiochip_get_data(gc);
272 u8 reg_val;
273 int ret;
275 mutex_lock(&chip->i2c_lock);
276 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
278 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
279 if (ret)
280 goto exit;
282 chip->reg_direction[off / BANK_SZ] = reg_val;
283 exit:
284 mutex_unlock(&chip->i2c_lock);
285 return ret;
288 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
289 unsigned off, int val)
291 struct pca953x_chip *chip = gpiochip_get_data(gc);
292 u8 reg_val;
293 int ret;
295 mutex_lock(&chip->i2c_lock);
296 /* set output level */
297 if (val)
298 reg_val = chip->reg_output[off / BANK_SZ]
299 | (1u << (off % BANK_SZ));
300 else
301 reg_val = chip->reg_output[off / BANK_SZ]
302 & ~(1u << (off % BANK_SZ));
304 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
305 if (ret)
306 goto exit;
308 chip->reg_output[off / BANK_SZ] = reg_val;
310 /* then direction */
311 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
312 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
313 if (ret)
314 goto exit;
316 chip->reg_direction[off / BANK_SZ] = reg_val;
317 exit:
318 mutex_unlock(&chip->i2c_lock);
319 return ret;
322 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
324 struct pca953x_chip *chip = gpiochip_get_data(gc);
325 u32 reg_val;
326 int ret;
328 mutex_lock(&chip->i2c_lock);
329 ret = pca953x_read_single(chip, chip->regs->input, &reg_val, off);
330 mutex_unlock(&chip->i2c_lock);
331 if (ret < 0) {
332 /* NOTE: diagnostic already emitted; that's all we should
333 * do unless gpio_*_value_cansleep() calls become different
334 * from their nonsleeping siblings (and report faults).
336 return 0;
339 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
342 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
344 struct pca953x_chip *chip = gpiochip_get_data(gc);
345 u8 reg_val;
346 int ret;
348 mutex_lock(&chip->i2c_lock);
349 if (val)
350 reg_val = chip->reg_output[off / BANK_SZ]
351 | (1u << (off % BANK_SZ));
352 else
353 reg_val = chip->reg_output[off / BANK_SZ]
354 & ~(1u << (off % BANK_SZ));
356 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
357 if (ret)
358 goto exit;
360 chip->reg_output[off / BANK_SZ] = reg_val;
361 exit:
362 mutex_unlock(&chip->i2c_lock);
365 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
366 unsigned long *mask, unsigned long *bits)
368 struct pca953x_chip *chip = gpiochip_get_data(gc);
369 unsigned int bank_mask, bank_val;
370 int bank_shift, bank;
371 u8 reg_val[MAX_BANK];
372 int ret;
374 bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
376 mutex_lock(&chip->i2c_lock);
377 memcpy(reg_val, chip->reg_output, NBANK(chip));
378 for (bank = 0; bank < NBANK(chip); bank++) {
379 bank_mask = mask[bank / sizeof(*mask)] >>
380 ((bank % sizeof(*mask)) * 8);
381 if (bank_mask) {
382 bank_val = bits[bank / sizeof(*bits)] >>
383 ((bank % sizeof(*bits)) * 8);
384 bank_val &= bank_mask;
385 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
389 ret = i2c_smbus_write_i2c_block_data(chip->client,
390 chip->regs->output << bank_shift,
391 NBANK(chip), reg_val);
392 if (ret)
393 goto exit;
395 memcpy(chip->reg_output, reg_val, NBANK(chip));
396 exit:
397 mutex_unlock(&chip->i2c_lock);
400 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
402 struct gpio_chip *gc;
404 gc = &chip->gpio_chip;
406 gc->direction_input = pca953x_gpio_direction_input;
407 gc->direction_output = pca953x_gpio_direction_output;
408 gc->get = pca953x_gpio_get_value;
409 gc->set = pca953x_gpio_set_value;
410 gc->set_multiple = pca953x_gpio_set_multiple;
411 gc->can_sleep = true;
413 gc->base = chip->gpio_start;
414 gc->ngpio = gpios;
415 gc->label = chip->client->name;
416 gc->parent = &chip->client->dev;
417 gc->owner = THIS_MODULE;
418 gc->names = chip->names;
421 #ifdef CONFIG_GPIO_PCA953X_IRQ
422 static void pca953x_irq_mask(struct irq_data *d)
424 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
425 struct pca953x_chip *chip = gpiochip_get_data(gc);
427 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
430 static void pca953x_irq_unmask(struct irq_data *d)
432 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
433 struct pca953x_chip *chip = gpiochip_get_data(gc);
435 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
438 static void pca953x_irq_bus_lock(struct irq_data *d)
440 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
441 struct pca953x_chip *chip = gpiochip_get_data(gc);
443 mutex_lock(&chip->irq_lock);
446 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
448 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
449 struct pca953x_chip *chip = gpiochip_get_data(gc);
450 u8 new_irqs;
451 int level, i;
452 u8 invert_irq_mask[MAX_BANK];
454 if (chip->driver_data & PCA_PCAL) {
455 /* Enable latch on interrupt-enabled inputs */
456 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
458 for (i = 0; i < NBANK(chip); i++)
459 invert_irq_mask[i] = ~chip->irq_mask[i];
461 /* Unmask enabled interrupts */
462 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
465 /* Look for any newly setup interrupt */
466 for (i = 0; i < NBANK(chip); i++) {
467 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
468 new_irqs &= ~chip->reg_direction[i];
470 while (new_irqs) {
471 level = __ffs(new_irqs);
472 pca953x_gpio_direction_input(&chip->gpio_chip,
473 level + (BANK_SZ * i));
474 new_irqs &= ~(1 << level);
478 mutex_unlock(&chip->irq_lock);
481 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
483 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
484 struct pca953x_chip *chip = gpiochip_get_data(gc);
485 int bank_nb = d->hwirq / BANK_SZ;
486 u8 mask = 1 << (d->hwirq % BANK_SZ);
488 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
489 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
490 d->irq, type);
491 return -EINVAL;
494 if (type & IRQ_TYPE_EDGE_FALLING)
495 chip->irq_trig_fall[bank_nb] |= mask;
496 else
497 chip->irq_trig_fall[bank_nb] &= ~mask;
499 if (type & IRQ_TYPE_EDGE_RISING)
500 chip->irq_trig_raise[bank_nb] |= mask;
501 else
502 chip->irq_trig_raise[bank_nb] &= ~mask;
504 return 0;
507 static struct irq_chip pca953x_irq_chip = {
508 .name = "pca953x",
509 .irq_mask = pca953x_irq_mask,
510 .irq_unmask = pca953x_irq_unmask,
511 .irq_bus_lock = pca953x_irq_bus_lock,
512 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
513 .irq_set_type = pca953x_irq_set_type,
516 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
518 u8 cur_stat[MAX_BANK];
519 u8 old_stat[MAX_BANK];
520 bool pending_seen = false;
521 bool trigger_seen = false;
522 u8 trigger[MAX_BANK];
523 int ret, i;
525 if (chip->driver_data & PCA_PCAL) {
526 /* Read the current interrupt status from the device */
527 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
528 if (ret)
529 return false;
531 /* Check latched inputs and clear interrupt status */
532 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
533 if (ret)
534 return false;
536 for (i = 0; i < NBANK(chip); i++) {
537 /* Apply filter for rising/falling edge selection */
538 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
539 (cur_stat[i] & chip->irq_trig_raise[i]);
540 pending[i] &= trigger[i];
541 if (pending[i])
542 pending_seen = true;
545 return pending_seen;
548 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
549 if (ret)
550 return false;
552 /* Remove output pins from the equation */
553 for (i = 0; i < NBANK(chip); i++)
554 cur_stat[i] &= chip->reg_direction[i];
556 memcpy(old_stat, chip->irq_stat, NBANK(chip));
558 for (i = 0; i < NBANK(chip); i++) {
559 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
560 if (trigger[i])
561 trigger_seen = true;
564 if (!trigger_seen)
565 return false;
567 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
569 for (i = 0; i < NBANK(chip); i++) {
570 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
571 (cur_stat[i] & chip->irq_trig_raise[i]);
572 pending[i] &= trigger[i];
573 if (pending[i])
574 pending_seen = true;
577 return pending_seen;
580 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
582 struct pca953x_chip *chip = devid;
583 u8 pending[MAX_BANK];
584 u8 level;
585 unsigned nhandled = 0;
586 int i;
588 if (!pca953x_irq_pending(chip, pending))
589 return IRQ_NONE;
591 for (i = 0; i < NBANK(chip); i++) {
592 while (pending[i]) {
593 level = __ffs(pending[i]);
594 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
595 level + (BANK_SZ * i)));
596 pending[i] &= ~(1 << level);
597 nhandled++;
601 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
604 static int pca953x_irq_setup(struct pca953x_chip *chip,
605 int irq_base)
607 struct i2c_client *client = chip->client;
608 int ret, i;
610 if (client->irq && irq_base != -1
611 && (chip->driver_data & PCA_INT)) {
612 ret = pca953x_read_regs(chip,
613 chip->regs->input, chip->irq_stat);
614 if (ret)
615 return ret;
618 * There is no way to know which GPIO line generated the
619 * interrupt. We have to rely on the previous read for
620 * this purpose.
622 for (i = 0; i < NBANK(chip); i++)
623 chip->irq_stat[i] &= chip->reg_direction[i];
624 mutex_init(&chip->irq_lock);
626 ret = devm_request_threaded_irq(&client->dev,
627 client->irq,
628 NULL,
629 pca953x_irq_handler,
630 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
631 IRQF_SHARED,
632 dev_name(&client->dev), chip);
633 if (ret) {
634 dev_err(&client->dev, "failed to request irq %d\n",
635 client->irq);
636 return ret;
639 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip,
640 &pca953x_irq_chip,
641 irq_base,
642 handle_simple_irq,
643 IRQ_TYPE_NONE);
644 if (ret) {
645 dev_err(&client->dev,
646 "could not connect irqchip to gpiochip\n");
647 return ret;
650 gpiochip_set_nested_irqchip(&chip->gpio_chip,
651 &pca953x_irq_chip,
652 client->irq);
655 return 0;
658 #else /* CONFIG_GPIO_PCA953X_IRQ */
659 static int pca953x_irq_setup(struct pca953x_chip *chip,
660 int irq_base)
662 struct i2c_client *client = chip->client;
664 if (irq_base != -1 && (chip->driver_data & PCA_INT))
665 dev_warn(&client->dev, "interrupt support not compiled in\n");
667 return 0;
669 #endif
671 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
673 int ret;
674 u8 val[MAX_BANK];
676 chip->regs = &pca953x_regs;
678 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
679 if (ret)
680 goto out;
682 ret = pca953x_read_regs(chip, chip->regs->direction,
683 chip->reg_direction);
684 if (ret)
685 goto out;
687 /* set platform specific polarity inversion */
688 if (invert)
689 memset(val, 0xFF, NBANK(chip));
690 else
691 memset(val, 0, NBANK(chip));
693 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
694 out:
695 return ret;
698 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
700 int ret;
701 u8 val[MAX_BANK];
703 chip->regs = &pca957x_regs;
705 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
706 if (ret)
707 goto out;
708 ret = pca953x_read_regs(chip, chip->regs->direction,
709 chip->reg_direction);
710 if (ret)
711 goto out;
713 /* set platform specific polarity inversion */
714 if (invert)
715 memset(val, 0xFF, NBANK(chip));
716 else
717 memset(val, 0, NBANK(chip));
718 ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
719 if (ret)
720 goto out;
722 /* To enable register 6, 7 to control pull up and pull down */
723 memset(val, 0x02, NBANK(chip));
724 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
725 if (ret)
726 goto out;
728 return 0;
729 out:
730 return ret;
733 static const struct of_device_id pca953x_dt_ids[];
735 static int pca953x_probe(struct i2c_client *client,
736 const struct i2c_device_id *i2c_id)
738 struct pca953x_platform_data *pdata;
739 struct pca953x_chip *chip;
740 int irq_base = 0;
741 int ret;
742 u32 invert = 0;
743 struct regulator *reg;
745 chip = devm_kzalloc(&client->dev,
746 sizeof(struct pca953x_chip), GFP_KERNEL);
747 if (chip == NULL)
748 return -ENOMEM;
750 pdata = dev_get_platdata(&client->dev);
751 if (pdata) {
752 irq_base = pdata->irq_base;
753 chip->gpio_start = pdata->gpio_base;
754 invert = pdata->invert;
755 chip->names = pdata->names;
756 } else {
757 chip->gpio_start = -1;
758 irq_base = 0;
761 chip->client = client;
763 reg = devm_regulator_get(&client->dev, "vcc");
764 if (IS_ERR(reg)) {
765 ret = PTR_ERR(reg);
766 if (ret != -EPROBE_DEFER)
767 dev_err(&client->dev, "reg get err: %d\n", ret);
768 return ret;
770 ret = regulator_enable(reg);
771 if (ret) {
772 dev_err(&client->dev, "reg en err: %d\n", ret);
773 return ret;
775 chip->regulator = reg;
777 if (i2c_id) {
778 chip->driver_data = i2c_id->driver_data;
779 } else {
780 const struct acpi_device_id *acpi_id;
781 const struct of_device_id *match;
783 match = of_match_device(pca953x_dt_ids, &client->dev);
784 if (match) {
785 chip->driver_data = (int)(uintptr_t)match->data;
786 } else {
787 acpi_id = acpi_match_device(pca953x_acpi_ids, &client->dev);
788 if (!acpi_id) {
789 ret = -ENODEV;
790 goto err_exit;
793 chip->driver_data = acpi_id->driver_data;
797 mutex_init(&chip->i2c_lock);
799 * In case we have an i2c-mux controlled by a GPIO provided by an
800 * expander using the same driver higher on the device tree, read the
801 * i2c adapter nesting depth and use the retrieved value as lockdep
802 * subclass for chip->i2c_lock.
804 * REVISIT: This solution is not complete. It protects us from lockdep
805 * false positives when the expander controlling the i2c-mux is on
806 * a different level on the device tree, but not when it's on the same
807 * level on a different branch (in which case the subclass number
808 * would be the same).
810 * TODO: Once a correct solution is developed, a similar fix should be
811 * applied to all other i2c-controlled GPIO expanders (and potentially
812 * regmap-i2c).
814 lockdep_set_subclass(&chip->i2c_lock,
815 i2c_adapter_depth(client->adapter));
817 /* initialize cached registers from their original values.
818 * we can't share this chip with another i2c master.
820 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
822 if (chip->gpio_chip.ngpio <= 8) {
823 chip->write_regs = pca953x_write_regs_8;
824 chip->read_regs = pca953x_read_regs_8;
825 } else if (chip->gpio_chip.ngpio >= 24) {
826 chip->write_regs = pca953x_write_regs_24;
827 chip->read_regs = pca953x_read_regs_24;
828 } else {
829 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
830 chip->write_regs = pca953x_write_regs_16;
831 else
832 chip->write_regs = pca957x_write_regs_16;
833 chip->read_regs = pca953x_read_regs_16;
836 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
837 ret = device_pca953x_init(chip, invert);
838 else
839 ret = device_pca957x_init(chip, invert);
840 if (ret)
841 goto err_exit;
843 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
844 if (ret)
845 goto err_exit;
847 ret = pca953x_irq_setup(chip, irq_base);
848 if (ret)
849 goto err_exit;
851 if (pdata && pdata->setup) {
852 ret = pdata->setup(client, chip->gpio_chip.base,
853 chip->gpio_chip.ngpio, pdata->context);
854 if (ret < 0)
855 dev_warn(&client->dev, "setup failed, %d\n", ret);
858 i2c_set_clientdata(client, chip);
859 return 0;
861 err_exit:
862 regulator_disable(chip->regulator);
863 return ret;
866 static int pca953x_remove(struct i2c_client *client)
868 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
869 struct pca953x_chip *chip = i2c_get_clientdata(client);
870 int ret;
872 if (pdata && pdata->teardown) {
873 ret = pdata->teardown(client, chip->gpio_chip.base,
874 chip->gpio_chip.ngpio, pdata->context);
875 if (ret < 0)
876 dev_err(&client->dev, "%s failed, %d\n",
877 "teardown", ret);
878 } else {
879 ret = 0;
882 regulator_disable(chip->regulator);
884 return ret;
887 /* convenience to stop overlong match-table lines */
888 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
889 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
891 static const struct of_device_id pca953x_dt_ids[] = {
892 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
893 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
894 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
895 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
896 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
897 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
898 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
899 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
900 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
901 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
902 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
903 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
904 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
905 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
907 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
908 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
909 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
910 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
911 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
913 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
914 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
915 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
916 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
917 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
919 { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), },
921 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
925 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
927 static struct i2c_driver pca953x_driver = {
928 .driver = {
929 .name = "pca953x",
930 .of_match_table = pca953x_dt_ids,
931 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
933 .probe = pca953x_probe,
934 .remove = pca953x_remove,
935 .id_table = pca953x_id,
938 static int __init pca953x_init(void)
940 return i2c_add_driver(&pca953x_driver);
942 /* register after i2c postcore initcall and before
943 * subsys initcalls that may rely on these GPIOs
945 subsys_initcall(pca953x_init);
947 static void __exit pca953x_exit(void)
949 i2c_del_driver(&pca953x_driver);
951 module_exit(pca953x_exit);
953 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
954 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
955 MODULE_LICENSE("GPL");