sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / gpu / host1x / cdma.h
blob470087af8fe520681ba3cc8457646343f16f6aee
1 /*
2 * Tegra host1x Command DMA
4 * Copyright (c) 2010-2013, NVIDIA Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef __HOST1X_CDMA_H
20 #define __HOST1X_CDMA_H
22 #include <linux/sched.h>
23 #include <linux/semaphore.h>
24 #include <linux/list.h>
26 struct host1x_syncpt;
27 struct host1x_userctx_timeout;
28 struct host1x_job;
31 * cdma
33 * This is in charge of a host command DMA channel.
34 * Sends ops to a push buffer, and takes responsibility for unpinning
35 * (& possibly freeing) of memory after those ops have completed.
36 * Producer:
37 * begin
38 * push - send ops to the push buffer
39 * end - start command DMA and enqueue handles to be unpinned
40 * Consumer:
41 * update - call to update sync queue and push buffer, unpin memory
44 struct push_buffer {
45 void *mapped; /* mapped pushbuffer memory */
46 dma_addr_t phys; /* physical address of pushbuffer */
47 u32 fence; /* index we've written */
48 u32 pos; /* index to write to */
49 u32 size_bytes;
52 struct buffer_timeout {
53 struct delayed_work wq; /* work queue */
54 bool initialized; /* timer one-time setup flag */
55 struct host1x_syncpt *syncpt; /* buffer completion syncpt */
56 u32 syncpt_val; /* syncpt value when completed */
57 ktime_t start_ktime; /* starting time */
58 /* context timeout information */
59 int client;
62 enum cdma_event {
63 CDMA_EVENT_NONE, /* not waiting for any event */
64 CDMA_EVENT_SYNC_QUEUE_EMPTY, /* wait for empty sync queue */
65 CDMA_EVENT_PUSH_BUFFER_SPACE /* wait for space in push buffer */
68 struct host1x_cdma {
69 struct mutex lock; /* controls access to shared state */
70 struct semaphore sem; /* signalled when event occurs */
71 enum cdma_event event; /* event that sem is waiting for */
72 unsigned int slots_used; /* pb slots used in current submit */
73 unsigned int slots_free; /* pb slots free in current submit */
74 unsigned int first_get; /* DMAGET value, where submit begins */
75 unsigned int last_pos; /* last value written to DMAPUT */
76 struct push_buffer push_buffer; /* channel's push buffer */
77 struct list_head sync_queue; /* job queue */
78 struct buffer_timeout timeout; /* channel's timeout state/wq */
79 bool running;
80 bool torndown;
83 #define cdma_to_channel(cdma) container_of(cdma, struct host1x_channel, cdma)
84 #define cdma_to_host1x(cdma) dev_get_drvdata(cdma_to_channel(cdma)->dev->parent)
85 #define pb_to_cdma(pb) container_of(pb, struct host1x_cdma, push_buffer)
87 int host1x_cdma_init(struct host1x_cdma *cdma);
88 int host1x_cdma_deinit(struct host1x_cdma *cdma);
89 void host1x_cdma_stop(struct host1x_cdma *cdma);
90 int host1x_cdma_begin(struct host1x_cdma *cdma, struct host1x_job *job);
91 void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2);
92 void host1x_cdma_end(struct host1x_cdma *cdma, struct host1x_job *job);
93 void host1x_cdma_update(struct host1x_cdma *cdma);
94 void host1x_cdma_peek(struct host1x_cdma *cdma, u32 dmaget, int slot,
95 u32 *out);
96 unsigned int host1x_cdma_wait_locked(struct host1x_cdma *cdma,
97 enum cdma_event event);
98 void host1x_cdma_update_sync_queue(struct host1x_cdma *cdma,
99 struct device *dev);
100 #endif