sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / gpu / host1x / channel.h
blobdf767cf90d51e14c2647f42ef192a7ffcf19489b
1 /*
2 * Tegra host1x Channel
4 * Copyright (c) 2010-2013, NVIDIA Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef __HOST1X_CHANNEL_H
20 #define __HOST1X_CHANNEL_H
22 #include <linux/io.h>
24 #include "cdma.h"
26 struct host1x;
28 struct host1x_channel {
29 struct list_head list;
31 unsigned int refcount;
32 unsigned int id;
33 struct mutex reflock;
34 struct mutex submitlock;
35 void __iomem *regs;
36 struct device *dev;
37 struct host1x_cdma cdma;
40 /* channel list operations */
41 int host1x_channel_list_init(struct host1x *host);
43 #define host1x_for_each_channel(host, channel) \
44 list_for_each_entry(channel, &host->chlist.list, list)
46 #endif