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sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / hwmon / it87.c
blobad82cb28d87ab9f805a444983030af3a9a18b1da
1 /*
2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring.
4 *
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
8 * Fan Controller)
9 *
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
12 *
13 * Supports: IT8603E Super I/O chip w/LPC interface
14 * IT8620E Super I/O chip w/LPC interface
15 * IT8623E Super I/O chip w/LPC interface
16 * IT8628E Super I/O chip w/LPC interface
17 * IT8705F Super I/O chip w/LPC interface
18 * IT8712F Super I/O chip w/LPC interface
19 * IT8716F Super I/O chip w/LPC interface
20 * IT8718F Super I/O chip w/LPC interface
21 * IT8720F Super I/O chip w/LPC interface
22 * IT8721F Super I/O chip w/LPC interface
23 * IT8726F Super I/O chip w/LPC interface
24 * IT8728F Super I/O chip w/LPC interface
25 * IT8732F Super I/O chip w/LPC interface
26 * IT8758E Super I/O chip w/LPC interface
27 * IT8771E Super I/O chip w/LPC interface
28 * IT8772E Super I/O chip w/LPC interface
29 * IT8781F Super I/O chip w/LPC interface
30 * IT8782F Super I/O chip w/LPC interface
31 * IT8783E/F Super I/O chip w/LPC interface
32 * IT8786E Super I/O chip w/LPC interface
33 * IT8790E Super I/O chip w/LPC interface
34 * Sis950 A clone of the IT8705F
35 *
36 * Copyright (C) 2001 Chris Gauthron
37 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
38 *
39 * This program is free software; you can redistribute it and/or modify
40 * it under the terms of the GNU General Public License as published by
41 * the Free Software Foundation; either version 2 of the License, or
42 * (at your option) any later version.
43 *
44 * This program is distributed in the hope that it will be useful,
45 * but WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
47 * GNU General Public License for more details.
48 */
49
50 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
51
52 #include <linux/bitops.h>
53 #include <linux/module.h>
54 #include <linux/init.h>
55 #include <linux/slab.h>
56 #include <linux/jiffies.h>
57 #include <linux/platform_device.h>
58 #include <linux/hwmon.h>
59 #include <linux/hwmon-sysfs.h>
60 #include <linux/hwmon-vid.h>
61 #include <linux/err.h>
62 #include <linux/mutex.h>
63 #include <linux/sysfs.h>
64 #include <linux/string.h>
65 #include <linux/dmi.h>
66 #include <linux/acpi.h>
67 #include <linux/io.h>
68
69 #define DRVNAME "it87"
70
71 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
72 it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8603,
73 it8620, it8628 };
74
75 static unsigned short force_id;
76 module_param(force_id, ushort, 0);
77 MODULE_PARM_DESC(force_id, "Override the detected device ID");
78
79 static struct platform_device *it87_pdev[2];
80
81 #define REG_2E 0x2e /* The register to read/write */
82 #define REG_4E 0x4e /* Secondary register to read/write */
83
84 #define DEV 0x07 /* Register: Logical device select */
85 #define PME 0x04 /* The device with the fan registers in it */
86
87 /* The device with the IT8718F/IT8720F VID value in it */
88 #define GPIO 0x07
89
90 #define DEVID 0x20 /* Register: Device ID */
91 #define DEVREV 0x22 /* Register: Device Revision */
92
93 static inline int superio_inb(int ioreg, int reg)
94 {
95 outb(reg, ioreg);
96 return inb(ioreg + 1);
97 }
98
99 static inline void superio_outb(int ioreg, int reg, int val)
100 {
101 outb(reg, ioreg);
102 outb(val, ioreg + 1);
103 }
104
105 static int superio_inw(int ioreg, int reg)
106 {
107 int val;
108
109 outb(reg++, ioreg);
110 val = inb(ioreg + 1) << 8;
111 outb(reg, ioreg);
112 val |= inb(ioreg + 1);
113 return val;
114 }
115
116 static inline void superio_select(int ioreg, int ldn)
117 {
118 outb(DEV, ioreg);
119 outb(ldn, ioreg + 1);
120 }
121
122 static inline int superio_enter(int ioreg)
123 {
124 /*
125 * Try to reserve ioreg and ioreg + 1 for exclusive access.
126 */
127 if (!request_muxed_region(ioreg, 2, DRVNAME))
128 return -EBUSY;
129
130 outb(0x87, ioreg);
131 outb(0x01, ioreg);
132 outb(0x55, ioreg);
133 outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
134 return 0;
135 }
136
137 static inline void superio_exit(int ioreg)
138 {
139 outb(0x02, ioreg);
140 outb(0x02, ioreg + 1);
141 release_region(ioreg, 2);
142 }
143
144 /* Logical device 4 registers */
145 #define IT8712F_DEVID 0x8712
146 #define IT8705F_DEVID 0x8705
147 #define IT8716F_DEVID 0x8716
148 #define IT8718F_DEVID 0x8718
149 #define IT8720F_DEVID 0x8720
150 #define IT8721F_DEVID 0x8721
151 #define IT8726F_DEVID 0x8726
152 #define IT8728F_DEVID 0x8728
153 #define IT8732F_DEVID 0x8732
154 #define IT8771E_DEVID 0x8771
155 #define IT8772E_DEVID 0x8772
156 #define IT8781F_DEVID 0x8781
157 #define IT8782F_DEVID 0x8782
158 #define IT8783E_DEVID 0x8783
159 #define IT8786E_DEVID 0x8786
160 #define IT8790E_DEVID 0x8790
161 #define IT8603E_DEVID 0x8603
162 #define IT8620E_DEVID 0x8620
163 #define IT8623E_DEVID 0x8623
164 #define IT8628E_DEVID 0x8628
165 #define IT87_ACT_REG 0x30
166 #define IT87_BASE_REG 0x60
167
168 /* Logical device 7 registers (IT8712F and later) */
169 #define IT87_SIO_GPIO1_REG 0x25
170 #define IT87_SIO_GPIO2_REG 0x26
171 #define IT87_SIO_GPIO3_REG 0x27
172 #define IT87_SIO_GPIO4_REG 0x28
173 #define IT87_SIO_GPIO5_REG 0x29
174 #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
175 #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
176 #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
177 #define IT87_SIO_VID_REG 0xfc /* VID value */
178 #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
179
180 /* Update battery voltage after every reading if true */
181 static bool update_vbat;
182
183 /* Not all BIOSes properly configure the PWM registers */
184 static bool fix_pwm_polarity;
185
186 /* Many IT87 constants specified below */
187
188 /* Length of ISA address segment */
189 #define IT87_EXTENT 8
190
191 /* Length of ISA address segment for Environmental Controller */
192 #define IT87_EC_EXTENT 2
193
194 /* Offset of EC registers from ISA base address */
195 #define IT87_EC_OFFSET 5
196
197 /* Where are the ISA address/data registers relative to the EC base address */
198 #define IT87_ADDR_REG_OFFSET 0
199 #define IT87_DATA_REG_OFFSET 1
200
201 /*----- The IT87 registers -----*/
202
203 #define IT87_REG_CONFIG 0x00
204
205 #define IT87_REG_ALARM1 0x01
206 #define IT87_REG_ALARM2 0x02
207 #define IT87_REG_ALARM3 0x03
208
209 /*
210 * The IT8718F and IT8720F have the VID value in a different register, in
211 * Super-I/O configuration space.
212 */
213 #define IT87_REG_VID 0x0a
214 /*
215 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
216 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
217 * mode.
218 */
219 #define IT87_REG_FAN_DIV 0x0b
220 #define IT87_REG_FAN_16BIT 0x0c
221
222 /*
223 * Monitors:
224 * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
225 * - up to 6 temp (1 to 6)
226 * - up to 6 fan (1 to 6)
227 */
228
229 static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
230 static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
231 static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
232 static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
233 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
234
235 #define IT87_REG_FAN_MAIN_CTRL 0x13
236 #define IT87_REG_FAN_CTL 0x14
237 static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
238 static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
239
240 static const u8 IT87_REG_VIN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
241 0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
242
243 #define IT87_REG_TEMP(nr) (0x29 + (nr))
244
245 #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
246 #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
247 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
248 #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
249
250 #define IT87_REG_VIN_ENABLE 0x50
251 #define IT87_REG_TEMP_ENABLE 0x51
252 #define IT87_REG_TEMP_EXTRA 0x55
253 #define IT87_REG_BEEP_ENABLE 0x5c
254
255 #define IT87_REG_CHIPID 0x58
256
257 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
258
259 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
260 #define IT87_REG_AUTO_PWM(nr, i) (IT87_REG_AUTO_BASE[nr] + 5 + (i))
261
262 #define IT87_REG_TEMP456_ENABLE 0x77
263
264 #define NUM_VIN ARRAY_SIZE(IT87_REG_VIN)
265 #define NUM_VIN_LIMIT 8
266 #define NUM_TEMP 6
267 #define NUM_TEMP_OFFSET ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
268 #define NUM_TEMP_LIMIT 3
269 #define NUM_FAN ARRAY_SIZE(IT87_REG_FAN)
270 #define NUM_FAN_DIV 3
271 #define NUM_PWM ARRAY_SIZE(IT87_REG_PWM)
272 #define NUM_AUTO_PWM ARRAY_SIZE(IT87_REG_PWM)
273
274 struct it87_devices {
275 const char *name;
276 const char * const suffix;
277 u32 features;
278 u8 peci_mask;
279 u8 old_peci_mask;
280 };
281
282 #define FEAT_12MV_ADC BIT(0)
283 #define FEAT_NEWER_AUTOPWM BIT(1)
284 #define FEAT_OLD_AUTOPWM BIT(2)
285 #define FEAT_16BIT_FANS BIT(3)
286 #define FEAT_TEMP_OFFSET BIT(4)
287 #define FEAT_TEMP_PECI BIT(5)
288 #define FEAT_TEMP_OLD_PECI BIT(6)
289 #define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */
290 #define FEAT_FIVE_FANS BIT(8) /* Supports five fans */
291 #define FEAT_VID BIT(9) /* Set if chip supports VID */
292 #define FEAT_IN7_INTERNAL BIT(10) /* Set if in7 is internal */
293 #define FEAT_SIX_FANS BIT(11) /* Supports six fans */
294 #define FEAT_10_9MV_ADC BIT(12)
295 #define FEAT_AVCC3 BIT(13) /* Chip supports in9/AVCC3 */
296 #define FEAT_SIX_PWM BIT(14) /* Chip supports 6 pwm chn */
297 #define FEAT_PWM_FREQ2 BIT(15) /* Separate pwm freq 2 */
298 #define FEAT_SIX_TEMP BIT(16) /* Up to 6 temp sensors */
299
300 static const struct it87_devices it87_devices[] = {
301 [it87] = {
302 .name = "it87",
303 .suffix = "F",
304 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */
305 },
306 [it8712] = {
307 .name = "it8712",
308 .suffix = "F",
309 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
310 /* may need to overwrite */
311 },
312 [it8716] = {
313 .name = "it8716",
314 .suffix = "F",
315 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
316 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
317 },
318 [it8718] = {
319 .name = "it8718",
320 .suffix = "F",
321 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
322 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
323 | FEAT_PWM_FREQ2,
324 .old_peci_mask = 0x4,
325 },
326 [it8720] = {
327 .name = "it8720",
328 .suffix = "F",
329 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
330 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
331 | FEAT_PWM_FREQ2,
332 .old_peci_mask = 0x4,
333 },
334 [it8721] = {
335 .name = "it8721",
336 .suffix = "F",
337 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
338 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
339 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
340 | FEAT_PWM_FREQ2,
341 .peci_mask = 0x05,
342 .old_peci_mask = 0x02, /* Actually reports PCH */
343 },
344 [it8728] = {
345 .name = "it8728",
346 .suffix = "F",
347 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
348 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
349 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
350 .peci_mask = 0x07,
351 },
352 [it8732] = {
353 .name = "it8732",
354 .suffix = "F",
355 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
356 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
357 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
358 .peci_mask = 0x07,
359 .old_peci_mask = 0x02, /* Actually reports PCH */
360 },
361 [it8771] = {
362 .name = "it8771",
363 .suffix = "E",
364 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
365 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
366 | FEAT_PWM_FREQ2,
367 /* PECI: guesswork */
368 /* 12mV ADC (OHM) */
369 /* 16 bit fans (OHM) */
370 /* three fans, always 16 bit (guesswork) */
371 .peci_mask = 0x07,
372 },
373 [it8772] = {
374 .name = "it8772",
375 .suffix = "E",
376 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
377 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
378 | FEAT_PWM_FREQ2,
379 /* PECI (coreboot) */
380 /* 12mV ADC (HWSensors4, OHM) */
381 /* 16 bit fans (HWSensors4, OHM) */
382 /* three fans, always 16 bit (datasheet) */
383 .peci_mask = 0x07,
384 },
385 [it8781] = {
386 .name = "it8781",
387 .suffix = "F",
388 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
389 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
390 .old_peci_mask = 0x4,
391 },
392 [it8782] = {
393 .name = "it8782",
394 .suffix = "F",
395 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
396 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
397 .old_peci_mask = 0x4,
398 },
399 [it8783] = {
400 .name = "it8783",
401 .suffix = "E/F",
402 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
403 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
404 .old_peci_mask = 0x4,
405 },
406 [it8786] = {
407 .name = "it8786",
408 .suffix = "E",
409 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
410 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
411 | FEAT_PWM_FREQ2,
412 .peci_mask = 0x07,
413 },
414 [it8790] = {
415 .name = "it8790",
416 .suffix = "E",
417 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
418 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
419 | FEAT_PWM_FREQ2,
420 .peci_mask = 0x07,
421 },
422 [it8603] = {
423 .name = "it8603",
424 .suffix = "E",
425 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
426 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
427 | FEAT_AVCC3 | FEAT_PWM_FREQ2,
428 .peci_mask = 0x07,
429 },
430 [it8620] = {
431 .name = "it8620",
432 .suffix = "E",
433 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
434 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
435 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
436 | FEAT_SIX_TEMP,
437 .peci_mask = 0x07,
438 },
439 [it8628] = {
440 .name = "it8628",
441 .suffix = "E",
442 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
443 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
444 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
445 | FEAT_SIX_TEMP,
446 .peci_mask = 0x07,
447 },
448 };
449
450 #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
451 #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
452 #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC)
453 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
454 #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
455 #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
456 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
457 ((data)->peci_mask & BIT(nr)))
458 #define has_temp_old_peci(data, nr) \
459 (((data)->features & FEAT_TEMP_OLD_PECI) && \
460 ((data)->old_peci_mask & BIT(nr)))
461 #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
462 #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
463 FEAT_SIX_FANS))
464 #define has_vid(data) ((data)->features & FEAT_VID)
465 #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
466 #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
467 #define has_avcc3(data) ((data)->features & FEAT_AVCC3)
468 #define has_six_pwm(data) ((data)->features & FEAT_SIX_PWM)
469 #define has_pwm_freq2(data) ((data)->features & FEAT_PWM_FREQ2)
470 #define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP)
471
472 struct it87_sio_data {
473 enum chips type;
474 /* Values read from Super-I/O config space */
475 u8 revision;
476 u8 vid_value;
477 u8 beep_pin;
478 u8 internal; /* Internal sensors can be labeled */
479 /* Features skipped based on config or DMI */
480 u16 skip_in;
481 u8 skip_vid;
482 u8 skip_fan;
483 u8 skip_pwm;
484 u8 skip_temp;
485 };
486
487 /*
488 * For each registered chip, we need to keep some data in memory.
489 * The structure is dynamically allocated.
490 */
491 struct it87_data {
492 const struct attribute_group *groups[7];
493 enum chips type;
494 u32 features;
495 u8 peci_mask;
496 u8 old_peci_mask;
497
498 unsigned short addr;
499 const char *name;
500 struct mutex update_lock;
501 char valid; /* !=0 if following fields are valid */
502 unsigned long last_updated; /* In jiffies */
503
504 u16 in_scaled; /* Internal voltage sensors are scaled */
505 u16 in_internal; /* Bitfield, internal sensors (for labels) */
506 u16 has_in; /* Bitfield, voltage sensors enabled */
507 u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
508 u8 has_fan; /* Bitfield, fans enabled */
509 u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
510 u8 has_temp; /* Bitfield, temp sensors enabled */
511 s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
512 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
513 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
514 u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
515 bool has_vid; /* True if VID supported */
516 u8 vid; /* Register encoding, combined */
517 u8 vrm;
518 u32 alarms; /* Register encoding, combined */
519 bool has_beep; /* true if beep supported */
520 u8 beeps; /* Register encoding */
521 u8 fan_main_ctrl; /* Register value */
522 u8 fan_ctl; /* Register value */
523
524 /*
525 * The following 3 arrays correspond to the same registers up to
526 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
527 * 7, and we want to preserve settings on mode changes, so we have
528 * to track all values separately.
529 * Starting with the IT8721F, the manual PWM duty cycles are stored
530 * in separate registers (8-bit values), so the separate tracking
531 * is no longer needed, but it is still done to keep the driver
532 * simple.
533 */
534 u8 has_pwm; /* Bitfield, pwm control enabled */
535 u8 pwm_ctrl[NUM_PWM]; /* Register value */
536 u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */
537 u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
538
539 /* Automatic fan speed control registers */
540 u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */
541 s8 auto_temp[NUM_AUTO_PWM][5]; /* [nr][0] is point1_temp_hyst */
542 };
543
544 static int adc_lsb(const struct it87_data *data, int nr)
545 {
546 int lsb;
547
548 if (has_12mv_adc(data))
549 lsb = 120;
550 else if (has_10_9mv_adc(data))
551 lsb = 109;
552 else
553 lsb = 160;
554 if (data->in_scaled & BIT(nr))
555 lsb <<= 1;
556 return lsb;
557 }
558
559 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
560 {
561 val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
562 return clamp_val(val, 0, 255);
563 }
564
565 static int in_from_reg(const struct it87_data *data, int nr, int val)
566 {
567 return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
568 }
569
570 static inline u8 FAN_TO_REG(long rpm, int div)
571 {
572 if (rpm == 0)
573 return 255;
574 rpm = clamp_val(rpm, 1, 1000000);
575 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
576 }
577
578 static inline u16 FAN16_TO_REG(long rpm)
579 {
580 if (rpm == 0)
581 return 0xffff;
582 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
583 }
584
585 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
586 1350000 / ((val) * (div)))
587 /* The divider is fixed to 2 in 16-bit mode */
588 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
589 1350000 / ((val) * 2))
590
591 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
592 ((val) + 500) / 1000), -128, 127))
593 #define TEMP_FROM_REG(val) ((val) * 1000)
594
595 static u8 pwm_to_reg(const struct it87_data *data, long val)
596 {
597 if (has_newer_autopwm(data))
598 return val;
599 else
600 return val >> 1;
601 }
602
603 static int pwm_from_reg(const struct it87_data *data, u8 reg)
604 {
605 if (has_newer_autopwm(data))
606 return reg;
607 else
608 return (reg & 0x7f) << 1;
609 }
610
611 static int DIV_TO_REG(int val)
612 {
613 int answer = 0;
614
615 while (answer < 7 && (val >>= 1))
616 answer++;
617 return answer;
618 }
619
620 #define DIV_FROM_REG(val) BIT(val)
621
622 /*
623 * PWM base frequencies. The frequency has to be divided by either 128 or 256,
624 * depending on the chip type, to calculate the actual PWM frequency.
625 *
626 * Some of the chip datasheets suggest a base frequency of 51 kHz instead
627 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
628 * of 200 Hz. Sometimes both PWM frequency select registers are affected,
629 * sometimes just one. It is unknown if this is a datasheet error or real,
630 * so this is ignored for now.
631 */
632 static const unsigned int pwm_freq[8] = {
633 48000000,
634 24000000,
635 12000000,
636 8000000,
637 6000000,
638 3000000,
639 1500000,
640 750000,
641 };
642
643 /*
644 * Must be called with data->update_lock held, except during initialization.
645 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
646 * would slow down the IT87 access and should not be necessary.
647 */
648 static int it87_read_value(struct it87_data *data, u8 reg)
649 {
650 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
651 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
652 }
653
654 /*
655 * Must be called with data->update_lock held, except during initialization.
656 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
657 * would slow down the IT87 access and should not be necessary.
658 */
659 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
660 {
661 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
662 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
663 }
664
665 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
666 {
667 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
668 if (has_newer_autopwm(data)) {
669 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
670 data->pwm_duty[nr] = it87_read_value(data,
671 IT87_REG_PWM_DUTY[nr]);
672 } else {
673 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
674 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
675 else /* Manual mode */
676 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
677 }
678
679 if (has_old_autopwm(data)) {
680 int i;
681
682 for (i = 0; i < 5 ; i++)
683 data->auto_temp[nr][i] = it87_read_value(data,
684 IT87_REG_AUTO_TEMP(nr, i));
685 for (i = 0; i < 3 ; i++)
686 data->auto_pwm[nr][i] = it87_read_value(data,
687 IT87_REG_AUTO_PWM(nr, i));
688 } else if (has_newer_autopwm(data)) {
689 int i;
690
691 /*
692 * 0: temperature hysteresis (base + 5)
693 * 1: fan off temperature (base + 0)
694 * 2: fan start temperature (base + 1)
695 * 3: fan max temperature (base + 2)
696 */
697 data->auto_temp[nr][0] =
698 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
699
700 for (i = 0; i < 3 ; i++)
701 data->auto_temp[nr][i + 1] =
702 it87_read_value(data,
703 IT87_REG_AUTO_TEMP(nr, i));
704 /*
705 * 0: start pwm value (base + 3)
706 * 1: pwm slope (base + 4, 1/8th pwm)
707 */
708 data->auto_pwm[nr][0] =
709 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
710 data->auto_pwm[nr][1] =
711 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
712 }
713 }
714
715 static struct it87_data *it87_update_device(struct device *dev)
716 {
717 struct it87_data *data = dev_get_drvdata(dev);
718 int i;
719
720 mutex_lock(&data->update_lock);
721
722 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
723 !data->valid) {
724 if (update_vbat) {
725 /*
726 * Cleared after each update, so reenable. Value
727 * returned by this read will be previous value
728 */
729 it87_write_value(data, IT87_REG_CONFIG,
730 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
731 }
732 for (i = 0; i < NUM_VIN; i++) {
733 if (!(data->has_in & BIT(i)))
734 continue;
735
736 data->in[i][0] =
737 it87_read_value(data, IT87_REG_VIN[i]);
738
739 /* VBAT and AVCC don't have limit registers */
740 if (i >= NUM_VIN_LIMIT)
741 continue;
742
743 data->in[i][1] =
744 it87_read_value(data, IT87_REG_VIN_MIN(i));
745 data->in[i][2] =
746 it87_read_value(data, IT87_REG_VIN_MAX(i));
747 }
748
749 for (i = 0; i < NUM_FAN; i++) {
750 /* Skip disabled fans */
751 if (!(data->has_fan & BIT(i)))
752 continue;
753
754 data->fan[i][1] =
755 it87_read_value(data, IT87_REG_FAN_MIN[i]);
756 data->fan[i][0] = it87_read_value(data,
757 IT87_REG_FAN[i]);
758 /* Add high byte if in 16-bit mode */
759 if (has_16bit_fans(data)) {
760 data->fan[i][0] |= it87_read_value(data,
761 IT87_REG_FANX[i]) << 8;
762 data->fan[i][1] |= it87_read_value(data,
763 IT87_REG_FANX_MIN[i]) << 8;
764 }
765 }
766 for (i = 0; i < NUM_TEMP; i++) {
767 if (!(data->has_temp & BIT(i)))
768 continue;
769 data->temp[i][0] =
770 it87_read_value(data, IT87_REG_TEMP(i));
771
772 if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
773 data->temp[i][3] =
774 it87_read_value(data,
775 IT87_REG_TEMP_OFFSET[i]);
776
777 if (i >= NUM_TEMP_LIMIT)
778 continue;
779
780 data->temp[i][1] =
781 it87_read_value(data, IT87_REG_TEMP_LOW(i));
782 data->temp[i][2] =
783 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
784 }
785
786 /* Newer chips don't have clock dividers */
787 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
788 i = it87_read_value(data, IT87_REG_FAN_DIV);
789 data->fan_div[0] = i & 0x07;
790 data->fan_div[1] = (i >> 3) & 0x07;
791 data->fan_div[2] = (i & 0x40) ? 3 : 1;
792 }
793
794 data->alarms =
795 it87_read_value(data, IT87_REG_ALARM1) |
796 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
797 (it87_read_value(data, IT87_REG_ALARM3) << 16);
798 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
799
800 data->fan_main_ctrl = it87_read_value(data,
801 IT87_REG_FAN_MAIN_CTRL);
802 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
803 for (i = 0; i < NUM_PWM; i++) {
804 if (!(data->has_pwm & BIT(i)))
805 continue;
806 it87_update_pwm_ctrl(data, i);
807 }
808
809 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
810 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
811 /*
812 * The IT8705F does not have VID capability.
813 * The IT8718F and later don't use IT87_REG_VID for the
814 * same purpose.
815 */
816 if (data->type == it8712 || data->type == it8716) {
817 data->vid = it87_read_value(data, IT87_REG_VID);
818 /*
819 * The older IT8712F revisions had only 5 VID pins,
820 * but we assume it is always safe to read 6 bits.
821 */
822 data->vid &= 0x3f;
823 }
824 data->last_updated = jiffies;
825 data->valid = 1;
826 }
827
828 mutex_unlock(&data->update_lock);
829
830 return data;
831 }
832
833 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
834 char *buf)
835 {
836 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
837 struct it87_data *data = it87_update_device(dev);
838 int index = sattr->index;
839 int nr = sattr->nr;
840
841 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
842 }
843
844 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
845 const char *buf, size_t count)
846 {
847 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
848 struct it87_data *data = dev_get_drvdata(dev);
849 int index = sattr->index;
850 int nr = sattr->nr;
851 unsigned long val;
852
853 if (kstrtoul(buf, 10, &val) < 0)
854 return -EINVAL;
855
856 mutex_lock(&data->update_lock);
857 data->in[nr][index] = in_to_reg(data, nr, val);
858 it87_write_value(data,
859 index == 1 ? IT87_REG_VIN_MIN(nr)
860 : IT87_REG_VIN_MAX(nr),
861 data->in[nr][index]);
862 mutex_unlock(&data->update_lock);
863 return count;
864 }
865
866 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
867 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
868 0, 1);
869 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
870 0, 2);
871
872 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
873 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
874 1, 1);
875 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
876 1, 2);
877
878 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
879 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
880 2, 1);
881 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
882 2, 2);
883
884 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
885 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
886 3, 1);
887 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
888 3, 2);
889
890 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
891 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
892 4, 1);
893 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
894 4, 2);
895
896 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
897 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
898 5, 1);
899 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
900 5, 2);
901
902 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
903 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
904 6, 1);
905 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
906 6, 2);
907
908 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
909 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
910 7, 1);
911 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
912 7, 2);
913
914 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
915 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
916 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
917 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
918 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
919
920 /* Up to 6 temperatures */
921 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
922 char *buf)
923 {
924 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
925 int nr = sattr->nr;
926 int index = sattr->index;
927 struct it87_data *data = it87_update_device(dev);
928
929 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
930 }
931
932 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
933 const char *buf, size_t count)
934 {
935 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
936 int nr = sattr->nr;
937 int index = sattr->index;
938 struct it87_data *data = dev_get_drvdata(dev);
939 long val;
940 u8 reg, regval;
941
942 if (kstrtol(buf, 10, &val) < 0)
943 return -EINVAL;
944
945 mutex_lock(&data->update_lock);
946
947 switch (index) {
948 default:
949 case 1:
950 reg = IT87_REG_TEMP_LOW(nr);
951 break;
952 case 2:
953 reg = IT87_REG_TEMP_HIGH(nr);
954 break;
955 case 3:
956 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
957 if (!(regval & 0x80)) {
958 regval |= 0x80;
959 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
960 }
961 data->valid = 0;
962 reg = IT87_REG_TEMP_OFFSET[nr];
963 break;
964 }
965
966 data->temp[nr][index] = TEMP_TO_REG(val);
967 it87_write_value(data, reg, data->temp[nr][index]);
968 mutex_unlock(&data->update_lock);
969 return count;
970 }
971
972 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
973 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
974 0, 1);
975 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
976 0, 2);
977 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
978 set_temp, 0, 3);
979 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
980 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
981 1, 1);
982 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
983 1, 2);
984 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
985 set_temp, 1, 3);
986 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
987 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
988 2, 1);
989 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
990 2, 2);
991 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
992 set_temp, 2, 3);
993 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
994 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
995 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
996
997 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
998 char *buf)
999 {
1000 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1001 int nr = sensor_attr->index;
1002 struct it87_data *data = it87_update_device(dev);
1003 u8 reg = data->sensor; /* In case value is updated while used */
1004 u8 extra = data->extra;
1005
1006 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1007 (has_temp_old_peci(data, nr) && (extra & 0x80)))
1008 return sprintf(buf, "6\n"); /* Intel PECI */
1009 if (reg & (1 << nr))
1010 return sprintf(buf, "3\n"); /* thermal diode */
1011 if (reg & (8 << nr))
1012 return sprintf(buf, "4\n"); /* thermistor */
1013 return sprintf(buf, "0\n"); /* disabled */
1014 }
1015
1016 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1017 const char *buf, size_t count)
1018 {
1019 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1020 int nr = sensor_attr->index;
1021
1022 struct it87_data *data = dev_get_drvdata(dev);
1023 long val;
1024 u8 reg, extra;
1025
1026 if (kstrtol(buf, 10, &val) < 0)
1027 return -EINVAL;
1028
1029 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1030 reg &= ~(1 << nr);
1031 reg &= ~(8 << nr);
1032 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1033 reg &= 0x3f;
1034 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1035 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1036 extra &= 0x7f;
1037 if (val == 2) { /* backwards compatibility */
1038 dev_warn(dev,
1039 "Sensor type 2 is deprecated, please use 4 instead\n");
1040 val = 4;
1041 }
1042 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1043 if (val == 3)
1044 reg |= 1 << nr;
1045 else if (val == 4)
1046 reg |= 8 << nr;
1047 else if (has_temp_peci(data, nr) && val == 6)
1048 reg |= (nr + 1) << 6;
1049 else if (has_temp_old_peci(data, nr) && val == 6)
1050 extra |= 0x80;
1051 else if (val != 0)
1052 return -EINVAL;
1053
1054 mutex_lock(&data->update_lock);
1055 data->sensor = reg;
1056 data->extra = extra;
1057 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1058 if (has_temp_old_peci(data, nr))
1059 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1060 data->valid = 0; /* Force cache refresh */
1061 mutex_unlock(&data->update_lock);
1062 return count;
1063 }
1064
1065 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1066 set_temp_type, 0);
1067 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1068 set_temp_type, 1);
1069 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1070 set_temp_type, 2);
1071
1072 /* 6 Fans */
1073
1074 static int pwm_mode(const struct it87_data *data, int nr)
1075 {
1076 if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1077 return 0; /* Full speed */
1078 if (data->pwm_ctrl[nr] & 0x80)
1079 return 2; /* Automatic mode */
1080 if ((data->type == it8603 || nr >= 3) &&
1081 data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1082 return 0; /* Full speed */
1083
1084 return 1; /* Manual mode */
1085 }
1086
1087 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1088 char *buf)
1089 {
1090 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1091 int nr = sattr->nr;
1092 int index = sattr->index;
1093 int speed;
1094 struct it87_data *data = it87_update_device(dev);
1095
1096 speed = has_16bit_fans(data) ?
1097 FAN16_FROM_REG(data->fan[nr][index]) :
1098 FAN_FROM_REG(data->fan[nr][index],
1099 DIV_FROM_REG(data->fan_div[nr]));
1100 return sprintf(buf, "%d\n", speed);
1101 }
1102
1103 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1104 char *buf)
1105 {
1106 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1107 struct it87_data *data = it87_update_device(dev);
1108 int nr = sensor_attr->index;
1109
1110 return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1111 }
1112
1113 static ssize_t show_pwm_enable(struct device *dev,
1114 struct device_attribute *attr, char *buf)
1115 {
1116 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1117 struct it87_data *data = it87_update_device(dev);
1118 int nr = sensor_attr->index;
1119
1120 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1121 }
1122
1123 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1124 char *buf)
1125 {
1126 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1127 struct it87_data *data = it87_update_device(dev);
1128 int nr = sensor_attr->index;
1129
1130 return sprintf(buf, "%d\n",
1131 pwm_from_reg(data, data->pwm_duty[nr]));
1132 }
1133
1134 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1135 char *buf)
1136 {
1137 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1138 struct it87_data *data = it87_update_device(dev);
1139 int nr = sensor_attr->index;
1140 unsigned int freq;
1141 int index;
1142
1143 if (has_pwm_freq2(data) && nr == 1)
1144 index = (data->extra >> 4) & 0x07;
1145 else
1146 index = (data->fan_ctl >> 4) & 0x07;
1147
1148 freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1149
1150 return sprintf(buf, "%u\n", freq);
1151 }
1152
1153 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1154 const char *buf, size_t count)
1155 {
1156 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1157 int nr = sattr->nr;
1158 int index = sattr->index;
1159
1160 struct it87_data *data = dev_get_drvdata(dev);
1161 long val;
1162 u8 reg;
1163
1164 if (kstrtol(buf, 10, &val) < 0)
1165 return -EINVAL;
1166
1167 mutex_lock(&data->update_lock);
1168
1169 if (has_16bit_fans(data)) {
1170 data->fan[nr][index] = FAN16_TO_REG(val);
1171 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1172 data->fan[nr][index] & 0xff);
1173 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1174 data->fan[nr][index] >> 8);
1175 } else {
1176 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1177 switch (nr) {
1178 case 0:
1179 data->fan_div[nr] = reg & 0x07;
1180 break;
1181 case 1:
1182 data->fan_div[nr] = (reg >> 3) & 0x07;
1183 break;
1184 case 2:
1185 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1186 break;
1187 }
1188 data->fan[nr][index] =
1189 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1190 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1191 data->fan[nr][index]);
1192 }
1193
1194 mutex_unlock(&data->update_lock);
1195 return count;
1196 }
1197
1198 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1199 const char *buf, size_t count)
1200 {
1201 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1202 struct it87_data *data = dev_get_drvdata(dev);
1203 int nr = sensor_attr->index;
1204 unsigned long val;
1205 int min;
1206 u8 old;
1207
1208 if (kstrtoul(buf, 10, &val) < 0)
1209 return -EINVAL;
1210
1211 mutex_lock(&data->update_lock);
1212 old = it87_read_value(data, IT87_REG_FAN_DIV);
1213
1214 /* Save fan min limit */
1215 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1216
1217 switch (nr) {
1218 case 0:
1219 case 1:
1220 data->fan_div[nr] = DIV_TO_REG(val);
1221 break;
1222 case 2:
1223 if (val < 8)
1224 data->fan_div[nr] = 1;
1225 else
1226 data->fan_div[nr] = 3;
1227 }
1228 val = old & 0x80;
1229 val |= (data->fan_div[0] & 0x07);
1230 val |= (data->fan_div[1] & 0x07) << 3;
1231 if (data->fan_div[2] == 3)
1232 val |= 0x1 << 6;
1233 it87_write_value(data, IT87_REG_FAN_DIV, val);
1234
1235 /* Restore fan min limit */
1236 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1237 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1238
1239 mutex_unlock(&data->update_lock);
1240 return count;
1241 }
1242
1243 /* Returns 0 if OK, -EINVAL otherwise */
1244 static int check_trip_points(struct device *dev, int nr)
1245 {
1246 const struct it87_data *data = dev_get_drvdata(dev);
1247 int i, err = 0;
1248
1249 if (has_old_autopwm(data)) {
1250 for (i = 0; i < 3; i++) {
1251 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1252 err = -EINVAL;
1253 }
1254 for (i = 0; i < 2; i++) {
1255 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1256 err = -EINVAL;
1257 }
1258 } else if (has_newer_autopwm(data)) {
1259 for (i = 1; i < 3; i++) {
1260 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1261 err = -EINVAL;
1262 }
1263 }
1264
1265 if (err) {
1266 dev_err(dev,
1267 "Inconsistent trip points, not switching to automatic mode\n");
1268 dev_err(dev, "Adjust the trip points and try again\n");
1269 }
1270 return err;
1271 }
1272
1273 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1274 const char *buf, size_t count)
1275 {
1276 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1277 struct it87_data *data = dev_get_drvdata(dev);
1278 int nr = sensor_attr->index;
1279 long val;
1280
1281 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1282 return -EINVAL;
1283
1284 /* Check trip points before switching to automatic mode */
1285 if (val == 2) {
1286 if (check_trip_points(dev, nr) < 0)
1287 return -EINVAL;
1288 }
1289
1290 mutex_lock(&data->update_lock);
1291
1292 if (val == 0) {
1293 if (nr < 3 && data->type != it8603) {
1294 int tmp;
1295 /* make sure the fan is on when in on/off mode */
1296 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1297 it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1298 /* set on/off mode */
1299 data->fan_main_ctrl &= ~BIT(nr);
1300 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1301 data->fan_main_ctrl);
1302 } else {
1303 /* No on/off mode, set maximum pwm value */
1304 data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1305 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1306 data->pwm_duty[nr]);
1307 /* and set manual mode */
1308 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1309 data->pwm_temp_map[nr] :
1310 data->pwm_duty[nr];
1311 it87_write_value(data, IT87_REG_PWM[nr],
1312 data->pwm_ctrl[nr]);
1313 }
1314 } else {
1315 if (val == 1) /* Manual mode */
1316 data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1317 data->pwm_temp_map[nr] :
1318 data->pwm_duty[nr];
1319 else /* Automatic mode */
1320 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1321 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1322
1323 if (data->type != it8603 && nr < 3) {
1324 /* set SmartGuardian mode */
1325 data->fan_main_ctrl |= BIT(nr);
1326 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1327 data->fan_main_ctrl);
1328 }
1329 }
1330
1331 mutex_unlock(&data->update_lock);
1332 return count;
1333 }
1334
1335 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1336 const char *buf, size_t count)
1337 {
1338 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1339 struct it87_data *data = dev_get_drvdata(dev);
1340 int nr = sensor_attr->index;
1341 long val;
1342
1343 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1344 return -EINVAL;
1345
1346 mutex_lock(&data->update_lock);
1347 if (has_newer_autopwm(data)) {
1348 /*
1349 * If we are in automatic mode, the PWM duty cycle register
1350 * is read-only so we can't write the value.
1351 */
1352 if (data->pwm_ctrl[nr] & 0x80) {
1353 mutex_unlock(&data->update_lock);
1354 return -EBUSY;
1355 }
1356 data->pwm_duty[nr] = pwm_to_reg(data, val);
1357 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1358 data->pwm_duty[nr]);
1359 } else {
1360 data->pwm_duty[nr] = pwm_to_reg(data, val);
1361 /*
1362 * If we are in manual mode, write the duty cycle immediately;
1363 * otherwise, just store it for later use.
1364 */
1365 if (!(data->pwm_ctrl[nr] & 0x80)) {
1366 data->pwm_ctrl[nr] = data->pwm_duty[nr];
1367 it87_write_value(data, IT87_REG_PWM[nr],
1368 data->pwm_ctrl[nr]);
1369 }
1370 }
1371 mutex_unlock(&data->update_lock);
1372 return count;
1373 }
1374
1375 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1376 const char *buf, size_t count)
1377 {
1378 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1379 struct it87_data *data = dev_get_drvdata(dev);
1380 int nr = sensor_attr->index;
1381 unsigned long val;
1382 int i;
1383
1384 if (kstrtoul(buf, 10, &val) < 0)
1385 return -EINVAL;
1386
1387 val = clamp_val(val, 0, 1000000);
1388 val *= has_newer_autopwm(data) ? 256 : 128;
1389
1390 /* Search for the nearest available frequency */
1391 for (i = 0; i < 7; i++) {
1392 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1393 break;
1394 }
1395
1396 mutex_lock(&data->update_lock);
1397 if (nr == 0) {
1398 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1399 data->fan_ctl |= i << 4;
1400 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1401 } else {
1402 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1403 data->extra |= i << 4;
1404 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1405 }
1406 mutex_unlock(&data->update_lock);
1407
1408 return count;
1409 }
1410
1411 static ssize_t show_pwm_temp_map(struct device *dev,
1412 struct device_attribute *attr, char *buf)
1413 {
1414 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1415 struct it87_data *data = it87_update_device(dev);
1416 int nr = sensor_attr->index;
1417 int map;
1418
1419 map = data->pwm_temp_map[nr];
1420 if (map >= 3)
1421 map = 0; /* Should never happen */
1422 if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */
1423 map += 3;
1424
1425 return sprintf(buf, "%d\n", (int)BIT(map));
1426 }
1427
1428 static ssize_t set_pwm_temp_map(struct device *dev,
1429 struct device_attribute *attr, const char *buf,
1430 size_t count)
1431 {
1432 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1433 struct it87_data *data = dev_get_drvdata(dev);
1434 int nr = sensor_attr->index;
1435 long val;
1436 u8 reg;
1437
1438 if (kstrtol(buf, 10, &val) < 0)
1439 return -EINVAL;
1440
1441 if (nr >= 3)
1442 val -= 3;
1443
1444 switch (val) {
1445 case BIT(0):
1446 reg = 0x00;
1447 break;
1448 case BIT(1):
1449 reg = 0x01;
1450 break;
1451 case BIT(2):
1452 reg = 0x02;
1453 break;
1454 default:
1455 return -EINVAL;
1456 }
1457
1458 mutex_lock(&data->update_lock);
1459 data->pwm_temp_map[nr] = reg;
1460 /*
1461 * If we are in automatic mode, write the temp mapping immediately;
1462 * otherwise, just store it for later use.
1463 */
1464 if (data->pwm_ctrl[nr] & 0x80) {
1465 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1466 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1467 }
1468 mutex_unlock(&data->update_lock);
1469 return count;
1470 }
1471
1472 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1473 char *buf)
1474 {
1475 struct it87_data *data = it87_update_device(dev);
1476 struct sensor_device_attribute_2 *sensor_attr =
1477 to_sensor_dev_attr_2(attr);
1478 int nr = sensor_attr->nr;
1479 int point = sensor_attr->index;
1480
1481 return sprintf(buf, "%d\n",
1482 pwm_from_reg(data, data->auto_pwm[nr][point]));
1483 }
1484
1485 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1486 const char *buf, size_t count)
1487 {
1488 struct it87_data *data = dev_get_drvdata(dev);
1489 struct sensor_device_attribute_2 *sensor_attr =
1490 to_sensor_dev_attr_2(attr);
1491 int nr = sensor_attr->nr;
1492 int point = sensor_attr->index;
1493 int regaddr;
1494 long val;
1495
1496 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1497 return -EINVAL;
1498
1499 mutex_lock(&data->update_lock);
1500 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1501 if (has_newer_autopwm(data))
1502 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1503 else
1504 regaddr = IT87_REG_AUTO_PWM(nr, point);
1505 it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1506 mutex_unlock(&data->update_lock);
1507 return count;
1508 }
1509
1510 static ssize_t show_auto_pwm_slope(struct device *dev,
1511 struct device_attribute *attr, char *buf)
1512 {
1513 struct it87_data *data = it87_update_device(dev);
1514 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1515 int nr = sensor_attr->index;
1516
1517 return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1518 }
1519
1520 static ssize_t set_auto_pwm_slope(struct device *dev,
1521 struct device_attribute *attr,
1522 const char *buf, size_t count)
1523 {
1524 struct it87_data *data = dev_get_drvdata(dev);
1525 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1526 int nr = sensor_attr->index;
1527 unsigned long val;
1528
1529 if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1530 return -EINVAL;
1531
1532 mutex_lock(&data->update_lock);
1533 data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1534 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1535 data->auto_pwm[nr][1]);
1536 mutex_unlock(&data->update_lock);
1537 return count;
1538 }
1539
1540 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1541 char *buf)
1542 {
1543 struct it87_data *data = it87_update_device(dev);
1544 struct sensor_device_attribute_2 *sensor_attr =
1545 to_sensor_dev_attr_2(attr);
1546 int nr = sensor_attr->nr;
1547 int point = sensor_attr->index;
1548 int reg;
1549
1550 if (has_old_autopwm(data) || point)
1551 reg = data->auto_temp[nr][point];
1552 else
1553 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1554
1555 return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1556 }
1557
1558 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1559 const char *buf, size_t count)
1560 {
1561 struct it87_data *data = dev_get_drvdata(dev);
1562 struct sensor_device_attribute_2 *sensor_attr =
1563 to_sensor_dev_attr_2(attr);
1564 int nr = sensor_attr->nr;
1565 int point = sensor_attr->index;
1566 long val;
1567 int reg;
1568
1569 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1570 return -EINVAL;
1571
1572 mutex_lock(&data->update_lock);
1573 if (has_newer_autopwm(data) && !point) {
1574 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1575 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1576 data->auto_temp[nr][0] = reg;
1577 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1578 } else {
1579 reg = TEMP_TO_REG(val);
1580 data->auto_temp[nr][point] = reg;
1581 if (has_newer_autopwm(data))
1582 point--;
1583 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1584 }
1585 mutex_unlock(&data->update_lock);
1586 return count;
1587 }
1588
1589 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1590 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1591 0, 1);
1592 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1593 set_fan_div, 0);
1594
1595 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1596 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1597 1, 1);
1598 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1599 set_fan_div, 1);
1600
1601 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1602 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1603 2, 1);
1604 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1605 set_fan_div, 2);
1606
1607 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1608 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1609 3, 1);
1610
1611 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1612 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1613 4, 1);
1614
1615 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1616 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1617 5, 1);
1618
1619 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1620 show_pwm_enable, set_pwm_enable, 0);
1621 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1622 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1623 set_pwm_freq, 0);
1624 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1625 show_pwm_temp_map, set_pwm_temp_map, 0);
1626 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1627 show_auto_pwm, set_auto_pwm, 0, 0);
1628 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1629 show_auto_pwm, set_auto_pwm, 0, 1);
1630 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1631 show_auto_pwm, set_auto_pwm, 0, 2);
1632 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1633 show_auto_pwm, NULL, 0, 3);
1634 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1635 show_auto_temp, set_auto_temp, 0, 1);
1636 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1637 show_auto_temp, set_auto_temp, 0, 0);
1638 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1639 show_auto_temp, set_auto_temp, 0, 2);
1640 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1641 show_auto_temp, set_auto_temp, 0, 3);
1642 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1643 show_auto_temp, set_auto_temp, 0, 4);
1644 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1645 show_auto_pwm, set_auto_pwm, 0, 0);
1646 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1647 show_auto_pwm_slope, set_auto_pwm_slope, 0);
1648
1649 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1650 show_pwm_enable, set_pwm_enable, 1);
1651 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1652 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1653 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1654 show_pwm_temp_map, set_pwm_temp_map, 1);
1655 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1656 show_auto_pwm, set_auto_pwm, 1, 0);
1657 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1658 show_auto_pwm, set_auto_pwm, 1, 1);
1659 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1660 show_auto_pwm, set_auto_pwm, 1, 2);
1661 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1662 show_auto_pwm, NULL, 1, 3);
1663 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1664 show_auto_temp, set_auto_temp, 1, 1);
1665 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1666 show_auto_temp, set_auto_temp, 1, 0);
1667 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1668 show_auto_temp, set_auto_temp, 1, 2);
1669 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1670 show_auto_temp, set_auto_temp, 1, 3);
1671 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1672 show_auto_temp, set_auto_temp, 1, 4);
1673 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1674 show_auto_pwm, set_auto_pwm, 1, 0);
1675 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1676 show_auto_pwm_slope, set_auto_pwm_slope, 1);
1677
1678 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1679 show_pwm_enable, set_pwm_enable, 2);
1680 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1681 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1682 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1683 show_pwm_temp_map, set_pwm_temp_map, 2);
1684 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1685 show_auto_pwm, set_auto_pwm, 2, 0);
1686 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1687 show_auto_pwm, set_auto_pwm, 2, 1);
1688 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1689 show_auto_pwm, set_auto_pwm, 2, 2);
1690 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1691 show_auto_pwm, NULL, 2, 3);
1692 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1693 show_auto_temp, set_auto_temp, 2, 1);
1694 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1695 show_auto_temp, set_auto_temp, 2, 0);
1696 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1697 show_auto_temp, set_auto_temp, 2, 2);
1698 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1699 show_auto_temp, set_auto_temp, 2, 3);
1700 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1701 show_auto_temp, set_auto_temp, 2, 4);
1702 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1703 show_auto_pwm, set_auto_pwm, 2, 0);
1704 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1705 show_auto_pwm_slope, set_auto_pwm_slope, 2);
1706
1707 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1708 show_pwm_enable, set_pwm_enable, 3);
1709 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1710 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1711 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1712 show_pwm_temp_map, set_pwm_temp_map, 3);
1713 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1714 show_auto_temp, set_auto_temp, 2, 1);
1715 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1716 show_auto_temp, set_auto_temp, 2, 0);
1717 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1718 show_auto_temp, set_auto_temp, 2, 2);
1719 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1720 show_auto_temp, set_auto_temp, 2, 3);
1721 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1722 show_auto_pwm, set_auto_pwm, 3, 0);
1723 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1724 show_auto_pwm_slope, set_auto_pwm_slope, 3);
1725
1726 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1727 show_pwm_enable, set_pwm_enable, 4);
1728 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1729 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1730 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1731 show_pwm_temp_map, set_pwm_temp_map, 4);
1732 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1733 show_auto_temp, set_auto_temp, 2, 1);
1734 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1735 show_auto_temp, set_auto_temp, 2, 0);
1736 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1737 show_auto_temp, set_auto_temp, 2, 2);
1738 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1739 show_auto_temp, set_auto_temp, 2, 3);
1740 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1741 show_auto_pwm, set_auto_pwm, 4, 0);
1742 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1743 show_auto_pwm_slope, set_auto_pwm_slope, 4);
1744
1745 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1746 show_pwm_enable, set_pwm_enable, 5);
1747 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1748 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1749 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1750 show_pwm_temp_map, set_pwm_temp_map, 5);
1751 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1752 show_auto_temp, set_auto_temp, 2, 1);
1753 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1754 show_auto_temp, set_auto_temp, 2, 0);
1755 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1756 show_auto_temp, set_auto_temp, 2, 2);
1757 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1758 show_auto_temp, set_auto_temp, 2, 3);
1759 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1760 show_auto_pwm, set_auto_pwm, 5, 0);
1761 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1762 show_auto_pwm_slope, set_auto_pwm_slope, 5);
1763
1764 /* Alarms */
1765 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1766 char *buf)
1767 {
1768 struct it87_data *data = it87_update_device(dev);
1769
1770 return sprintf(buf, "%u\n", data->alarms);
1771 }
1772 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1773
1774 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1775 char *buf)
1776 {
1777 struct it87_data *data = it87_update_device(dev);
1778 int bitnr = to_sensor_dev_attr(attr)->index;
1779
1780 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1781 }
1782
1783 static ssize_t clear_intrusion(struct device *dev,
1784 struct device_attribute *attr, const char *buf,
1785 size_t count)
1786 {
1787 struct it87_data *data = dev_get_drvdata(dev);
1788 int config;
1789 long val;
1790
1791 if (kstrtol(buf, 10, &val) < 0 || val != 0)
1792 return -EINVAL;
1793
1794 mutex_lock(&data->update_lock);
1795 config = it87_read_value(data, IT87_REG_CONFIG);
1796 if (config < 0) {
1797 count = config;
1798 } else {
1799 config |= BIT(5);
1800 it87_write_value(data, IT87_REG_CONFIG, config);
1801 /* Invalidate cache to force re-read */
1802 data->valid = 0;
1803 }
1804 mutex_unlock(&data->update_lock);
1805
1806 return count;
1807 }
1808
1809 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1810 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1811 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1812 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1813 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1814 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1815 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1816 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1817 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1818 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1819 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1820 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1821 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1822 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1823 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1824 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1825 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1826 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1827 show_alarm, clear_intrusion, 4);
1828
1829 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1830 char *buf)
1831 {
1832 struct it87_data *data = it87_update_device(dev);
1833 int bitnr = to_sensor_dev_attr(attr)->index;
1834
1835 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1836 }
1837
1838 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1839 const char *buf, size_t count)
1840 {
1841 int bitnr = to_sensor_dev_attr(attr)->index;
1842 struct it87_data *data = dev_get_drvdata(dev);
1843 long val;
1844
1845 if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1846 return -EINVAL;
1847
1848 mutex_lock(&data->update_lock);
1849 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1850 if (val)
1851 data->beeps |= BIT(bitnr);
1852 else
1853 data->beeps &= ~BIT(bitnr);
1854 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1855 mutex_unlock(&data->update_lock);
1856 return count;
1857 }
1858
1859 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1860 show_beep, set_beep, 1);
1861 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1862 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1863 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1864 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1865 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1866 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1867 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1868 /* fanX_beep writability is set later */
1869 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1870 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1871 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1872 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1873 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1874 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1875 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1876 show_beep, set_beep, 2);
1877 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1878 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1879
1880 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1881 char *buf)
1882 {
1883 struct it87_data *data = dev_get_drvdata(dev);
1884
1885 return sprintf(buf, "%u\n", data->vrm);
1886 }
1887
1888 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1889 const char *buf, size_t count)
1890 {
1891 struct it87_data *data = dev_get_drvdata(dev);
1892 unsigned long val;
1893
1894 if (kstrtoul(buf, 10, &val) < 0)
1895 return -EINVAL;
1896
1897 data->vrm = val;
1898
1899 return count;
1900 }
1901 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1902
1903 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1904 char *buf)
1905 {
1906 struct it87_data *data = it87_update_device(dev);
1907
1908 return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1909 }
1910 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1911
1912 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1913 char *buf)
1914 {
1915 static const char * const labels[] = {
1916 "+5V",
1917 "5VSB",
1918 "Vbat",
1919 };
1920 static const char * const labels_it8721[] = {
1921 "+3.3V",
1922 "3VSB",
1923 "Vbat",
1924 };
1925 struct it87_data *data = dev_get_drvdata(dev);
1926 int nr = to_sensor_dev_attr(attr)->index;
1927 const char *label;
1928
1929 if (has_12mv_adc(data) || has_10_9mv_adc(data))
1930 label = labels_it8721[nr];
1931 else
1932 label = labels[nr];
1933
1934 return sprintf(buf, "%s\n", label);
1935 }
1936 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1937 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1938 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1939 /* AVCC3 */
1940 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0);
1941
1942 static umode_t it87_in_is_visible(struct kobject *kobj,
1943 struct attribute *attr, int index)
1944 {
1945 struct device *dev = container_of(kobj, struct device, kobj);
1946 struct it87_data *data = dev_get_drvdata(dev);
1947 int i = index / 5; /* voltage index */
1948 int a = index % 5; /* attribute index */
1949
1950 if (index >= 40) { /* in8 and higher only have input attributes */
1951 i = index - 40 + 8;
1952 a = 0;
1953 }
1954
1955 if (!(data->has_in & BIT(i)))
1956 return 0;
1957
1958 if (a == 4 && !data->has_beep)
1959 return 0;
1960
1961 return attr->mode;
1962 }
1963
1964 static struct attribute *it87_attributes_in[] = {
1965 &sensor_dev_attr_in0_input.dev_attr.attr,
1966 &sensor_dev_attr_in0_min.dev_attr.attr,
1967 &sensor_dev_attr_in0_max.dev_attr.attr,
1968 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1969 &sensor_dev_attr_in0_beep.dev_attr.attr, /* 4 */
1970
1971 &sensor_dev_attr_in1_input.dev_attr.attr,
1972 &sensor_dev_attr_in1_min.dev_attr.attr,
1973 &sensor_dev_attr_in1_max.dev_attr.attr,
1974 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1975 &sensor_dev_attr_in1_beep.dev_attr.attr, /* 9 */
1976
1977 &sensor_dev_attr_in2_input.dev_attr.attr,
1978 &sensor_dev_attr_in2_min.dev_attr.attr,
1979 &sensor_dev_attr_in2_max.dev_attr.attr,
1980 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1981 &sensor_dev_attr_in2_beep.dev_attr.attr, /* 14 */
1982
1983 &sensor_dev_attr_in3_input.dev_attr.attr,
1984 &sensor_dev_attr_in3_min.dev_attr.attr,
1985 &sensor_dev_attr_in3_max.dev_attr.attr,
1986 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1987 &sensor_dev_attr_in3_beep.dev_attr.attr, /* 19 */
1988
1989 &sensor_dev_attr_in4_input.dev_attr.attr,
1990 &sensor_dev_attr_in4_min.dev_attr.attr,
1991 &sensor_dev_attr_in4_max.dev_attr.attr,
1992 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1993 &sensor_dev_attr_in4_beep.dev_attr.attr, /* 24 */
1994
1995 &sensor_dev_attr_in5_input.dev_attr.attr,
1996 &sensor_dev_attr_in5_min.dev_attr.attr,
1997 &sensor_dev_attr_in5_max.dev_attr.attr,
1998 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1999 &sensor_dev_attr_in5_beep.dev_attr.attr, /* 29 */
2000
2001 &sensor_dev_attr_in6_input.dev_attr.attr,
2002 &sensor_dev_attr_in6_min.dev_attr.attr,
2003 &sensor_dev_attr_in6_max.dev_attr.attr,
2004 &sensor_dev_attr_in6_alarm.dev_attr.attr,
2005 &sensor_dev_attr_in6_beep.dev_attr.attr, /* 34 */
2006
2007 &sensor_dev_attr_in7_input.dev_attr.attr,
2008 &sensor_dev_attr_in7_min.dev_attr.attr,
2009 &sensor_dev_attr_in7_max.dev_attr.attr,
2010 &sensor_dev_attr_in7_alarm.dev_attr.attr,
2011 &sensor_dev_attr_in7_beep.dev_attr.attr, /* 39 */
2012
2013 &sensor_dev_attr_in8_input.dev_attr.attr, /* 40 */
2014 &sensor_dev_attr_in9_input.dev_attr.attr,
2015 &sensor_dev_attr_in10_input.dev_attr.attr,
2016 &sensor_dev_attr_in11_input.dev_attr.attr,
2017 &sensor_dev_attr_in12_input.dev_attr.attr,
2018 NULL
2019 };
2020
2021 static const struct attribute_group it87_group_in = {
2022 .attrs = it87_attributes_in,
2023 .is_visible = it87_in_is_visible,
2024 };
2025
2026 static umode_t it87_temp_is_visible(struct kobject *kobj,
2027 struct attribute *attr, int index)
2028 {
2029 struct device *dev = container_of(kobj, struct device, kobj);
2030 struct it87_data *data = dev_get_drvdata(dev);
2031 int i = index / 7; /* temperature index */
2032 int a = index % 7; /* attribute index */
2033
2034 if (index >= 21) {
2035 i = index - 21 + 3;
2036 a = 0;
2037 }
2038
2039 if (!(data->has_temp & BIT(i)))
2040 return 0;
2041
2042 if (a == 5 && !has_temp_offset(data))
2043 return 0;
2044
2045 if (a == 6 && !data->has_beep)
2046 return 0;
2047
2048 return attr->mode;
2049 }
2050
2051 static struct attribute *it87_attributes_temp[] = {
2052 &sensor_dev_attr_temp1_input.dev_attr.attr,
2053 &sensor_dev_attr_temp1_max.dev_attr.attr,
2054 &sensor_dev_attr_temp1_min.dev_attr.attr,
2055 &sensor_dev_attr_temp1_type.dev_attr.attr,
2056 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2057 &sensor_dev_attr_temp1_offset.dev_attr.attr, /* 5 */
2058 &sensor_dev_attr_temp1_beep.dev_attr.attr, /* 6 */
2059
2060 &sensor_dev_attr_temp2_input.dev_attr.attr, /* 7 */
2061 &sensor_dev_attr_temp2_max.dev_attr.attr,
2062 &sensor_dev_attr_temp2_min.dev_attr.attr,
2063 &sensor_dev_attr_temp2_type.dev_attr.attr,
2064 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2065 &sensor_dev_attr_temp2_offset.dev_attr.attr,
2066 &sensor_dev_attr_temp2_beep.dev_attr.attr,
2067
2068 &sensor_dev_attr_temp3_input.dev_attr.attr, /* 14 */
2069 &sensor_dev_attr_temp3_max.dev_attr.attr,
2070 &sensor_dev_attr_temp3_min.dev_attr.attr,
2071 &sensor_dev_attr_temp3_type.dev_attr.attr,
2072 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2073 &sensor_dev_attr_temp3_offset.dev_attr.attr,
2074 &sensor_dev_attr_temp3_beep.dev_attr.attr,
2075
2076 &sensor_dev_attr_temp4_input.dev_attr.attr, /* 21 */
2077 &sensor_dev_attr_temp5_input.dev_attr.attr,
2078 &sensor_dev_attr_temp6_input.dev_attr.attr,
2079 NULL
2080 };
2081
2082 static const struct attribute_group it87_group_temp = {
2083 .attrs = it87_attributes_temp,
2084 .is_visible = it87_temp_is_visible,
2085 };
2086
2087 static umode_t it87_is_visible(struct kobject *kobj,
2088 struct attribute *attr, int index)
2089 {
2090 struct device *dev = container_of(kobj, struct device, kobj);
2091 struct it87_data *data = dev_get_drvdata(dev);
2092
2093 if ((index == 2 || index == 3) && !data->has_vid)
2094 return 0;
2095
2096 if (index > 3 && !(data->in_internal & BIT(index - 4)))
2097 return 0;
2098
2099 return attr->mode;
2100 }
2101
2102 static struct attribute *it87_attributes[] = {
2103 &dev_attr_alarms.attr,
2104 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2105 &dev_attr_vrm.attr, /* 2 */
2106 &dev_attr_cpu0_vid.attr, /* 3 */
2107 &sensor_dev_attr_in3_label.dev_attr.attr, /* 4 .. 7 */
2108 &sensor_dev_attr_in7_label.dev_attr.attr,
2109 &sensor_dev_attr_in8_label.dev_attr.attr,
2110 &sensor_dev_attr_in9_label.dev_attr.attr,
2111 NULL
2112 };
2113
2114 static const struct attribute_group it87_group = {
2115 .attrs = it87_attributes,
2116 .is_visible = it87_is_visible,
2117 };
2118
2119 static umode_t it87_fan_is_visible(struct kobject *kobj,
2120 struct attribute *attr, int index)
2121 {
2122 struct device *dev = container_of(kobj, struct device, kobj);
2123 struct it87_data *data = dev_get_drvdata(dev);
2124 int i = index / 5; /* fan index */
2125 int a = index % 5; /* attribute index */
2126
2127 if (index >= 15) { /* fan 4..6 don't have divisor attributes */
2128 i = (index - 15) / 4 + 3;
2129 a = (index - 15) % 4;
2130 }
2131
2132 if (!(data->has_fan & BIT(i)))
2133 return 0;
2134
2135 if (a == 3) { /* beep */
2136 if (!data->has_beep)
2137 return 0;
2138 /* first fan beep attribute is writable */
2139 if (i == __ffs(data->has_fan))
2140 return attr->mode | S_IWUSR;
2141 }
2142
2143 if (a == 4 && has_16bit_fans(data)) /* divisor */
2144 return 0;
2145
2146 return attr->mode;
2147 }
2148
2149 static struct attribute *it87_attributes_fan[] = {
2150 &sensor_dev_attr_fan1_input.dev_attr.attr,
2151 &sensor_dev_attr_fan1_min.dev_attr.attr,
2152 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2153 &sensor_dev_attr_fan1_beep.dev_attr.attr, /* 3 */
2154 &sensor_dev_attr_fan1_div.dev_attr.attr, /* 4 */
2155
2156 &sensor_dev_attr_fan2_input.dev_attr.attr,
2157 &sensor_dev_attr_fan2_min.dev_attr.attr,
2158 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2159 &sensor_dev_attr_fan2_beep.dev_attr.attr,
2160 &sensor_dev_attr_fan2_div.dev_attr.attr, /* 9 */
2161
2162 &sensor_dev_attr_fan3_input.dev_attr.attr,
2163 &sensor_dev_attr_fan3_min.dev_attr.attr,
2164 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2165 &sensor_dev_attr_fan3_beep.dev_attr.attr,
2166 &sensor_dev_attr_fan3_div.dev_attr.attr, /* 14 */
2167
2168 &sensor_dev_attr_fan4_input.dev_attr.attr, /* 15 */
2169 &sensor_dev_attr_fan4_min.dev_attr.attr,
2170 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2171 &sensor_dev_attr_fan4_beep.dev_attr.attr,
2172
2173 &sensor_dev_attr_fan5_input.dev_attr.attr, /* 19 */
2174 &sensor_dev_attr_fan5_min.dev_attr.attr,
2175 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2176 &sensor_dev_attr_fan5_beep.dev_attr.attr,
2177
2178 &sensor_dev_attr_fan6_input.dev_attr.attr, /* 23 */
2179 &sensor_dev_attr_fan6_min.dev_attr.attr,
2180 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2181 &sensor_dev_attr_fan6_beep.dev_attr.attr,
2182 NULL
2183 };
2184
2185 static const struct attribute_group it87_group_fan = {
2186 .attrs = it87_attributes_fan,
2187 .is_visible = it87_fan_is_visible,
2188 };
2189
2190 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2191 struct attribute *attr, int index)
2192 {
2193 struct device *dev = container_of(kobj, struct device, kobj);
2194 struct it87_data *data = dev_get_drvdata(dev);
2195 int i = index / 4; /* pwm index */
2196 int a = index % 4; /* attribute index */
2197
2198 if (!(data->has_pwm & BIT(i)))
2199 return 0;
2200
2201 /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2202 if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2203 return attr->mode | S_IWUSR;
2204
2205 /* pwm2_freq is writable if there are two pwm frequency selects */
2206 if (has_pwm_freq2(data) && i == 1 && a == 2)
2207 return attr->mode | S_IWUSR;
2208
2209 return attr->mode;
2210 }
2211
2212 static struct attribute *it87_attributes_pwm[] = {
2213 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2214 &sensor_dev_attr_pwm1.dev_attr.attr,
2215 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2216 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2217
2218 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2219 &sensor_dev_attr_pwm2.dev_attr.attr,
2220 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2221 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2222
2223 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2224 &sensor_dev_attr_pwm3.dev_attr.attr,
2225 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2226 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2227
2228 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2229 &sensor_dev_attr_pwm4.dev_attr.attr,
2230 &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2231 &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2232
2233 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2234 &sensor_dev_attr_pwm5.dev_attr.attr,
2235 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2236 &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2237
2238 &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2239 &sensor_dev_attr_pwm6.dev_attr.attr,
2240 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2241 &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2242
2243 NULL
2244 };
2245
2246 static const struct attribute_group it87_group_pwm = {
2247 .attrs = it87_attributes_pwm,
2248 .is_visible = it87_pwm_is_visible,
2249 };
2250
2251 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2252 struct attribute *attr, int index)
2253 {
2254 struct device *dev = container_of(kobj, struct device, kobj);
2255 struct it87_data *data = dev_get_drvdata(dev);
2256 int i = index / 11; /* pwm index */
2257 int a = index % 11; /* attribute index */
2258
2259 if (index >= 33) { /* pwm 4..6 */
2260 i = (index - 33) / 6 + 3;
2261 a = (index - 33) % 6 + 4;
2262 }
2263
2264 if (!(data->has_pwm & BIT(i)))
2265 return 0;
2266
2267 if (has_newer_autopwm(data)) {
2268 if (a < 4) /* no auto point pwm */
2269 return 0;
2270 if (a == 8) /* no auto_point4 */
2271 return 0;
2272 }
2273 if (has_old_autopwm(data)) {
2274 if (a >= 9) /* no pwm_auto_start, pwm_auto_slope */
2275 return 0;
2276 }
2277
2278 return attr->mode;
2279 }
2280
2281 static struct attribute *it87_attributes_auto_pwm[] = {
2282 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2283 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2284 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2285 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2286 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2287 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2288 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2289 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2290 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2291 &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2292 &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2293
2294 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, /* 11 */
2295 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2296 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2297 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2298 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2299 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2300 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2301 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2302 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2303 &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2304 &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2305
2306 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, /* 22 */
2307 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2308 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2309 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2310 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2311 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2312 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2313 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2314 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2315 &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2316 &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2317
2318 &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr, /* 33 */
2319 &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2320 &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2321 &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2322 &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2323 &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2324
2325 &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2326 &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2327 &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2328 &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2329 &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2330 &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2331
2332 &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2333 &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2334 &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2335 &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2336 &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2337 &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2338
2339 NULL,
2340 };
2341
2342 static const struct attribute_group it87_group_auto_pwm = {
2343 .attrs = it87_attributes_auto_pwm,
2344 .is_visible = it87_auto_pwm_is_visible,
2345 };
2346
2347 /* SuperIO detection - will change isa_address if a chip is found */
2348 static int __init it87_find(int sioaddr, unsigned short *address,
2349 struct it87_sio_data *sio_data)
2350 {
2351 int err;
2352 u16 chip_type;
2353 const char *board_vendor, *board_name;
2354 const struct it87_devices *config;
2355
2356 err = superio_enter(sioaddr);
2357 if (err)
2358 return err;
2359
2360 err = -ENODEV;
2361 chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2362
2363 switch (chip_type) {
2364 case IT8705F_DEVID:
2365 sio_data->type = it87;
2366 break;
2367 case IT8712F_DEVID:
2368 sio_data->type = it8712;
2369 break;
2370 case IT8716F_DEVID:
2371 case IT8726F_DEVID:
2372 sio_data->type = it8716;
2373 break;
2374 case IT8718F_DEVID:
2375 sio_data->type = it8718;
2376 break;
2377 case IT8720F_DEVID:
2378 sio_data->type = it8720;
2379 break;
2380 case IT8721F_DEVID:
2381 sio_data->type = it8721;
2382 break;
2383 case IT8728F_DEVID:
2384 sio_data->type = it8728;
2385 break;
2386 case IT8732F_DEVID:
2387 sio_data->type = it8732;
2388 break;
2389 case IT8771E_DEVID:
2390 sio_data->type = it8771;
2391 break;
2392 case IT8772E_DEVID:
2393 sio_data->type = it8772;
2394 break;
2395 case IT8781F_DEVID:
2396 sio_data->type = it8781;
2397 break;
2398 case IT8782F_DEVID:
2399 sio_data->type = it8782;
2400 break;
2401 case IT8783E_DEVID:
2402 sio_data->type = it8783;
2403 break;
2404 case IT8786E_DEVID:
2405 sio_data->type = it8786;
2406 break;
2407 case IT8790E_DEVID:
2408 sio_data->type = it8790;
2409 break;
2410 case IT8603E_DEVID:
2411 case IT8623E_DEVID:
2412 sio_data->type = it8603;
2413 break;
2414 case IT8620E_DEVID:
2415 sio_data->type = it8620;
2416 break;
2417 case IT8628E_DEVID:
2418 sio_data->type = it8628;
2419 break;
2420 case 0xffff: /* No device at all */
2421 goto exit;
2422 default:
2423 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2424 goto exit;
2425 }
2426
2427 superio_select(sioaddr, PME);
2428 if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2429 pr_info("Device not activated, skipping\n");
2430 goto exit;
2431 }
2432
2433 *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2434 if (*address == 0) {
2435 pr_info("Base address not set, skipping\n");
2436 goto exit;
2437 }
2438
2439 err = 0;
2440 sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2441 pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2442 it87_devices[sio_data->type].suffix,
2443 *address, sio_data->revision);
2444
2445 config = &it87_devices[sio_data->type];
2446
2447 /* in7 (VSB or VCCH5V) is always internal on some chips */
2448 if (has_in7_internal(config))
2449 sio_data->internal |= BIT(1);
2450
2451 /* in8 (Vbat) is always internal */
2452 sio_data->internal |= BIT(2);
2453
2454 /* in9 (AVCC3), always internal if supported */
2455 if (has_avcc3(config))
2456 sio_data->internal |= BIT(3); /* in9 is AVCC */
2457 else
2458 sio_data->skip_in |= BIT(9);
2459
2460 if (!has_six_pwm(config))
2461 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2462
2463 if (!has_vid(config))
2464 sio_data->skip_vid = 1;
2465
2466 /* Read GPIO config and VID value from LDN 7 (GPIO) */
2467 if (sio_data->type == it87) {
2468 /* The IT8705F has a different LD number for GPIO */
2469 superio_select(sioaddr, 5);
2470 sio_data->beep_pin = superio_inb(sioaddr,
2471 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2472 } else if (sio_data->type == it8783) {
2473 int reg25, reg27, reg2a, reg2c, regef;
2474
2475 superio_select(sioaddr, GPIO);
2476
2477 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2478 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2479 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2480 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2481 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2482
2483 /* Check if fan3 is there or not */
2484 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2485 sio_data->skip_fan |= BIT(2);
2486 if ((reg25 & BIT(4)) ||
2487 (!(reg2a & BIT(1)) && (regef & BIT(0))))
2488 sio_data->skip_pwm |= BIT(2);
2489
2490 /* Check if fan2 is there or not */
2491 if (reg27 & BIT(7))
2492 sio_data->skip_fan |= BIT(1);
2493 if (reg27 & BIT(3))
2494 sio_data->skip_pwm |= BIT(1);
2495
2496 /* VIN5 */
2497 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2498 sio_data->skip_in |= BIT(5); /* No VIN5 */
2499
2500 /* VIN6 */
2501 if (reg27 & BIT(1))
2502 sio_data->skip_in |= BIT(6); /* No VIN6 */
2503
2504 /*
2505 * VIN7
2506 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2507 */
2508 if (reg27 & BIT(2)) {
2509 /*
2510 * The data sheet is a bit unclear regarding the
2511 * internal voltage divider for VCCH5V. It says
2512 * "This bit enables and switches VIN7 (pin 91) to the
2513 * internal voltage divider for VCCH5V".
2514 * This is different to other chips, where the internal
2515 * voltage divider would connect VIN7 to an internal
2516 * voltage source. Maybe that is the case here as well.
2517 *
2518 * Since we don't know for sure, re-route it if that is
2519 * not the case, and ask the user to report if the
2520 * resulting voltage is sane.
2521 */
2522 if (!(reg2c & BIT(1))) {
2523 reg2c |= BIT(1);
2524 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2525 reg2c);
2526 pr_notice("Routing internal VCCH5V to in7.\n");
2527 }
2528 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2529 pr_notice("Please report if it displays a reasonable voltage.\n");
2530 }
2531
2532 if (reg2c & BIT(0))
2533 sio_data->internal |= BIT(0);
2534 if (reg2c & BIT(1))
2535 sio_data->internal |= BIT(1);
2536
2537 sio_data->beep_pin = superio_inb(sioaddr,
2538 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2539 } else if (sio_data->type == it8603) {
2540 int reg27, reg29;
2541
2542 superio_select(sioaddr, GPIO);
2543
2544 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2545
2546 /* Check if fan3 is there or not */
2547 if (reg27 & BIT(6))
2548 sio_data->skip_pwm |= BIT(2);
2549 if (reg27 & BIT(7))
2550 sio_data->skip_fan |= BIT(2);
2551
2552 /* Check if fan2 is there or not */
2553 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2554 if (reg29 & BIT(1))
2555 sio_data->skip_pwm |= BIT(1);
2556 if (reg29 & BIT(2))
2557 sio_data->skip_fan |= BIT(1);
2558
2559 sio_data->skip_in |= BIT(5); /* No VIN5 */
2560 sio_data->skip_in |= BIT(6); /* No VIN6 */
2561
2562 sio_data->beep_pin = superio_inb(sioaddr,
2563 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2564 } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2565 int reg;
2566
2567 superio_select(sioaddr, GPIO);
2568
2569 /* Check for pwm5 */
2570 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2571 if (reg & BIT(6))
2572 sio_data->skip_pwm |= BIT(4);
2573
2574 /* Check for fan4, fan5 */
2575 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2576 if (!(reg & BIT(5)))
2577 sio_data->skip_fan |= BIT(3);
2578 if (!(reg & BIT(4)))
2579 sio_data->skip_fan |= BIT(4);
2580
2581 /* Check for pwm3, fan3 */
2582 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2583 if (reg & BIT(6))
2584 sio_data->skip_pwm |= BIT(2);
2585 if (reg & BIT(7))
2586 sio_data->skip_fan |= BIT(2);
2587
2588 /* Check for pwm4 */
2589 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2590 if (!(reg & BIT(2)))
2591 sio_data->skip_pwm |= BIT(3);
2592
2593 /* Check for pwm2, fan2 */
2594 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2595 if (reg & BIT(1))
2596 sio_data->skip_pwm |= BIT(1);
2597 if (reg & BIT(2))
2598 sio_data->skip_fan |= BIT(1);
2599 /* Check for pwm6, fan6 */
2600 if (!(reg & BIT(7))) {
2601 sio_data->skip_pwm |= BIT(5);
2602 sio_data->skip_fan |= BIT(5);
2603 }
2604
2605 sio_data->beep_pin = superio_inb(sioaddr,
2606 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2607 } else {
2608 int reg;
2609 bool uart6;
2610
2611 superio_select(sioaddr, GPIO);
2612
2613 /* Check for fan4, fan5 */
2614 if (has_five_fans(config)) {
2615 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2616 switch (sio_data->type) {
2617 case it8718:
2618 if (reg & BIT(5))
2619 sio_data->skip_fan |= BIT(3);
2620 if (reg & BIT(4))
2621 sio_data->skip_fan |= BIT(4);
2622 break;
2623 case it8720:
2624 case it8721:
2625 case it8728:
2626 if (!(reg & BIT(5)))
2627 sio_data->skip_fan |= BIT(3);
2628 if (!(reg & BIT(4)))
2629 sio_data->skip_fan |= BIT(4);
2630 break;
2631 default:
2632 break;
2633 }
2634 }
2635
2636 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2637 if (!sio_data->skip_vid) {
2638 /* We need at least 4 VID pins */
2639 if (reg & 0x0f) {
2640 pr_info("VID is disabled (pins used for GPIO)\n");
2641 sio_data->skip_vid = 1;
2642 }
2643 }
2644
2645 /* Check if fan3 is there or not */
2646 if (reg & BIT(6))
2647 sio_data->skip_pwm |= BIT(2);
2648 if (reg & BIT(7))
2649 sio_data->skip_fan |= BIT(2);
2650
2651 /* Check if fan2 is there or not */
2652 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2653 if (reg & BIT(1))
2654 sio_data->skip_pwm |= BIT(1);
2655 if (reg & BIT(2))
2656 sio_data->skip_fan |= BIT(1);
2657
2658 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2659 !(sio_data->skip_vid))
2660 sio_data->vid_value = superio_inb(sioaddr,
2661 IT87_SIO_VID_REG);
2662
2663 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2664
2665 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2666
2667 /*
2668 * The IT8720F has no VIN7 pin, so VCCH should always be
2669 * routed internally to VIN7 with an internal divider.
2670 * Curiously, there still is a configuration bit to control
2671 * this, which means it can be set incorrectly. And even
2672 * more curiously, many boards out there are improperly
2673 * configured, even though the IT8720F datasheet claims
2674 * that the internal routing of VCCH to VIN7 is the default
2675 * setting. So we force the internal routing in this case.
2676 *
2677 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2678 * If UART6 is enabled, re-route VIN7 to the internal divider
2679 * if that is not already the case.
2680 */
2681 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2682 reg |= BIT(1);
2683 superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2684 pr_notice("Routing internal VCCH to in7\n");
2685 }
2686 if (reg & BIT(0))
2687 sio_data->internal |= BIT(0);
2688 if (reg & BIT(1))
2689 sio_data->internal |= BIT(1);
2690
2691 /*
2692 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2693 * While VIN7 can be routed to the internal voltage divider,
2694 * VIN5 and VIN6 are not available if UART6 is enabled.
2695 *
2696 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2697 * is the temperature source. Since we can not read the
2698 * temperature source here, skip_temp is preliminary.
2699 */
2700 if (uart6) {
2701 sio_data->skip_in |= BIT(5) | BIT(6);
2702 sio_data->skip_temp |= BIT(2);
2703 }
2704
2705 sio_data->beep_pin = superio_inb(sioaddr,
2706 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2707 }
2708 if (sio_data->beep_pin)
2709 pr_info("Beeping is supported\n");
2710
2711 /* Disable specific features based on DMI strings */
2712 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2713 board_name = dmi_get_system_info(DMI_BOARD_NAME);
2714 if (board_vendor && board_name) {
2715 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2716 strcmp(board_name, "FN68PT") == 0) {
2717 /*
2718 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2719 * connected to a fan, but to something else. One user
2720 * has reported instant system power-off when changing
2721 * the PWM2 duty cycle, so we disable it.
2722 * I use the board name string as the trigger in case
2723 * the same board is ever used in other systems.
2724 */
2725 pr_info("Disabling pwm2 due to hardware constraints\n");
2726 sio_data->skip_pwm = BIT(1);
2727 }
2728 }
2729
2730 exit:
2731 superio_exit(sioaddr);
2732 return err;
2733 }
2734
2735 /* Called when we have found a new IT87. */
2736 static void it87_init_device(struct platform_device *pdev)
2737 {
2738 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2739 struct it87_data *data = platform_get_drvdata(pdev);
2740 int tmp, i;
2741 u8 mask;
2742
2743 /*
2744 * For each PWM channel:
2745 * - If it is in automatic mode, setting to manual mode should set
2746 * the fan to full speed by default.
2747 * - If it is in manual mode, we need a mapping to temperature
2748 * channels to use when later setting to automatic mode later.
2749 * Use a 1:1 mapping by default (we are clueless.)
2750 * In both cases, the value can (and should) be changed by the user
2751 * prior to switching to a different mode.
2752 * Note that this is no longer needed for the IT8721F and later, as
2753 * these have separate registers for the temperature mapping and the
2754 * manual duty cycle.
2755 */
2756 for (i = 0; i < NUM_AUTO_PWM; i++) {
2757 data->pwm_temp_map[i] = i;
2758 data->pwm_duty[i] = 0x7f; /* Full speed */
2759 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
2760 }
2761
2762 /*
2763 * Some chips seem to have default value 0xff for all limit
2764 * registers. For low voltage limits it makes no sense and triggers
2765 * alarms, so change to 0 instead. For high temperature limits, it
2766 * means -1 degree C, which surprisingly doesn't trigger an alarm,
2767 * but is still confusing, so change to 127 degrees C.
2768 */
2769 for (i = 0; i < NUM_VIN_LIMIT; i++) {
2770 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2771 if (tmp == 0xff)
2772 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2773 }
2774 for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2775 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2776 if (tmp == 0xff)
2777 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2778 }
2779
2780 /*
2781 * Temperature channels are not forcibly enabled, as they can be
2782 * set to two different sensor types and we can't guess which one
2783 * is correct for a given system. These channels can be enabled at
2784 * run-time through the temp{1-3}_type sysfs accessors if needed.
2785 */
2786
2787 /* Check if voltage monitors are reset manually or by some reason */
2788 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2789 if ((tmp & 0xff) == 0) {
2790 /* Enable all voltage monitors */
2791 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2792 }
2793
2794 /* Check if tachometers are reset manually or by some reason */
2795 mask = 0x70 & ~(sio_data->skip_fan << 4);
2796 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2797 if ((data->fan_main_ctrl & mask) == 0) {
2798 /* Enable all fan tachometers */
2799 data->fan_main_ctrl |= mask;
2800 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2801 data->fan_main_ctrl);
2802 }
2803 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2804
2805 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2806
2807 /* Set tachometers to 16-bit mode if needed */
2808 if (has_fan16_config(data)) {
2809 if (~tmp & 0x07 & data->has_fan) {
2810 dev_dbg(&pdev->dev,
2811 "Setting fan1-3 to 16-bit mode\n");
2812 it87_write_value(data, IT87_REG_FAN_16BIT,
2813 tmp | 0x07);
2814 }
2815 }
2816
2817 /* Check for additional fans */
2818 if (has_five_fans(data)) {
2819 if (tmp & BIT(4))
2820 data->has_fan |= BIT(3); /* fan4 enabled */
2821 if (tmp & BIT(5))
2822 data->has_fan |= BIT(4); /* fan5 enabled */
2823 if (has_six_fans(data) && (tmp & BIT(2)))
2824 data->has_fan |= BIT(5); /* fan6 enabled */
2825 }
2826
2827 /* Fan input pins may be used for alternative functions */
2828 data->has_fan &= ~sio_data->skip_fan;
2829
2830 /* Check if pwm5, pwm6 are enabled */
2831 if (has_six_pwm(data)) {
2832 /* The following code may be IT8620E specific */
2833 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2834 if ((tmp & 0xc0) == 0xc0)
2835 sio_data->skip_pwm |= BIT(4);
2836 if (!(tmp & BIT(3)))
2837 sio_data->skip_pwm |= BIT(5);
2838 }
2839
2840 /* Start monitoring */
2841 it87_write_value(data, IT87_REG_CONFIG,
2842 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2843 | (update_vbat ? 0x41 : 0x01));
2844 }
2845
2846 /* Return 1 if and only if the PWM interface is safe to use */
2847 static int it87_check_pwm(struct device *dev)
2848 {
2849 struct it87_data *data = dev_get_drvdata(dev);
2850 /*
2851 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2852 * and polarity set to active low is sign that this is the case so we
2853 * disable pwm control to protect the user.
2854 */
2855 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2856
2857 if ((tmp & 0x87) == 0) {
2858 if (fix_pwm_polarity) {
2859 /*
2860 * The user asks us to attempt a chip reconfiguration.
2861 * This means switching to active high polarity and
2862 * inverting all fan speed values.
2863 */
2864 int i;
2865 u8 pwm[3];
2866
2867 for (i = 0; i < ARRAY_SIZE(pwm); i++)
2868 pwm[i] = it87_read_value(data,
2869 IT87_REG_PWM[i]);
2870
2871 /*
2872 * If any fan is in automatic pwm mode, the polarity
2873 * might be correct, as suspicious as it seems, so we
2874 * better don't change anything (but still disable the
2875 * PWM interface).
2876 */
2877 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2878 dev_info(dev,
2879 "Reconfiguring PWM to active high polarity\n");
2880 it87_write_value(data, IT87_REG_FAN_CTL,
2881 tmp | 0x87);
2882 for (i = 0; i < 3; i++)
2883 it87_write_value(data,
2884 IT87_REG_PWM[i],
2885 0x7f & ~pwm[i]);
2886 return 1;
2887 }
2888
2889 dev_info(dev,
2890 "PWM configuration is too broken to be fixed\n");
2891 }
2892
2893 dev_info(dev,
2894 "Detected broken BIOS defaults, disabling PWM interface\n");
2895 return 0;
2896 } else if (fix_pwm_polarity) {
2897 dev_info(dev,
2898 "PWM configuration looks sane, won't touch\n");
2899 }
2900
2901 return 1;
2902 }
2903
2904 static int it87_probe(struct platform_device *pdev)
2905 {
2906 struct it87_data *data;
2907 struct resource *res;
2908 struct device *dev = &pdev->dev;
2909 struct it87_sio_data *sio_data = dev_get_platdata(dev);
2910 int enable_pwm_interface;
2911 struct device *hwmon_dev;
2912
2913 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2914 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2915 DRVNAME)) {
2916 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2917 (unsigned long)res->start,
2918 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
2919 return -EBUSY;
2920 }
2921
2922 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2923 if (!data)
2924 return -ENOMEM;
2925
2926 data->addr = res->start;
2927 data->type = sio_data->type;
2928 data->features = it87_devices[sio_data->type].features;
2929 data->peci_mask = it87_devices[sio_data->type].peci_mask;
2930 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
2931 /*
2932 * IT8705F Datasheet 0.4.1, 3h == Version G.
2933 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2934 * These are the first revisions with 16-bit tachometer support.
2935 */
2936 switch (data->type) {
2937 case it87:
2938 if (sio_data->revision >= 0x03) {
2939 data->features &= ~FEAT_OLD_AUTOPWM;
2940 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
2941 }
2942 break;
2943 case it8712:
2944 if (sio_data->revision >= 0x08) {
2945 data->features &= ~FEAT_OLD_AUTOPWM;
2946 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
2947 FEAT_FIVE_FANS;
2948 }
2949 break;
2950 default:
2951 break;
2952 }
2953
2954 /* Now, we do the remaining detection. */
2955 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
2956 it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2957 return -ENODEV;
2958
2959 platform_set_drvdata(pdev, data);
2960
2961 mutex_init(&data->update_lock);
2962
2963 /* Check PWM configuration */
2964 enable_pwm_interface = it87_check_pwm(dev);
2965
2966 /* Starting with IT8721F, we handle scaling of internal voltages */
2967 if (has_12mv_adc(data)) {
2968 if (sio_data->internal & BIT(0))
2969 data->in_scaled |= BIT(3); /* in3 is AVCC */
2970 if (sio_data->internal & BIT(1))
2971 data->in_scaled |= BIT(7); /* in7 is VSB */
2972 if (sio_data->internal & BIT(2))
2973 data->in_scaled |= BIT(8); /* in8 is Vbat */
2974 if (sio_data->internal & BIT(3))
2975 data->in_scaled |= BIT(9); /* in9 is AVCC */
2976 } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
2977 sio_data->type == it8783) {
2978 if (sio_data->internal & BIT(0))
2979 data->in_scaled |= BIT(3); /* in3 is VCC5V */
2980 if (sio_data->internal & BIT(1))
2981 data->in_scaled |= BIT(7); /* in7 is VCCH5V */
2982 }
2983
2984 data->has_temp = 0x07;
2985 if (sio_data->skip_temp & BIT(2)) {
2986 if (sio_data->type == it8782 &&
2987 !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2988 data->has_temp &= ~BIT(2);
2989 }
2990
2991 data->in_internal = sio_data->internal;
2992 data->has_in = 0x3ff & ~sio_data->skip_in;
2993
2994 if (has_six_temp(data)) {
2995 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
2996
2997 /* Check for additional temperature sensors */
2998 if ((reg & 0x03) >= 0x02)
2999 data->has_temp |= BIT(3);
3000 if (((reg >> 2) & 0x03) >= 0x02)
3001 data->has_temp |= BIT(4);
3002 if (((reg >> 4) & 0x03) >= 0x02)
3003 data->has_temp |= BIT(5);
3004
3005 /* Check for additional voltage sensors */
3006 if ((reg & 0x03) == 0x01)
3007 data->has_in |= BIT(10);
3008 if (((reg >> 2) & 0x03) == 0x01)
3009 data->has_in |= BIT(11);
3010 if (((reg >> 4) & 0x03) == 0x01)
3011 data->has_in |= BIT(12);
3012 }
3013
3014 data->has_beep = !!sio_data->beep_pin;
3015
3016 /* Initialize the IT87 chip */
3017 it87_init_device(pdev);
3018
3019 if (!sio_data->skip_vid) {
3020 data->has_vid = true;
3021 data->vrm = vid_which_vrm();
3022 /* VID reading from Super-I/O config space if available */
3023 data->vid = sio_data->vid_value;
3024 }
3025
3026 /* Prepare for sysfs hooks */
3027 data->groups[0] = &it87_group;
3028 data->groups[1] = &it87_group_in;
3029 data->groups[2] = &it87_group_temp;
3030 data->groups[3] = &it87_group_fan;
3031
3032 if (enable_pwm_interface) {
3033 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3034 data->has_pwm &= ~sio_data->skip_pwm;
3035
3036 data->groups[4] = &it87_group_pwm;
3037 if (has_old_autopwm(data) || has_newer_autopwm(data))
3038 data->groups[5] = &it87_group_auto_pwm;
3039 }
3040
3041 hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3042 it87_devices[sio_data->type].name,
3043 data, data->groups);
3044 return PTR_ERR_OR_ZERO(hwmon_dev);
3045 }
3046
3047 static struct platform_driver it87_driver = {
3048 .driver = {
3049 .name = DRVNAME,
3050 },
3051 .probe = it87_probe,
3052 };
3053
3054 static int __init it87_device_add(int index, unsigned short address,
3055 const struct it87_sio_data *sio_data)
3056 {
3057 struct platform_device *pdev;
3058 struct resource res = {
3059 .start = address + IT87_EC_OFFSET,
3060 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3061 .name = DRVNAME,
3062 .flags = IORESOURCE_IO,
3063 };
3064 int err;
3065
3066 err = acpi_check_resource_conflict(&res);
3067 if (err)
3068 return err;
3069
3070 pdev = platform_device_alloc(DRVNAME, address);
3071 if (!pdev)
3072 return -ENOMEM;
3073
3074 err = platform_device_add_resources(pdev, &res, 1);
3075 if (err) {
3076 pr_err("Device resource addition failed (%d)\n", err);
3077 goto exit_device_put;
3078 }
3079
3080 err = platform_device_add_data(pdev, sio_data,
3081 sizeof(struct it87_sio_data));
3082 if (err) {
3083 pr_err("Platform data allocation failed\n");
3084 goto exit_device_put;
3085 }
3086
3087 err = platform_device_add(pdev);
3088 if (err) {
3089 pr_err("Device addition failed (%d)\n", err);
3090 goto exit_device_put;
3091 }
3092
3093 it87_pdev[index] = pdev;
3094 return 0;
3095
3096 exit_device_put:
3097 platform_device_put(pdev);
3098 return err;
3099 }
3100
3101 static int __init sm_it87_init(void)
3102 {
3103 int sioaddr[2] = { REG_2E, REG_4E };
3104 struct it87_sio_data sio_data;
3105 unsigned short isa_address;
3106 bool found = false;
3107 int i, err;
3108
3109 err = platform_driver_register(&it87_driver);
3110 if (err)
3111 return err;
3112
3113 for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3114 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3115 isa_address = 0;
3116 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3117 if (err || isa_address == 0)
3118 continue;
3119
3120 err = it87_device_add(i, isa_address, &sio_data);
3121 if (err)
3122 goto exit_dev_unregister;
3123 found = true;
3124 }
3125
3126 if (!found) {
3127 err = -ENODEV;
3128 goto exit_unregister;
3129 }
3130 return 0;
3131
3132 exit_dev_unregister:
3133 /* NULL check handled by platform_device_unregister */
3134 platform_device_unregister(it87_pdev[0]);
3135 exit_unregister:
3136 platform_driver_unregister(&it87_driver);
3137 return err;
3138 }
3139
3140 static void __exit sm_it87_exit(void)
3141 {
3142 /* NULL check handled by platform_device_unregister */
3143 platform_device_unregister(it87_pdev[1]);
3144 platform_device_unregister(it87_pdev[0]);
3145 platform_driver_unregister(&it87_driver);
3146 }
3147
3148 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3149 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3150 module_param(update_vbat, bool, 0);
3151 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3152 module_param(fix_pwm_polarity, bool, 0);
3153 MODULE_PARM_DESC(fix_pwm_polarity,
3154 "Force PWM polarity to active high (DANGEROUS)");
3155 MODULE_LICENSE("GPL");
3156
3157 module_init(sm_it87_init);
3158 module_exit(sm_it87_exit);
Linux with added FPC-III support