sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / iio / adc / lpc18xx_adc.c
blob3ef18f4b27f04e28564f26e6d14fb2c3b4e8ceb3
1 /*
2 * IIO ADC driver for NXP LPC18xx ADC
4 * Copyright (C) 2016 Joachim Eastwood <manabian@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * UNSUPPORTED hardware features:
11 * - Hardware triggers
12 * - Burst mode
13 * - Interrupts
14 * - DMA
17 #include <linux/clk.h>
18 #include <linux/err.h>
19 #include <linux/iio/iio.h>
20 #include <linux/iio/driver.h>
21 #include <linux/io.h>
22 #include <linux/iopoll.h>
23 #include <linux/module.h>
24 #include <linux/mutex.h>
25 #include <linux/of.h>
26 #include <linux/of_device.h>
27 #include <linux/platform_device.h>
28 #include <linux/regulator/consumer.h>
30 /* LPC18XX ADC registers and bits */
31 #define LPC18XX_ADC_CR 0x000
32 #define LPC18XX_ADC_CR_CLKDIV_SHIFT 8
33 #define LPC18XX_ADC_CR_PDN BIT(21)
34 #define LPC18XX_ADC_CR_START_NOW (0x1 << 24)
35 #define LPC18XX_ADC_GDR 0x004
37 /* Data register bits */
38 #define LPC18XX_ADC_SAMPLE_SHIFT 6
39 #define LPC18XX_ADC_SAMPLE_MASK 0x3ff
40 #define LPC18XX_ADC_CONV_DONE BIT(31)
42 /* Clock should be 4.5 MHz or less */
43 #define LPC18XX_ADC_CLK_TARGET 4500000
45 struct lpc18xx_adc {
46 struct regulator *vref;
47 void __iomem *base;
48 struct device *dev;
49 struct mutex lock;
50 struct clk *clk;
51 u32 cr_reg;
54 #define LPC18XX_ADC_CHAN(_idx) { \
55 .type = IIO_VOLTAGE, \
56 .indexed = 1, \
57 .channel = _idx, \
58 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
59 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
62 static const struct iio_chan_spec lpc18xx_adc_iio_channels[] = {
63 LPC18XX_ADC_CHAN(0),
64 LPC18XX_ADC_CHAN(1),
65 LPC18XX_ADC_CHAN(2),
66 LPC18XX_ADC_CHAN(3),
67 LPC18XX_ADC_CHAN(4),
68 LPC18XX_ADC_CHAN(5),
69 LPC18XX_ADC_CHAN(6),
70 LPC18XX_ADC_CHAN(7),
73 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch)
75 int ret;
76 u32 reg;
78 reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW;
79 writel(reg, adc->base + LPC18XX_ADC_CR);
81 ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg,
82 reg & LPC18XX_ADC_CONV_DONE, 3, 9);
83 if (ret) {
84 dev_warn(adc->dev, "adc read timed out\n");
85 return ret;
88 return (reg >> LPC18XX_ADC_SAMPLE_SHIFT) & LPC18XX_ADC_SAMPLE_MASK;
91 static int lpc18xx_adc_read_raw(struct iio_dev *indio_dev,
92 struct iio_chan_spec const *chan,
93 int *val, int *val2, long mask)
95 struct lpc18xx_adc *adc = iio_priv(indio_dev);
97 switch (mask) {
98 case IIO_CHAN_INFO_RAW:
99 mutex_lock(&adc->lock);
100 *val = lpc18xx_adc_read_chan(adc, chan->channel);
101 mutex_unlock(&adc->lock);
102 if (*val < 0)
103 return *val;
105 return IIO_VAL_INT;
107 case IIO_CHAN_INFO_SCALE:
108 *val = regulator_get_voltage(adc->vref) / 1000;
109 *val2 = 10;
111 return IIO_VAL_FRACTIONAL_LOG2;
114 return -EINVAL;
117 static const struct iio_info lpc18xx_adc_info = {
118 .read_raw = lpc18xx_adc_read_raw,
119 .driver_module = THIS_MODULE,
122 static int lpc18xx_adc_probe(struct platform_device *pdev)
124 struct iio_dev *indio_dev;
125 struct lpc18xx_adc *adc;
126 struct resource *res;
127 unsigned int clkdiv;
128 unsigned long rate;
129 int ret;
131 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc));
132 if (!indio_dev)
133 return -ENOMEM;
135 platform_set_drvdata(pdev, indio_dev);
136 adc = iio_priv(indio_dev);
137 adc->dev = &pdev->dev;
138 mutex_init(&adc->lock);
140 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
141 adc->base = devm_ioremap_resource(&pdev->dev, res);
142 if (IS_ERR(adc->base))
143 return PTR_ERR(adc->base);
145 adc->clk = devm_clk_get(&pdev->dev, NULL);
146 if (IS_ERR(adc->clk)) {
147 dev_err(&pdev->dev, "error getting clock\n");
148 return PTR_ERR(adc->clk);
151 rate = clk_get_rate(adc->clk);
152 clkdiv = DIV_ROUND_UP(rate, LPC18XX_ADC_CLK_TARGET);
154 adc->vref = devm_regulator_get(&pdev->dev, "vref");
155 if (IS_ERR(adc->vref)) {
156 dev_err(&pdev->dev, "error getting regulator\n");
157 return PTR_ERR(adc->vref);
160 indio_dev->name = dev_name(&pdev->dev);
161 indio_dev->dev.parent = &pdev->dev;
162 indio_dev->info = &lpc18xx_adc_info;
163 indio_dev->modes = INDIO_DIRECT_MODE;
164 indio_dev->channels = lpc18xx_adc_iio_channels;
165 indio_dev->num_channels = ARRAY_SIZE(lpc18xx_adc_iio_channels);
167 ret = regulator_enable(adc->vref);
168 if (ret) {
169 dev_err(&pdev->dev, "unable to enable regulator\n");
170 return ret;
173 ret = clk_prepare_enable(adc->clk);
174 if (ret) {
175 dev_err(&pdev->dev, "unable to enable clock\n");
176 goto dis_reg;
179 adc->cr_reg = (clkdiv << LPC18XX_ADC_CR_CLKDIV_SHIFT) |
180 LPC18XX_ADC_CR_PDN;
181 writel(adc->cr_reg, adc->base + LPC18XX_ADC_CR);
183 ret = iio_device_register(indio_dev);
184 if (ret) {
185 dev_err(&pdev->dev, "unable to register device\n");
186 goto dis_clk;
189 return 0;
191 dis_clk:
192 writel(0, adc->base + LPC18XX_ADC_CR);
193 clk_disable_unprepare(adc->clk);
194 dis_reg:
195 regulator_disable(adc->vref);
196 return ret;
199 static int lpc18xx_adc_remove(struct platform_device *pdev)
201 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
202 struct lpc18xx_adc *adc = iio_priv(indio_dev);
204 iio_device_unregister(indio_dev);
206 writel(0, adc->base + LPC18XX_ADC_CR);
207 clk_disable_unprepare(adc->clk);
208 regulator_disable(adc->vref);
210 return 0;
213 static const struct of_device_id lpc18xx_adc_match[] = {
214 { .compatible = "nxp,lpc1850-adc" },
215 { /* sentinel */ }
217 MODULE_DEVICE_TABLE(of, lpc18xx_adc_match);
219 static struct platform_driver lpc18xx_adc_driver = {
220 .probe = lpc18xx_adc_probe,
221 .remove = lpc18xx_adc_remove,
222 .driver = {
223 .name = "lpc18xx-adc",
224 .of_match_table = lpc18xx_adc_match,
227 module_platform_driver(lpc18xx_adc_driver);
229 MODULE_DESCRIPTION("LPC18xx ADC driver");
230 MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>");
231 MODULE_LICENSE("GPL v2");