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sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / iio / counter / 104-quad-8.c
blob2d2ee353dde7fc7bc976ced92cd969ccd9fade53
1 /*
2 * IIO driver for the ACCES 104-QUAD-8
3 * Copyright (C) 2016 William Breathitt Gray
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * This driver supports the ACCES 104-QUAD-8 and ACCES 104-QUAD-4.
15 */
16 #include <linux/bitops.h>
17 #include <linux/device.h>
18 #include <linux/errno.h>
19 #include <linux/iio/iio.h>
20 #include <linux/iio/types.h>
21 #include <linux/io.h>
22 #include <linux/ioport.h>
23 #include <linux/isa.h>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/types.h>
28
29 #define QUAD8_EXTENT 32
30
31 static unsigned int base[max_num_isa_dev(QUAD8_EXTENT)];
32 static unsigned int num_quad8;
33 module_param_array(base, uint, &num_quad8, 0);
34 MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses");
35
36 #define QUAD8_NUM_COUNTERS 8
37
38 /**
39 * struct quad8_iio - IIO device private data structure
40 * @preset: array of preset values
41 * @count_mode: array of count mode configurations
42 * @quadrature_mode: array of quadrature mode configurations
43 * @quadrature_scale: array of quadrature mode scale configurations
44 * @ab_enable: array of A and B inputs enable configurations
45 * @preset_enable: array of set_to_preset_on_index attribute configurations
46 * @synchronous_mode: array of index function synchronous mode configurations
47 * @index_polarity: array of index function polarity configurations
48 * @base: base port address of the IIO device
49 */
50 struct quad8_iio {
51 unsigned int preset[QUAD8_NUM_COUNTERS];
52 unsigned int count_mode[QUAD8_NUM_COUNTERS];
53 unsigned int quadrature_mode[QUAD8_NUM_COUNTERS];
54 unsigned int quadrature_scale[QUAD8_NUM_COUNTERS];
55 unsigned int ab_enable[QUAD8_NUM_COUNTERS];
56 unsigned int preset_enable[QUAD8_NUM_COUNTERS];
57 unsigned int synchronous_mode[QUAD8_NUM_COUNTERS];
58 unsigned int index_polarity[QUAD8_NUM_COUNTERS];
59 unsigned int base;
60 };
61
62 static int quad8_read_raw(struct iio_dev *indio_dev,
63 struct iio_chan_spec const *chan, int *val, int *val2, long mask)
64 {
65 struct quad8_iio *const priv = iio_priv(indio_dev);
66 const int base_offset = priv->base + 2 * chan->channel;
67 unsigned int flags;
68 unsigned int borrow;
69 unsigned int carry;
70 int i;
71
72 switch (mask) {
73 case IIO_CHAN_INFO_RAW:
74 if (chan->type == IIO_INDEX) {
75 *val = !!(inb(priv->base + 0x16) & BIT(chan->channel));
76 return IIO_VAL_INT;
77 }
78
79 flags = inb(base_offset);
80 borrow = flags & BIT(0);
81 carry = !!(flags & BIT(1));
82
83 /* Borrow XOR Carry effectively doubles count range */
84 *val = (borrow ^ carry) << 24;
85
86 /* Reset Byte Pointer; transfer Counter to Output Latch */
87 outb(0x11, base_offset + 1);
88
89 for (i = 0; i < 3; i++)
90 *val |= (unsigned int)inb(base_offset) << (8 * i);
91
92 return IIO_VAL_INT;
93 case IIO_CHAN_INFO_ENABLE:
94 *val = priv->ab_enable[chan->channel];
95 return IIO_VAL_INT;
96 case IIO_CHAN_INFO_SCALE:
97 *val = 1;
98 *val2 = priv->quadrature_scale[chan->channel];
99 return IIO_VAL_FRACTIONAL_LOG2;
100 }
101
102 return -EINVAL;
103 }
104
105 static int quad8_write_raw(struct iio_dev *indio_dev,
106 struct iio_chan_spec const *chan, int val, int val2, long mask)
107 {
108 struct quad8_iio *const priv = iio_priv(indio_dev);
109 const int base_offset = priv->base + 2 * chan->channel;
110 int i;
111 unsigned int ior_cfg;
112
113 switch (mask) {
114 case IIO_CHAN_INFO_RAW:
115 if (chan->type == IIO_INDEX)
116 return -EINVAL;
117
118 /* Only 24-bit values are supported */
119 if ((unsigned int)val > 0xFFFFFF)
120 return -EINVAL;
121
122 /* Reset Byte Pointer */
123 outb(0x01, base_offset + 1);
124
125 /* Counter can only be set via Preset Register */
126 for (i = 0; i < 3; i++)
127 outb(val >> (8 * i), base_offset);
128
129 /* Transfer Preset Register to Counter */
130 outb(0x08, base_offset + 1);
131
132 /* Reset Byte Pointer */
133 outb(0x01, base_offset + 1);
134
135 /* Set Preset Register back to original value */
136 val = priv->preset[chan->channel];
137 for (i = 0; i < 3; i++)
138 outb(val >> (8 * i), base_offset);
139
140 /* Reset Borrow, Carry, Compare, and Sign flags */
141 outb(0x02, base_offset + 1);
142 /* Reset Error flag */
143 outb(0x06, base_offset + 1);
144
145 return 0;
146 case IIO_CHAN_INFO_ENABLE:
147 /* only boolean values accepted */
148 if (val < 0 || val > 1)
149 return -EINVAL;
150
151 priv->ab_enable[chan->channel] = val;
152
153 ior_cfg = val | priv->preset_enable[chan->channel] << 1;
154
155 /* Load I/O control configuration */
156 outb(0x40 | ior_cfg, base_offset);
157
158 return 0;
159 case IIO_CHAN_INFO_SCALE:
160 /* Quadrature scaling only available in quadrature mode */
161 if (!priv->quadrature_mode[chan->channel] && (val2 || val != 1))
162 return -EINVAL;
163
164 /* Only three gain states (1, 0.5, 0.25) */
165 if (val == 1 && !val2)
166 priv->quadrature_scale[chan->channel] = 0;
167 else if (!val)
168 switch (val2) {
169 case 500000:
170 priv->quadrature_scale[chan->channel] = 1;
171 break;
172 case 250000:
173 priv->quadrature_scale[chan->channel] = 2;
174 break;
175 default:
176 return -EINVAL;
177 }
178 else
179 return -EINVAL;
180
181 return 0;
182 }
183
184 return -EINVAL;
185 }
186
187 static const struct iio_info quad8_info = {
188 .driver_module = THIS_MODULE,
189 .read_raw = quad8_read_raw,
190 .write_raw = quad8_write_raw
191 };
192
193 static ssize_t quad8_read_preset(struct iio_dev *indio_dev, uintptr_t private,
194 const struct iio_chan_spec *chan, char *buf)
195 {
196 const struct quad8_iio *const priv = iio_priv(indio_dev);
197
198 return snprintf(buf, PAGE_SIZE, "%u\n", priv->preset[chan->channel]);
199 }
200
201 static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private,
202 const struct iio_chan_spec *chan, const char *buf, size_t len)
203 {
204 struct quad8_iio *const priv = iio_priv(indio_dev);
205 const int base_offset = priv->base + 2 * chan->channel;
206 unsigned int preset;
207 int ret;
208 int i;
209
210 ret = kstrtouint(buf, 0, &preset);
211 if (ret)
212 return ret;
213
214 /* Only 24-bit values are supported */
215 if (preset > 0xFFFFFF)
216 return -EINVAL;
217
218 priv->preset[chan->channel] = preset;
219
220 /* Reset Byte Pointer */
221 outb(0x01, base_offset + 1);
222
223 /* Set Preset Register */
224 for (i = 0; i < 3; i++)
225 outb(preset >> (8 * i), base_offset);
226
227 return len;
228 }
229
230 static ssize_t quad8_read_set_to_preset_on_index(struct iio_dev *indio_dev,
231 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
232 {
233 const struct quad8_iio *const priv = iio_priv(indio_dev);
234
235 return snprintf(buf, PAGE_SIZE, "%u\n",
236 priv->preset_enable[chan->channel]);
237 }
238
239 static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
240 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
241 size_t len)
242 {
243 struct quad8_iio *const priv = iio_priv(indio_dev);
244 const int base_offset = priv->base + 2 * chan->channel;
245 bool preset_enable;
246 int ret;
247 unsigned int ior_cfg;
248
249 ret = kstrtobool(buf, &preset_enable);
250 if (ret)
251 return ret;
252
253 priv->preset_enable[chan->channel] = preset_enable;
254
255 ior_cfg = priv->ab_enable[chan->channel] |
256 (unsigned int)preset_enable << 1;
257
258 /* Load I/O control configuration to Input / Output Control Register */
259 outb(0x40 | ior_cfg, base_offset);
260
261 return len;
262 }
263
264 static const char *const quad8_noise_error_states[] = {
265 "No excessive noise is present at the count inputs",
266 "Excessive noise is present at the count inputs"
267 };
268
269 static int quad8_get_noise_error(struct iio_dev *indio_dev,
270 const struct iio_chan_spec *chan)
271 {
272 struct quad8_iio *const priv = iio_priv(indio_dev);
273 const int base_offset = priv->base + 2 * chan->channel + 1;
274
275 return !!(inb(base_offset) & BIT(4));
276 }
277
278 static const struct iio_enum quad8_noise_error_enum = {
279 .items = quad8_noise_error_states,
280 .num_items = ARRAY_SIZE(quad8_noise_error_states),
281 .get = quad8_get_noise_error
282 };
283
284 static const char *const quad8_count_direction_states[] = {
285 "down",
286 "up"
287 };
288
289 static int quad8_get_count_direction(struct iio_dev *indio_dev,
290 const struct iio_chan_spec *chan)
291 {
292 struct quad8_iio *const priv = iio_priv(indio_dev);
293 const int base_offset = priv->base + 2 * chan->channel + 1;
294
295 return !!(inb(base_offset) & BIT(5));
296 }
297
298 static const struct iio_enum quad8_count_direction_enum = {
299 .items = quad8_count_direction_states,
300 .num_items = ARRAY_SIZE(quad8_count_direction_states),
301 .get = quad8_get_count_direction
302 };
303
304 static const char *const quad8_count_modes[] = {
305 "normal",
306 "range limit",
307 "non-recycle",
308 "modulo-n"
309 };
310
311 static int quad8_set_count_mode(struct iio_dev *indio_dev,
312 const struct iio_chan_spec *chan, unsigned int count_mode)
313 {
314 struct quad8_iio *const priv = iio_priv(indio_dev);
315 unsigned int mode_cfg = count_mode << 1;
316 const int base_offset = priv->base + 2 * chan->channel + 1;
317
318 priv->count_mode[chan->channel] = count_mode;
319
320 /* Add quadrature mode configuration */
321 if (priv->quadrature_mode[chan->channel])
322 mode_cfg |= (priv->quadrature_scale[chan->channel] + 1) << 3;
323
324 /* Load mode configuration to Counter Mode Register */
325 outb(0x20 | mode_cfg, base_offset);
326
327 return 0;
328 }
329
330 static int quad8_get_count_mode(struct iio_dev *indio_dev,
331 const struct iio_chan_spec *chan)
332 {
333 const struct quad8_iio *const priv = iio_priv(indio_dev);
334
335 return priv->count_mode[chan->channel];
336 }
337
338 static const struct iio_enum quad8_count_mode_enum = {
339 .items = quad8_count_modes,
340 .num_items = ARRAY_SIZE(quad8_count_modes),
341 .set = quad8_set_count_mode,
342 .get = quad8_get_count_mode
343 };
344
345 static const char *const quad8_synchronous_modes[] = {
346 "non-synchronous",
347 "synchronous"
348 };
349
350 static int quad8_set_synchronous_mode(struct iio_dev *indio_dev,
351 const struct iio_chan_spec *chan, unsigned int synchronous_mode)
352 {
353 struct quad8_iio *const priv = iio_priv(indio_dev);
354 const unsigned int idr_cfg = synchronous_mode |
355 priv->index_polarity[chan->channel] << 1;
356 const int base_offset = priv->base + 2 * chan->channel + 1;
357
358 /* Index function must be non-synchronous in non-quadrature mode */
359 if (synchronous_mode && !priv->quadrature_mode[chan->channel])
360 return -EINVAL;
361
362 priv->synchronous_mode[chan->channel] = synchronous_mode;
363
364 /* Load Index Control configuration to Index Control Register */
365 outb(0x40 | idr_cfg, base_offset);
366
367 return 0;
368 }
369
370 static int quad8_get_synchronous_mode(struct iio_dev *indio_dev,
371 const struct iio_chan_spec *chan)
372 {
373 const struct quad8_iio *const priv = iio_priv(indio_dev);
374
375 return priv->synchronous_mode[chan->channel];
376 }
377
378 static const struct iio_enum quad8_synchronous_mode_enum = {
379 .items = quad8_synchronous_modes,
380 .num_items = ARRAY_SIZE(quad8_synchronous_modes),
381 .set = quad8_set_synchronous_mode,
382 .get = quad8_get_synchronous_mode
383 };
384
385 static const char *const quad8_quadrature_modes[] = {
386 "non-quadrature",
387 "quadrature"
388 };
389
390 static int quad8_set_quadrature_mode(struct iio_dev *indio_dev,
391 const struct iio_chan_spec *chan, unsigned int quadrature_mode)
392 {
393 struct quad8_iio *const priv = iio_priv(indio_dev);
394 unsigned int mode_cfg = priv->count_mode[chan->channel] << 1;
395 const int base_offset = priv->base + 2 * chan->channel + 1;
396
397 if (quadrature_mode)
398 mode_cfg |= (priv->quadrature_scale[chan->channel] + 1) << 3;
399 else {
400 /* Quadrature scaling only available in quadrature mode */
401 priv->quadrature_scale[chan->channel] = 0;
402
403 /* Synchronous function not supported in non-quadrature mode */
404 if (priv->synchronous_mode[chan->channel])
405 quad8_set_synchronous_mode(indio_dev, chan, 0);
406 }
407
408 priv->quadrature_mode[chan->channel] = quadrature_mode;
409
410 /* Load mode configuration to Counter Mode Register */
411 outb(0x20 | mode_cfg, base_offset);
412
413 return 0;
414 }
415
416 static int quad8_get_quadrature_mode(struct iio_dev *indio_dev,
417 const struct iio_chan_spec *chan)
418 {
419 const struct quad8_iio *const priv = iio_priv(indio_dev);
420
421 return priv->quadrature_mode[chan->channel];
422 }
423
424 static const struct iio_enum quad8_quadrature_mode_enum = {
425 .items = quad8_quadrature_modes,
426 .num_items = ARRAY_SIZE(quad8_quadrature_modes),
427 .set = quad8_set_quadrature_mode,
428 .get = quad8_get_quadrature_mode
429 };
430
431 static const char *const quad8_index_polarity_modes[] = {
432 "negative",
433 "positive"
434 };
435
436 static int quad8_set_index_polarity(struct iio_dev *indio_dev,
437 const struct iio_chan_spec *chan, unsigned int index_polarity)
438 {
439 struct quad8_iio *const priv = iio_priv(indio_dev);
440 const unsigned int idr_cfg = priv->synchronous_mode[chan->channel] |
441 index_polarity << 1;
442 const int base_offset = priv->base + 2 * chan->channel + 1;
443
444 priv->index_polarity[chan->channel] = index_polarity;
445
446 /* Load Index Control configuration to Index Control Register */
447 outb(0x40 | idr_cfg, base_offset);
448
449 return 0;
450 }
451
452 static int quad8_get_index_polarity(struct iio_dev *indio_dev,
453 const struct iio_chan_spec *chan)
454 {
455 const struct quad8_iio *const priv = iio_priv(indio_dev);
456
457 return priv->index_polarity[chan->channel];
458 }
459
460 static const struct iio_enum quad8_index_polarity_enum = {
461 .items = quad8_index_polarity_modes,
462 .num_items = ARRAY_SIZE(quad8_index_polarity_modes),
463 .set = quad8_set_index_polarity,
464 .get = quad8_get_index_polarity
465 };
466
467 static const struct iio_chan_spec_ext_info quad8_count_ext_info[] = {
468 {
469 .name = "preset",
470 .shared = IIO_SEPARATE,
471 .read = quad8_read_preset,
472 .write = quad8_write_preset
473 },
474 {
475 .name = "set_to_preset_on_index",
476 .shared = IIO_SEPARATE,
477 .read = quad8_read_set_to_preset_on_index,
478 .write = quad8_write_set_to_preset_on_index
479 },
480 IIO_ENUM("noise_error", IIO_SEPARATE, &quad8_noise_error_enum),
481 IIO_ENUM_AVAILABLE("noise_error", &quad8_noise_error_enum),
482 IIO_ENUM("count_direction", IIO_SEPARATE, &quad8_count_direction_enum),
483 IIO_ENUM_AVAILABLE("count_direction", &quad8_count_direction_enum),
484 IIO_ENUM("count_mode", IIO_SEPARATE, &quad8_count_mode_enum),
485 IIO_ENUM_AVAILABLE("count_mode", &quad8_count_mode_enum),
486 IIO_ENUM("quadrature_mode", IIO_SEPARATE, &quad8_quadrature_mode_enum),
487 IIO_ENUM_AVAILABLE("quadrature_mode", &quad8_quadrature_mode_enum),
488 {}
489 };
490
491 static const struct iio_chan_spec_ext_info quad8_index_ext_info[] = {
492 IIO_ENUM("synchronous_mode", IIO_SEPARATE,
493 &quad8_synchronous_mode_enum),
494 IIO_ENUM_AVAILABLE("synchronous_mode", &quad8_synchronous_mode_enum),
495 IIO_ENUM("index_polarity", IIO_SEPARATE, &quad8_index_polarity_enum),
496 IIO_ENUM_AVAILABLE("index_polarity", &quad8_index_polarity_enum),
497 {}
498 };
499
500 #define QUAD8_COUNT_CHAN(_chan) { \
501 .type = IIO_COUNT, \
502 .channel = (_chan), \
503 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
504 BIT(IIO_CHAN_INFO_ENABLE) | BIT(IIO_CHAN_INFO_SCALE), \
505 .ext_info = quad8_count_ext_info, \
506 .indexed = 1 \
507 }
508
509 #define QUAD8_INDEX_CHAN(_chan) { \
510 .type = IIO_INDEX, \
511 .channel = (_chan), \
512 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
513 .ext_info = quad8_index_ext_info, \
514 .indexed = 1 \
515 }
516
517 static const struct iio_chan_spec quad8_channels[] = {
518 QUAD8_COUNT_CHAN(0), QUAD8_INDEX_CHAN(0),
519 QUAD8_COUNT_CHAN(1), QUAD8_INDEX_CHAN(1),
520 QUAD8_COUNT_CHAN(2), QUAD8_INDEX_CHAN(2),
521 QUAD8_COUNT_CHAN(3), QUAD8_INDEX_CHAN(3),
522 QUAD8_COUNT_CHAN(4), QUAD8_INDEX_CHAN(4),
523 QUAD8_COUNT_CHAN(5), QUAD8_INDEX_CHAN(5),
524 QUAD8_COUNT_CHAN(6), QUAD8_INDEX_CHAN(6),
525 QUAD8_COUNT_CHAN(7), QUAD8_INDEX_CHAN(7)
526 };
527
528 static int quad8_probe(struct device *dev, unsigned int id)
529 {
530 struct iio_dev *indio_dev;
531 struct quad8_iio *priv;
532 int i, j;
533 unsigned int base_offset;
534
535 indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
536 if (!indio_dev)
537 return -ENOMEM;
538
539 if (!devm_request_region(dev, base[id], QUAD8_EXTENT,
540 dev_name(dev))) {
541 dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
542 base[id], base[id] + QUAD8_EXTENT);
543 return -EBUSY;
544 }
545
546 indio_dev->info = &quad8_info;
547 indio_dev->modes = INDIO_DIRECT_MODE;
548 indio_dev->num_channels = ARRAY_SIZE(quad8_channels);
549 indio_dev->channels = quad8_channels;
550 indio_dev->name = dev_name(dev);
551
552 priv = iio_priv(indio_dev);
553 priv->base = base[id];
554
555 /* Reset all counters and disable interrupt function */
556 outb(0x01, base[id] + 0x11);
557 /* Set initial configuration for all counters */
558 for (i = 0; i < QUAD8_NUM_COUNTERS; i++) {
559 base_offset = base[id] + 2 * i;
560 /* Reset Byte Pointer */
561 outb(0x01, base_offset + 1);
562 /* Reset Preset Register */
563 for (j = 0; j < 3; j++)
564 outb(0x00, base_offset);
565 /* Reset Borrow, Carry, Compare, and Sign flags */
566 outb(0x04, base_offset + 1);
567 /* Reset Error flag */
568 outb(0x06, base_offset + 1);
569 /* Binary encoding; Normal count; non-quadrature mode */
570 outb(0x20, base_offset + 1);
571 /* Disable A and B inputs; preset on index; FLG1 as Carry */
572 outb(0x40, base_offset + 1);
573 /* Disable index function; negative index polarity */
574 outb(0x60, base_offset + 1);
575 }
576 /* Enable all counters */
577 outb(0x00, base[id] + 0x11);
578
579 return devm_iio_device_register(dev, indio_dev);
580 }
581
582 static struct isa_driver quad8_driver = {
583 .probe = quad8_probe,
584 .driver = {
585 .name = "104-quad-8"
586 }
587 };
588
589 module_isa_driver(quad8_driver, num_quad8);
590
591 MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
592 MODULE_DESCRIPTION("ACCES 104-QUAD-8 IIO driver");
593 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support