8 select IRQ_DOMAIN_HIERARCHY
9 select MULTI_IRQ_HANDLER
19 default 2 if ARCH_REALVIEW
34 select MULTI_IRQ_HANDLER
35 select IRQ_DOMAIN_HIERARCHY
36 select PARTITION_PERCPU
42 select ACPI_IORT if ACPI
47 select IRQ_DOMAIN_HIERARCHY
48 select GENERIC_IRQ_CHIP
53 select MULTI_IRQ_HANDLER
57 default 4 if ARCH_S5PV210
61 The maximum number of VICs available in the system, for
64 config ARMADA_370_XP_IRQ
66 select GENERIC_IRQ_CHIP
73 select GENERIC_IRQ_CHIP
77 select GENERIC_IRQ_CHIP
79 select MULTI_IRQ_HANDLER
84 select GENERIC_IRQ_CHIP
86 select MULTI_IRQ_HANDLER
95 select GENERIC_IRQ_CHIP
100 select GENERIC_IRQ_CHIP
103 config BCM7120_L2_IRQ
105 select GENERIC_IRQ_CHIP
108 config BRCMSTB_L2_IRQ
110 select GENERIC_IRQ_CHIP
115 select GENERIC_IRQ_CHIP
118 config HISILICON_IRQ_MBIGEN
121 select ARM_GIC_V3_ITS
125 select GENERIC_IRQ_CHIP
130 select GENERIC_IRQ_CHIP
133 config CLPS711X_IRQCHIP
135 depends on ARCH_CLPS711X
137 select MULTI_IRQ_HANDLER
147 select GENERIC_IRQ_CHIP
153 select MULTI_IRQ_HANDLER
157 select GENERIC_IRQ_CHIP
161 bool "J-Core integrated AIC" if COMPILE_TEST
165 Support for the J-Core integrated AIC.
167 config RENESAS_INTC_IRQPIN
173 select GENERIC_IRQ_CHIP
181 Enables SysCfg Controlled IRQs on STi based platforms.
186 select GENERIC_IRQ_CHIP
191 select GENERIC_IRQ_CHIP
194 tristate "TS-4800 IRQ controller"
197 depends on SOC_IMX51 || COMPILE_TEST
199 Support for the TS-4800 FPGA IRQ controller
201 config VERSATILE_FPGA_IRQ
205 config VERSATILE_FPGA_IRQ_NR
208 depends on VERSATILE_FPGA_IRQ
221 Support for a CROSSBAR ip that precedes the main interrupt controller.
222 The primary irqchip invokes the crossbar's callback which inturn allocates
223 a free irq and configures the IP. Thus the peripheral interrupts are
224 routed to one of the free irqchip interrupt lines.
227 tristate "Keystone 2 IRQ controller IP"
228 depends on ARCH_KEYSTONE
230 Support for Texas Instruments Keystone 2 IRQ controller IP which
231 is part of the Keystone 2 IPC mechanism
235 select GENERIC_IRQ_IPI
236 select IRQ_DOMAIN_HIERARCHY
241 depends on MACH_INGENIC
244 config RENESAS_H8300H_INTC
248 config RENESAS_H8S_INTC
256 Enables the wakeup IRQs for IMX platforms with GPCv2 block
259 def_bool y if MACH_ASM9260 || ARCH_MXS
270 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
271 depends on PCI && PCI_MSI
273 config PARTITION_PERCPU
277 bool "NPS400 Global Interrupt Manager (GIM)"
278 depends on ARC || (COMPILE_TEST && !64BIT)
281 Support the EZchip NPS400 global interrupt controller