sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / media / dvb-frontends / drx39xyj / bsp_i2c.h
blob5b5421f703886a68da09c1e4a64a92f94d43ee0d
1 /*
2 I2C API, implementation depends on board specifics
4 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
5 All rights reserved.
7 Redistribution and use in source and binary forms, with or without
8 modification, are permitted provided that the following conditions are met:
10 * Redistributions of source code must retain the above copyright notice,
11 this list of conditions and the following disclaimer.
12 * Redistributions in binary form must reproduce the above copyright notice,
13 this list of conditions and the following disclaimer in the documentation
14 and/or other materials provided with the distribution.
15 * Neither the name of Trident Microsystems nor Hauppauge Computer Works
16 nor the names of its contributors may be used to endorse or promote
17 products derived from this software without specific prior written
18 permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
32 This module encapsulates I2C access.In some applications several devices
33 share one I2C bus. If these devices have the same I2C address some kind
34 off "switch" must be implemented to ensure error free communication with
35 one device. In case such a "switch" is used, the device ID can be used
36 to implement control over this "switch".
39 #ifndef __BSPI2C_H__
40 #define __BSPI2C_H__
42 #include "bsp_types.h"
45 * This structure contains the I2C address, the device ID and a user_data pointer.
46 * The user_data pointer can be used for application specific purposes.
48 struct i2c_device_addr {
49 u16 i2c_addr; /* The I2C address of the device. */
50 u16 i2c_dev_id; /* The device identifier. */
51 void *user_data; /* User data pointer */
55 /**
56 * \def IS_I2C_10BIT( addr )
57 * \brief Determine if I2C address 'addr' is a 10 bits address or not.
58 * \param addr The I2C address.
59 * \return int.
60 * \retval 0 if address is not a 10 bits I2C address.
61 * \retval 1 if address is a 10 bits I2C address.
63 #define IS_I2C_10BIT(addr) \
64 (((addr) & 0xF8) == 0xF0)
66 /*------------------------------------------------------------------------------
67 Exported FUNCTIONS
68 ------------------------------------------------------------------------------*/
70 /**
71 * \fn drxbsp_i2c_init()
72 * \brief Initialize I2C communication module.
73 * \return drx_status_t Return status.
74 * \retval 0 Initialization successful.
75 * \retval -EIO Initialization failed.
77 drx_status_t drxbsp_i2c_init(void);
79 /**
80 * \fn drxbsp_i2c_term()
81 * \brief Terminate I2C communication module.
82 * \return drx_status_t Return status.
83 * \retval 0 Termination successful.
84 * \retval -EIO Termination failed.
86 drx_status_t drxbsp_i2c_term(void);
88 /**
89 * \fn drx_status_t drxbsp_i2c_write_read( struct i2c_device_addr *w_dev_addr,
90 * u16 w_count,
91 * u8 *wData,
92 * struct i2c_device_addr *r_dev_addr,
93 * u16 r_count,
94 * u8 *r_data)
95 * \brief Read and/or write count bytes from I2C bus, store them in data[].
96 * \param w_dev_addr The device i2c address and the device ID to write to
97 * \param w_count The number of bytes to write
98 * \param wData The array to write the data to
99 * \param r_dev_addr The device i2c address and the device ID to read from
100 * \param r_count The number of bytes to read
101 * \param r_data The array to read the data from
102 * \return drx_status_t Return status.
103 * \retval 0 Succes.
104 * \retval -EIO Failure.
105 * \retval -EINVAL Parameter 'wcount' is not zero but parameter
106 * 'wdata' contains NULL.
107 * Idem for 'rcount' and 'rdata'.
108 * Both w_dev_addr and r_dev_addr are NULL.
110 * This function must implement an atomic write and/or read action on the I2C bus
111 * No other process may use the I2C bus when this function is executing.
112 * The critical section of this function runs from and including the I2C
113 * write, up to and including the I2C read action.
115 * The device ID can be useful if several devices share an I2C address.
116 * It can be used to control a "switch" on the I2C bus to the correct device.
118 drx_status_t drxbsp_i2c_write_read(struct i2c_device_addr *w_dev_addr,
119 u16 w_count,
120 u8 *w_data,
121 struct i2c_device_addr *r_dev_addr,
122 u16 r_count, u8 *r_data);
125 * \fn drxbsp_i2c_error_text()
126 * \brief Returns a human readable error.
127 * Counter part of numerical drx_i2c_error_g.
129 * \return char* Pointer to human readable error text.
131 char *drxbsp_i2c_error_text(void);
134 * \var drx_i2c_error_g;
135 * \brief I2C specific error codes, platform dependent.
137 extern int drx_i2c_error_g;
139 #endif /* __BSPI2C_H__ */