drivers/media/dvb-frontends/si2165.c

   1 /*
   2  *  Driver for Silicon Labs Si2161 DVB-T and Si2165 DVB-C/-T Demodulator
   3  *
   4  *  Copyright (C) 2013-2014 Matthias Schwarzott <zzam@gentoo.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  References:
  17  *  http://www.silabs.com/Support%20Documents/TechnicalDocs/Si2165-short.pdf
  18  */
  19
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/init.h>
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/string.h>
  26 #include <linux/slab.h>
  27 #include <linux/firmware.h>
  28 #include <linux/regmap.h>
  29
  30 #include "dvb_frontend.h"
  31 #include "dvb_math.h"
  32 #include "si2165_priv.h"
  33 #include "si2165.h"
  34
  35 /*
  36  * Hauppauge WinTV-HVR-930C-HD B130 / PCTV QuatroStick 521e 1113xx
  37  * uses 16 MHz xtal
  38  *
  39  * Hauppauge WinTV-HVR-930C-HD B131 / PCTV QuatroStick 522e 1114xx
  40  * uses 24 MHz clock provided by tuner
  41  */
  42
  43 struct si2165_state {
  44         struct i2c_client *client;
  45
  46         struct regmap *regmap;
  47
  48         struct dvb_frontend fe;
  49
  50         struct si2165_config config;
  51
  52         u8 chip_revcode;
  53         u8 chip_type;
  54
  55         /* calculated by xtal and div settings */
  56         u32 fvco_hz;
  57         u32 sys_clk;
  58         u32 adc_clk;
  59
  60         bool has_dvbc;
  61         bool has_dvbt;
  62         bool firmware_loaded;
  63 };
  64
  65 #define DEBUG_OTHER     0x01
  66 #define DEBUG_I2C_WRITE 0x02
  67 #define DEBUG_I2C_READ  0x04
  68 #define DEBUG_REG_READ  0x08
  69 #define DEBUG_REG_WRITE 0x10
  70 #define DEBUG_FW_LOAD   0x20
  71
  72 static int debug = 0x00;
  73
  74 #define dprintk(args...) \
  75         do { \
  76                 if (debug & DEBUG_OTHER) \
  77                         printk(KERN_DEBUG "si2165: " args); \
  78         } while (0)
  79
  80 #define deb_i2c_write(args...) \
  81         do { \
  82                 if (debug & DEBUG_I2C_WRITE) \
  83                         printk(KERN_DEBUG "si2165: i2c write: " args); \
  84         } while (0)
  85
  86 #define deb_i2c_read(args...) \
  87         do { \
  88                 if (debug & DEBUG_I2C_READ) \
  89                         printk(KERN_DEBUG "si2165: i2c read: " args); \
  90         } while (0)
  91
  92 #define deb_readreg(args...) \
  93         do { \
  94                 if (debug & DEBUG_REG_READ) \
  95                         printk(KERN_DEBUG "si2165: reg read: " args); \
  96         } while (0)
  97
  98 #define deb_writereg(args...) \
  99         do { \
 100                 if (debug & DEBUG_REG_WRITE) \
 101                         printk(KERN_DEBUG "si2165: reg write: " args); \
 102         } while (0)
 103
 104 #define deb_fw_load(args...) \
 105         do { \
 106                 if (debug & DEBUG_FW_LOAD) \
 107                         printk(KERN_DEBUG "si2165: fw load: " args); \
 108         } while (0)
 109
 110 static int si2165_write(struct si2165_state *state, const u16 reg,
 111                        const u8 *src, const int count)
 112 {
 113         int ret;
 114
 115         if (debug & DEBUG_I2C_WRITE)
 116                 deb_i2c_write("reg: 0x%04x, data: %*ph\n", reg, count, src);
 117
 118         ret = regmap_bulk_write(state->regmap, reg, src, count);
 119
 120         if (ret)
 121                 dev_err(&state->client->dev, "%s: ret == %d\n", __func__, ret);
 122
 123         return ret;
 124 }
 125
 126 static int si2165_read(struct si2165_state *state,
 127                        const u16 reg, u8 *val, const int count)
 128 {
 129         int ret = regmap_bulk_read(state->regmap, reg, val, count);
 130
 131         if (ret) {
 132                 dev_err(&state->client->dev, "%s: error (addr %02x reg %04x error (ret == %i)\n",
 133                         __func__, state->config.i2c_addr, reg, ret);
 134                 return ret;
 135         }
 136
 137         if (debug & DEBUG_I2C_READ)
 138                 deb_i2c_read("reg: 0x%04x, data: %*ph\n", reg, count, val);
 139
 140         return 0;
 141 }
 142
 143 static int si2165_readreg8(struct si2165_state *state,
 144                        const u16 reg, u8 *val)
 145 {
 146         unsigned int val_tmp;
 147         int ret = regmap_read(state->regmap, reg, &val_tmp);
 148         *val = (u8)val_tmp;
 149         deb_readreg("R(0x%04x)=0x%02x\n", reg, *val);
 150         return ret;
 151 }
 152
 153 static int si2165_readreg16(struct si2165_state *state,
 154                        const u16 reg, u16 *val)
 155 {
 156         u8 buf[2];
 157
 158         int ret = si2165_read(state, reg, buf, 2);
 159         *val = buf[0] | buf[1] << 8;
 160         deb_readreg("R(0x%04x)=0x%04x\n", reg, *val);
 161         return ret;
 162 }
 163
 164 static int si2165_writereg8(struct si2165_state *state, const u16 reg, u8 val)
 165 {
 166         return regmap_write(state->regmap, reg, val);
 167 }
 168
 169 static int si2165_writereg16(struct si2165_state *state, const u16 reg, u16 val)
 170 {
 171         u8 buf[2] = { val & 0xff, (val >> 8) & 0xff };
 172
 173         return si2165_write(state, reg, buf, 2);
 174 }
 175
 176 static int si2165_writereg24(struct si2165_state *state, const u16 reg, u32 val)
 177 {
 178         u8 buf[3] = { val & 0xff, (val >> 8) & 0xff, (val >> 16) & 0xff };
 179
 180         return si2165_write(state, reg, buf, 3);
 181 }
 182
 183 static int si2165_writereg32(struct si2165_state *state, const u16 reg, u32 val)
 184 {
 185         u8 buf[4] = {
 186                 val & 0xff,
 187                 (val >> 8) & 0xff,
 188                 (val >> 16) & 0xff,
 189                 (val >> 24) & 0xff
 190         };
 191         return si2165_write(state, reg, buf, 4);
 192 }
 193
 194 static int si2165_writereg_mask8(struct si2165_state *state, const u16 reg,
 195                                  u8 val, u8 mask)
 196 {
 197         if (mask != 0xff) {
 198                 u8 tmp;
 199                 int ret = si2165_readreg8(state, reg, &tmp);
 200
 201                 if (ret < 0)
 202                         return ret;
 203
 204                 val &= mask;
 205                 tmp &= ~mask;
 206                 val |= tmp;
 207         }
 208         return si2165_writereg8(state, reg, val);
 209 }
 210
 211 #define REG16(reg, val) { (reg), (val) & 0xff }, { (reg)+1, (val)>>8 & 0xff }
 212 struct si2165_reg_value_pair {
 213         u16 reg;
 214         u8 val;
 215 };
 216
 217 static int si2165_write_reg_list(struct si2165_state *state,
 218                                  const struct si2165_reg_value_pair *regs,
 219                                  int count)
 220 {
 221         int i;
 222         int ret;
 223
 224         for (i = 0; i < count; i++) {
 225                 ret = si2165_writereg8(state, regs[i].reg, regs[i].val);
 226                 if (ret < 0)
 227                         return ret;
 228         }
 229         return 0;
 230 }
 231
 232 static int si2165_get_tune_settings(struct dvb_frontend *fe,
 233                                     struct dvb_frontend_tune_settings *s)
 234 {
 235         s->min_delay_ms = 1000;
 236         return 0;
 237 }
 238
 239 static int si2165_init_pll(struct si2165_state *state)
 240 {
 241         u32 ref_freq_Hz = state->config.ref_freq_Hz;
 242         u8 divr = 1; /* 1..7 */
 243         u8 divp = 1; /* only 1 or 4 */
 244         u8 divn = 56; /* 1..63 */
 245         u8 divm = 8;
 246         u8 divl = 12;
 247         u8 buf[4];
 248
 249         /*
 250          * hardcoded values can be deleted if calculation is verified
 251          * or it yields the same values as the windows driver
 252          */
 253         switch (ref_freq_Hz) {
 254         case 16000000u:
 255                 divn = 56;
 256                 break;
 257         case 24000000u:
 258                 divr = 2;
 259                 divp = 4;
 260                 divn = 19;
 261                 break;
 262         default:
 263                 /* ref_freq / divr must be between 4 and 16 MHz */
 264                 if (ref_freq_Hz > 16000000u)
 265                         divr = 2;
 266
 267                 /*
 268                  * now select divn and divp such that
 269                  * fvco is in 1624..1824 MHz
 270                  */
 271                 if (1624000000u * divr > ref_freq_Hz * 2u * 63u)
 272                         divp = 4;
 273
 274                 /* is this already correct regarding rounding? */
 275                 divn = 1624000000u * divr / (ref_freq_Hz * 2u * divp);
 276                 break;
 277         }
 278
 279         /* adc_clk and sys_clk depend on xtal and pll settings */
 280         state->fvco_hz = ref_freq_Hz / divr
 281                         * 2u * divn * divp;
 282         state->adc_clk = state->fvco_hz / (divm * 4u);
 283         state->sys_clk = state->fvco_hz / (divl * 2u);
 284
 285         /* write pll registers 0x00a0..0x00a3 at once */
 286         buf[0] = divl;
 287         buf[1] = divm;
 288         buf[2] = (divn & 0x3f) | ((divp == 1) ? 0x40 : 0x00) | 0x80;
 289         buf[3] = divr;
 290         return si2165_write(state, 0x00a0, buf, 4);
 291 }
 292
 293 static int si2165_adjust_pll_divl(struct si2165_state *state, u8 divl)
 294 {
 295         state->sys_clk = state->fvco_hz / (divl * 2u);
 296         return si2165_writereg8(state, 0x00a0, divl); /* pll_divl */
 297 }
 298
 299 static u32 si2165_get_fe_clk(struct si2165_state *state)
 300 {
 301         /* assume Oversampling mode Ovr4 is used */
 302         return state->adc_clk;
 303 }
 304
 305 static int si2165_wait_init_done(struct si2165_state *state)
 306 {
 307         int ret = -EINVAL;
 308         u8 val = 0;
 309         int i;
 310
 311         for (i = 0; i < 3; ++i) {
 312                 si2165_readreg8(state, 0x0054, &val);
 313                 if (val == 0x01)
 314                         return 0;
 315                 usleep_range(1000, 50000);
 316         }
 317         dev_err(&state->client->dev, "%s: init_done was not set\n",
 318                 KBUILD_MODNAME);
 319         return ret;
 320 }
 321
 322 static int si2165_upload_firmware_block(struct si2165_state *state,
 323         const u8 *data, u32 len, u32 *poffset, u32 block_count)
 324 {
 325         int ret;
 326         u8 buf_ctrl[4] = { 0x00, 0x00, 0x00, 0xc0 };
 327         u8 wordcount;
 328         u32 cur_block = 0;
 329         u32 offset = poffset ? *poffset : 0;
 330
 331         if (len < 4)
 332                 return -EINVAL;
 333         if (len % 4 != 0)
 334                 return -EINVAL;
 335
 336         deb_fw_load(
 337                 "si2165_upload_firmware_block called with len=0x%x offset=0x%x blockcount=0x%x\n",
 338                                 len, offset, block_count);
 339         while (offset+12 <= len && cur_block < block_count) {
 340                 deb_fw_load(
 341                         "si2165_upload_firmware_block in while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
 342                                         len, offset, cur_block, block_count);
 343                 wordcount = data[offset];
 344                 if (wordcount < 1 || data[offset+1] ||
 345                     data[offset+2] || data[offset+3]) {
 346                         dev_warn(&state->client->dev,
 347                                  "%s: bad fw data[0..3] = %*ph\n",
 348                                 KBUILD_MODNAME, 4, data);
 349                         return -EINVAL;
 350                 }
 351
 352                 if (offset + 8 + wordcount * 4 > len) {
 353                         dev_warn(&state->client->dev,
 354                                  "%s: len is too small for block len=%d, wordcount=%d\n",
 355                                 KBUILD_MODNAME, len, wordcount);
 356                         return -EINVAL;
 357                 }
 358
 359                 buf_ctrl[0] = wordcount - 1;
 360
 361                 ret = si2165_write(state, 0x0364, buf_ctrl, 4);
 362                 if (ret < 0)
 363                         goto error;
 364                 ret = si2165_write(state, 0x0368, data+offset+4, 4);
 365                 if (ret < 0)
 366                         goto error;
 367
 368                 offset += 8;
 369
 370                 while (wordcount > 0) {
 371                         ret = si2165_write(state, 0x36c, data+offset, 4);
 372                         if (ret < 0)
 373                                 goto error;
 374                         wordcount--;
 375                         offset += 4;
 376                 }
 377                 cur_block++;
 378         }
 379
 380         deb_fw_load(
 381                 "si2165_upload_firmware_block after while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
 382                                 len, offset, cur_block, block_count);
 383
 384         if (poffset)
 385                 *poffset = offset;
 386
 387         deb_fw_load("si2165_upload_firmware_block returned offset=0x%x\n",
 388                                 offset);
 389
 390         return 0;
 391 error:
 392         return ret;
 393 }
 394
 395 static int si2165_upload_firmware(struct si2165_state *state)
 396 {
 397         /* int ret; */
 398         u8 val[3];
 399         u16 val16;
 400         int ret;
 401
 402         const struct firmware *fw = NULL;
 403         u8 *fw_file;
 404         const u8 *data;
 405         u32 len;
 406         u32 offset;
 407         u8 patch_version;
 408         u8 block_count;
 409         u16 crc_expected;
 410
 411         switch (state->chip_revcode) {
 412         case 0x03: /* revision D */
 413                 fw_file = SI2165_FIRMWARE_REV_D;
 414                 break;
 415         default:
 416                 dev_info(&state->client->dev, "%s: no firmware file for revision=%d\n",
 417                         KBUILD_MODNAME, state->chip_revcode);
 418                 return 0;
 419         }
 420
 421         /* request the firmware, this will block and timeout */
 422         ret = request_firmware(&fw, fw_file, &state->client->dev);
 423         if (ret) {
 424                 dev_warn(&state->client->dev, "%s: firmware file '%s' not found\n",
 425                                 KBUILD_MODNAME, fw_file);
 426                 goto error;
 427         }
 428
 429         data = fw->data;
 430         len = fw->size;
 431
 432         dev_info(&state->client->dev, "%s: downloading firmware from file '%s' size=%d\n",
 433                         KBUILD_MODNAME, fw_file, len);
 434
 435         if (len % 4 != 0) {
 436                 dev_warn(&state->client->dev, "%s: firmware size is not multiple of 4\n",
 437                                 KBUILD_MODNAME);
 438                 ret = -EINVAL;
 439                 goto error;
 440         }
 441
 442         /* check header (8 bytes) */
 443         if (len < 8) {
 444                 dev_warn(&state->client->dev, "%s: firmware header is missing\n",
 445                                 KBUILD_MODNAME);
 446                 ret = -EINVAL;
 447                 goto error;
 448         }
 449
 450         if (data[0] != 1 || data[1] != 0) {
 451                 dev_warn(&state->client->dev, "%s: firmware file version is wrong\n",
 452                                 KBUILD_MODNAME);
 453                 ret = -EINVAL;
 454                 goto error;
 455         }
 456
 457         patch_version = data[2];
 458         block_count = data[4];
 459         crc_expected = data[7] << 8 | data[6];
 460
 461         /* start uploading fw */
 462         /* boot/wdog status */
 463         ret = si2165_writereg8(state, 0x0341, 0x00);
 464         if (ret < 0)
 465                 goto error;
 466         /* reset */
 467         ret = si2165_writereg8(state, 0x00c0, 0x00);
 468         if (ret < 0)
 469                 goto error;
 470         /* boot/wdog status */
 471         ret = si2165_readreg8(state, 0x0341, val);
 472         if (ret < 0)
 473                 goto error;
 474
 475         /* enable reset on error */
 476         ret = si2165_readreg8(state, 0x035c, val);
 477         if (ret < 0)
 478                 goto error;
 479         ret = si2165_readreg8(state, 0x035c, val);
 480         if (ret < 0)
 481                 goto error;
 482         ret = si2165_writereg8(state, 0x035c, 0x02);
 483         if (ret < 0)
 484                 goto error;
 485
 486         /* start right after the header */
 487         offset = 8;
 488
 489         dev_info(&state->client->dev, "%s: si2165_upload_firmware extracted patch_version=0x%02x, block_count=0x%02x, crc_expected=0x%04x\n",
 490                 KBUILD_MODNAME, patch_version, block_count, crc_expected);
 491
 492         ret = si2165_upload_firmware_block(state, data, len, &offset, 1);
 493         if (ret < 0)
 494                 goto error;
 495
 496         ret = si2165_writereg8(state, 0x0344, patch_version);
 497         if (ret < 0)
 498                 goto error;
 499
 500         /* reset crc */
 501         ret = si2165_writereg8(state, 0x0379, 0x01);
 502         if (ret)
 503                 goto error;
 504
 505         ret = si2165_upload_firmware_block(state, data, len,
 506                                            &offset, block_count);
 507         if (ret < 0) {
 508                 dev_err(&state->client->dev,
 509                         "%s: firmware could not be uploaded\n",
 510                         KBUILD_MODNAME);
 511                 goto error;
 512         }
 513
 514         /* read crc */
 515         ret = si2165_readreg16(state, 0x037a, &val16);
 516         if (ret)
 517                 goto error;
 518
 519         if (val16 != crc_expected) {
 520                 dev_err(&state->client->dev,
 521                         "%s: firmware crc mismatch %04x != %04x\n",
 522                         KBUILD_MODNAME, val16, crc_expected);
 523                 ret = -EINVAL;
 524                 goto error;
 525         }
 526
 527         ret = si2165_upload_firmware_block(state, data, len, &offset, 5);
 528         if (ret)
 529                 goto error;
 530
 531         if (len != offset) {
 532                 dev_err(&state->client->dev,
 533                         "%s: firmware len mismatch %04x != %04x\n",
 534                         KBUILD_MODNAME, len, offset);
 535                 ret = -EINVAL;
 536                 goto error;
 537         }
 538
 539         /* reset watchdog error register */
 540         ret = si2165_writereg_mask8(state, 0x0341, 0x02, 0x02);
 541         if (ret < 0)
 542                 goto error;
 543
 544         /* enable reset on error */
 545         ret = si2165_writereg_mask8(state, 0x035c, 0x01, 0x01);
 546         if (ret < 0)
 547                 goto error;
 548
 549         dev_info(&state->client->dev, "%s: fw load finished\n", KBUILD_MODNAME);
 550
 551         ret = 0;
 552         state->firmware_loaded = true;
 553 error:
 554         if (fw) {
 555                 release_firmware(fw);
 556                 fw = NULL;
 557         }
 558
 559         return ret;
 560 }
 561
 562 static int si2165_init(struct dvb_frontend *fe)
 563 {
 564         int ret = 0;
 565         struct si2165_state *state = fe->demodulator_priv;
 566         u8 val;
 567         u8 patch_version = 0x00;
 568
 569         dprintk("%s: called\n", __func__);
 570
 571         /* powerup */
 572         ret = si2165_writereg8(state, 0x0000, state->config.chip_mode);
 573         if (ret < 0)
 574                 goto error;
 575         /* dsp_clock_enable */
 576         ret = si2165_writereg8(state, 0x0104, 0x01);
 577         if (ret < 0)
 578                 goto error;
 579         ret = si2165_readreg8(state, 0x0000, &val); /* verify chip_mode */
 580         if (ret < 0)
 581                 goto error;
 582         if (val != state->config.chip_mode) {
 583                 dev_err(&state->client->dev, "%s: could not set chip_mode\n",
 584                         KBUILD_MODNAME);
 585                 return -EINVAL;
 586         }
 587
 588         /* agc */
 589         ret = si2165_writereg8(state, 0x018b, 0x00);
 590         if (ret < 0)
 591                 goto error;
 592         ret = si2165_writereg8(state, 0x0190, 0x01);
 593         if (ret < 0)
 594                 goto error;
 595         ret = si2165_writereg8(state, 0x0170, 0x00);
 596         if (ret < 0)
 597                 goto error;
 598         ret = si2165_writereg8(state, 0x0171, 0x07);
 599         if (ret < 0)
 600                 goto error;
 601         /* rssi pad */
 602         ret = si2165_writereg8(state, 0x0646, 0x00);
 603         if (ret < 0)
 604                 goto error;
 605         ret = si2165_writereg8(state, 0x0641, 0x00);
 606         if (ret < 0)
 607                 goto error;
 608
 609         ret = si2165_init_pll(state);
 610         if (ret < 0)
 611                 goto error;
 612
 613         /* enable chip_init */
 614         ret = si2165_writereg8(state, 0x0050, 0x01);
 615         if (ret < 0)
 616                 goto error;
 617         /* set start_init */
 618         ret = si2165_writereg8(state, 0x0096, 0x01);
 619         if (ret < 0)
 620                 goto error;
 621         ret = si2165_wait_init_done(state);
 622         if (ret < 0)
 623                 goto error;
 624
 625         /* disable chip_init */
 626         ret = si2165_writereg8(state, 0x0050, 0x00);
 627         if (ret < 0)
 628                 goto error;
 629
 630         /* ber_pkt */
 631         ret = si2165_writereg16(state, 0x0470, 0x7530);
 632         if (ret < 0)
 633                 goto error;
 634
 635         ret = si2165_readreg8(state, 0x0344, &patch_version);
 636         if (ret < 0)
 637                 goto error;
 638
 639         ret = si2165_writereg8(state, 0x00cb, 0x00);
 640         if (ret < 0)
 641                 goto error;
 642
 643         /* dsp_addr_jump */
 644         ret = si2165_writereg32(state, 0x0348, 0xf4000000);
 645         if (ret < 0)
 646                 goto error;
 647         /* boot/wdog status */
 648         ret = si2165_readreg8(state, 0x0341, &val);
 649         if (ret < 0)
 650                 goto error;
 651
 652         if (patch_version == 0x00) {
 653                 ret = si2165_upload_firmware(state);
 654                 if (ret < 0)
 655                         goto error;
 656         }
 657
 658         /* ts output config */
 659         ret = si2165_writereg8(state, 0x04e4, 0x20);
 660         if (ret < 0)
 661                 return ret;
 662         ret = si2165_writereg16(state, 0x04ef, 0x00fe);
 663         if (ret < 0)
 664                 return ret;
 665         ret = si2165_writereg24(state, 0x04f4, 0x555555);
 666         if (ret < 0)
 667                 return ret;
 668         ret = si2165_writereg8(state, 0x04e5, 0x01);
 669         if (ret < 0)
 670                 return ret;
 671
 672         return 0;
 673 error:
 674         return ret;
 675 }
 676
 677 static int si2165_sleep(struct dvb_frontend *fe)
 678 {
 679         int ret;
 680         struct si2165_state *state = fe->demodulator_priv;
 681
 682         /* dsp clock disable */
 683         ret = si2165_writereg8(state, 0x0104, 0x00);
 684         if (ret < 0)
 685                 return ret;
 686         /* chip mode */
 687         ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF);
 688         if (ret < 0)
 689                 return ret;
 690         return 0;
 691 }
 692
 693 static int si2165_read_status(struct dvb_frontend *fe, enum fe_status *status)
 694 {
 695         int ret;
 696         u8 fec_lock = 0;
 697         struct si2165_state *state = fe->demodulator_priv;
 698
 699         if (!state->has_dvbt)
 700                 return -EINVAL;
 701
 702         /* check fec_lock */
 703         ret = si2165_readreg8(state, 0x4e0, &fec_lock);
 704         if (ret < 0)
 705                 return ret;
 706         *status = 0;
 707         if (fec_lock & 0x01) {
 708                 *status |= FE_HAS_SIGNAL;
 709                 *status |= FE_HAS_CARRIER;
 710                 *status |= FE_HAS_VITERBI;
 711                 *status |= FE_HAS_SYNC;
 712                 *status |= FE_HAS_LOCK;
 713         }
 714
 715         return 0;
 716 }
 717
 718 static int si2165_set_oversamp(struct si2165_state *state, u32 dvb_rate)
 719 {
 720         u64 oversamp;
 721         u32 reg_value;
 722
 723         if (!dvb_rate)
 724                 return -EINVAL;
 725
 726         oversamp = si2165_get_fe_clk(state);
 727         oversamp <<= 23;
 728         do_div(oversamp, dvb_rate);
 729         reg_value = oversamp & 0x3fffffff;
 730
 731         dprintk("%s: Write oversamp=%#x\n", __func__, reg_value);
 732         return si2165_writereg32(state, 0x00e4, reg_value);
 733 }
 734
 735 static int si2165_set_if_freq_shift(struct si2165_state *state)
 736 {
 737         struct dvb_frontend *fe = &state->fe;
 738         u64 if_freq_shift;
 739         s32 reg_value = 0;
 740         u32 fe_clk = si2165_get_fe_clk(state);
 741         u32 IF = 0;
 742
 743         if (!fe->ops.tuner_ops.get_if_frequency) {
 744                 dev_err(&state->client->dev,
 745                         "%s: Error: get_if_frequency() not defined at tuner. Can't work without it!\n",
 746                         KBUILD_MODNAME);
 747                 return -EINVAL;
 748         }
 749
 750         if (!fe_clk)
 751                 return -EINVAL;
 752
 753         fe->ops.tuner_ops.get_if_frequency(fe, &IF);
 754         if_freq_shift = IF;
 755         if_freq_shift <<= 29;
 756
 757         do_div(if_freq_shift, fe_clk);
 758         reg_value = (s32)if_freq_shift;
 759
 760         if (state->config.inversion)
 761                 reg_value = -reg_value;
 762
 763         reg_value = reg_value & 0x1fffffff;
 764
 765         /* if_freq_shift, usbdump contained 0x023ee08f; */
 766         return si2165_writereg32(state, 0x00e8, reg_value);
 767 }
 768
 769 static const struct si2165_reg_value_pair dvbt_regs[] = {
 770         /* standard = DVB-T */
 771         { 0x00ec, 0x01 },
 772         { 0x08f8, 0x00 },
 773         /* impulsive_noise_remover */
 774         { 0x031c, 0x01 },
 775         { 0x00cb, 0x00 },
 776         /* agc2 */
 777         { 0x016e, 0x41 },
 778         { 0x016c, 0x0e },
 779         { 0x016d, 0x10 },
 780         /* agc */
 781         { 0x015b, 0x03 },
 782         { 0x0150, 0x78 },
 783         /* agc */
 784         { 0x01a0, 0x78 },
 785         { 0x01c8, 0x68 },
 786         /* freq_sync_range */
 787         REG16(0x030c, 0x0064),
 788         /* gp_reg0 */
 789         { 0x0387, 0x00 }
 790 };
 791
 792 static int si2165_set_frontend_dvbt(struct dvb_frontend *fe)
 793 {
 794         int ret;
 795         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 796         struct si2165_state *state = fe->demodulator_priv;
 797         u32 dvb_rate = 0;
 798         u16 bw10k;
 799         u32 bw_hz = p->bandwidth_hz;
 800
 801         dprintk("%s: called\n", __func__);
 802
 803         if (!state->has_dvbt)
 804                 return -EINVAL;
 805
 806         /* no bandwidth auto-detection */
 807         if (bw_hz == 0)
 808                 return -EINVAL;
 809
 810         dvb_rate = bw_hz * 8 / 7;
 811         bw10k = bw_hz / 10000;
 812
 813         ret = si2165_adjust_pll_divl(state, 12);
 814         if (ret < 0)
 815                 return ret;
 816
 817         /* bandwidth in 10KHz steps */
 818         ret = si2165_writereg16(state, 0x0308, bw10k);
 819         if (ret < 0)
 820                 return ret;
 821         ret = si2165_set_oversamp(state, dvb_rate);
 822         if (ret < 0)
 823                 return ret;
 824
 825         ret = si2165_write_reg_list(state, dvbt_regs, ARRAY_SIZE(dvbt_regs));
 826         if (ret < 0)
 827                 return ret;
 828
 829         return 0;
 830 }
 831
 832 static const struct si2165_reg_value_pair dvbc_regs[] = {
 833         /* standard = DVB-C */
 834         { 0x00ec, 0x05 },
 835         { 0x08f8, 0x00 },
 836
 837         /* agc2 */
 838         { 0x016e, 0x50 },
 839         { 0x016c, 0x0e },
 840         { 0x016d, 0x10 },
 841         /* agc */
 842         { 0x015b, 0x03 },
 843         { 0x0150, 0x68 },
 844         /* agc */
 845         { 0x01a0, 0x68 },
 846         { 0x01c8, 0x50 },
 847
 848         { 0x0278, 0x0d },
 849
 850         { 0x023a, 0x05 },
 851         { 0x0261, 0x09 },
 852         REG16(0x0350, 0x3e80),
 853         { 0x02f4, 0x00 },
 854
 855         { 0x00cb, 0x01 },
 856         REG16(0x024c, 0x0000),
 857         REG16(0x027c, 0x0000),
 858         { 0x0232, 0x03 },
 859         { 0x02f4, 0x0b },
 860         { 0x018b, 0x00 },
 861 };
 862
 863 static int si2165_set_frontend_dvbc(struct dvb_frontend *fe)
 864 {
 865         struct si2165_state *state = fe->demodulator_priv;
 866         int ret;
 867         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 868         const u32 dvb_rate = p->symbol_rate;
 869         const u32 bw_hz = p->bandwidth_hz;
 870
 871         if (!state->has_dvbc)
 872                 return -EINVAL;
 873
 874         if (dvb_rate == 0)
 875                 return -EINVAL;
 876
 877         ret = si2165_adjust_pll_divl(state, 14);
 878         if (ret < 0)
 879                 return ret;
 880
 881         /* Oversampling */
 882         ret = si2165_set_oversamp(state, dvb_rate);
 883         if (ret < 0)
 884                 return ret;
 885
 886         ret = si2165_writereg32(state, 0x00c4, bw_hz);
 887         if (ret < 0)
 888                 return ret;
 889
 890         ret = si2165_write_reg_list(state, dvbc_regs, ARRAY_SIZE(dvbc_regs));
 891         if (ret < 0)
 892                 return ret;
 893
 894         return 0;
 895 }
 896
 897 static const struct si2165_reg_value_pair agc_rewrite[] = {
 898         { 0x012a, 0x46 },
 899         { 0x012c, 0x00 },
 900         { 0x012e, 0x0a },
 901         { 0x012f, 0xff },
 902         { 0x0123, 0x70 }
 903 };
 904
 905 static int si2165_set_frontend(struct dvb_frontend *fe)
 906 {
 907         struct si2165_state *state = fe->demodulator_priv;
 908         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 909         u32 delsys = p->delivery_system;
 910         int ret;
 911         u8 val[3];
 912
 913         /* initial setting of if freq shift */
 914         ret = si2165_set_if_freq_shift(state);
 915         if (ret < 0)
 916                 return ret;
 917
 918         switch (delsys) {
 919         case SYS_DVBT:
 920                 ret = si2165_set_frontend_dvbt(fe);
 921                 if (ret < 0)
 922                         return ret;
 923                 break;
 924         case SYS_DVBC_ANNEX_A:
 925                 ret = si2165_set_frontend_dvbc(fe);
 926                 if (ret < 0)
 927                         return ret;
 928                 break;
 929         default:
 930                 return -EINVAL;
 931         }
 932
 933         /* dsp_addr_jump */
 934         ret = si2165_writereg32(state, 0x0348, 0xf4000000);
 935         if (ret < 0)
 936                 return ret;
 937
 938         if (fe->ops.tuner_ops.set_params)
 939                 fe->ops.tuner_ops.set_params(fe);
 940
 941         /* recalc if_freq_shift if IF might has changed */
 942         ret = si2165_set_if_freq_shift(state);
 943         if (ret < 0)
 944                 return ret;
 945
 946         /* boot/wdog status */
 947         ret = si2165_readreg8(state, 0x0341, val);
 948         if (ret < 0)
 949                 return ret;
 950         ret = si2165_writereg8(state, 0x0341, 0x00);
 951         if (ret < 0)
 952                 return ret;
 953
 954         /* reset all */
 955         ret = si2165_writereg8(state, 0x00c0, 0x00);
 956         if (ret < 0)
 957                 return ret;
 958         /* gp_reg0 */
 959         ret = si2165_writereg32(state, 0x0384, 0x00000000);
 960         if (ret < 0)
 961                 return ret;
 962
 963         /* write adc values after each reset*/
 964         ret = si2165_write_reg_list(state, agc_rewrite,
 965                                     ARRAY_SIZE(agc_rewrite));
 966         if (ret < 0)
 967                 return ret;
 968
 969         /* start_synchro */
 970         ret = si2165_writereg8(state, 0x02e0, 0x01);
 971         if (ret < 0)
 972                 return ret;
 973         /* boot/wdog status */
 974         ret = si2165_readreg8(state, 0x0341, val);
 975         if (ret < 0)
 976                 return ret;
 977
 978         return 0;
 979 }
 980
 981 static const struct dvb_frontend_ops si2165_ops = {
 982         .info = {
 983                 .name = "Silicon Labs ",
 984                  /* For DVB-C */
 985                 .symbol_rate_min = 1000000,
 986                 .symbol_rate_max = 7200000,
 987                 /* For DVB-T */
 988                 .frequency_stepsize = 166667,
 989                 .caps = FE_CAN_FEC_1_2 |
 990                         FE_CAN_FEC_2_3 |
 991                         FE_CAN_FEC_3_4 |
 992                         FE_CAN_FEC_5_6 |
 993                         FE_CAN_FEC_7_8 |
 994                         FE_CAN_FEC_AUTO |
 995                         FE_CAN_QPSK |
 996                         FE_CAN_QAM_16 |
 997                         FE_CAN_QAM_32 |
 998                         FE_CAN_QAM_64 |
 999                         FE_CAN_QAM_128 |
1000                         FE_CAN_QAM_256 |
1001                         FE_CAN_QAM_AUTO |
1002                         FE_CAN_GUARD_INTERVAL_AUTO |
1003                         FE_CAN_HIERARCHY_AUTO |
1004                         FE_CAN_MUTE_TS |
1005                         FE_CAN_TRANSMISSION_MODE_AUTO |
1006                         FE_CAN_RECOVER
1007         },
1008
1009         .get_tune_settings = si2165_get_tune_settings,
1010
1011         .init = si2165_init,
1012         .sleep = si2165_sleep,
1013
1014         .set_frontend      = si2165_set_frontend,
1015         .read_status       = si2165_read_status,
1016 };
1017
1018 static int si2165_probe(struct i2c_client *client,
1019                 const struct i2c_device_id *id)
1020 {
1021         struct si2165_state *state = NULL;
1022         struct si2165_platform_data *pdata = client->dev.platform_data;
1023         int n;
1024         int ret = 0;
1025         u8 val;
1026         char rev_char;
1027         const char *chip_name;
1028         static const struct regmap_config regmap_config = {
1029                 .reg_bits = 16,
1030                 .val_bits = 8,
1031                 .max_register = 0x08ff,
1032         };
1033
1034         /* allocate memory for the internal state */
1035         state = kzalloc(sizeof(struct si2165_state), GFP_KERNEL);
1036         if (state == NULL) {
1037                 ret = -ENOMEM;
1038                 goto error;
1039         }
1040
1041         /* create regmap */
1042         state->regmap = devm_regmap_init_i2c(client, &regmap_config);
1043         if (IS_ERR(state->regmap)) {
1044                 ret = PTR_ERR(state->regmap);
1045                 goto error;
1046         }
1047
1048         /* setup the state */
1049         state->client = client;
1050         state->config.i2c_addr = client->addr;
1051         state->config.chip_mode = pdata->chip_mode;
1052         state->config.ref_freq_Hz = pdata->ref_freq_Hz;
1053         state->config.inversion = pdata->inversion;
1054
1055         if (state->config.ref_freq_Hz < 4000000
1056             || state->config.ref_freq_Hz > 27000000) {
1057                 dev_err(&state->client->dev, "%s: ref_freq of %d Hz not supported by this driver\n",
1058                          KBUILD_MODNAME, state->config.ref_freq_Hz);
1059                 ret = -EINVAL;
1060                 goto error;
1061         }
1062
1063         /* create dvb_frontend */
1064         memcpy(&state->fe.ops, &si2165_ops,
1065                 sizeof(struct dvb_frontend_ops));
1066         state->fe.ops.release = NULL;
1067         state->fe.demodulator_priv = state;
1068         i2c_set_clientdata(client, state);
1069
1070         /* powerup */
1071         ret = si2165_writereg8(state, 0x0000, state->config.chip_mode);
1072         if (ret < 0)
1073                 goto nodev_error;
1074
1075         ret = si2165_readreg8(state, 0x0000, &val);
1076         if (ret < 0)
1077                 goto nodev_error;
1078         if (val != state->config.chip_mode)
1079                 goto nodev_error;
1080
1081         ret = si2165_readreg8(state, 0x0023, &state->chip_revcode);
1082         if (ret < 0)
1083                 goto nodev_error;
1084
1085         ret = si2165_readreg8(state, 0x0118, &state->chip_type);
1086         if (ret < 0)
1087                 goto nodev_error;
1088
1089         /* powerdown */
1090         ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF);
1091         if (ret < 0)
1092                 goto nodev_error;
1093
1094         if (state->chip_revcode < 26)
1095                 rev_char = 'A' + state->chip_revcode;
1096         else
1097                 rev_char = '?';
1098
1099         switch (state->chip_type) {
1100         case 0x06:
1101                 chip_name = "Si2161";
1102                 state->has_dvbt = true;
1103                 break;
1104         case 0x07:
1105                 chip_name = "Si2165";
1106                 state->has_dvbt = true;
1107                 state->has_dvbc = true;
1108                 break;
1109         default:
1110                 dev_err(&state->client->dev, "%s: Unsupported Silicon Labs chip (type %d, rev %d)\n",
1111                         KBUILD_MODNAME, state->chip_type, state->chip_revcode);
1112                 goto nodev_error;
1113         }
1114
1115         dev_info(&state->client->dev,
1116                 "%s: Detected Silicon Labs %s-%c (type %d, rev %d)\n",
1117                 KBUILD_MODNAME, chip_name, rev_char, state->chip_type,
1118                 state->chip_revcode);
1119
1120         strlcat(state->fe.ops.info.name, chip_name,
1121                         sizeof(state->fe.ops.info.name));
1122
1123         n = 0;
1124         if (state->has_dvbt) {
1125                 state->fe.ops.delsys[n++] = SYS_DVBT;
1126                 strlcat(state->fe.ops.info.name, " DVB-T",
1127                         sizeof(state->fe.ops.info.name));
1128         }
1129         if (state->has_dvbc) {
1130                 state->fe.ops.delsys[n++] = SYS_DVBC_ANNEX_A;
1131                 strlcat(state->fe.ops.info.name, " DVB-C",
1132                         sizeof(state->fe.ops.info.name));
1133         }
1134
1135         /* return fe pointer */
1136         *pdata->fe = &state->fe;
1137
1138         return 0;
1139
1140 nodev_error:
1141         ret = -ENODEV;
1142 error:
1143         kfree(state);
1144         dev_dbg(&client->dev, "failed=%d\n", ret);
1145         return ret;
1146 }
1147
1148 static int si2165_remove(struct i2c_client *client)
1149 {
1150         struct si2165_state *state = i2c_get_clientdata(client);
1151
1152         dev_dbg(&client->dev, "\n");
1153
1154         kfree(state);
1155         return 0;
1156 }
1157
1158 static const struct i2c_device_id si2165_id_table[] = {
1159         {"si2165", 0},
1160         {}
1161 };
1162 MODULE_DEVICE_TABLE(i2c, si2165_id_table);
1163
1164 static struct i2c_driver si2165_driver = {
1165         .driver = {
1166                 .owner  = THIS_MODULE,
1167                 .name   = "si2165",
1168         },
1169         .probe          = si2165_probe,
1170         .remove         = si2165_remove,
1171         .id_table       = si2165_id_table,
1172 };
1173
1174 module_i2c_driver(si2165_driver);
1175
1176 module_param(debug, int, 0644);
1177 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1178
1179 MODULE_DESCRIPTION("Silicon Labs Si2165 DVB-C/-T Demodulator driver");
1180 MODULE_AUTHOR("Matthias Schwarzott <zzam@gentoo.org>");
1181 MODULE_LICENSE("GPL");
1182 MODULE_FIRMWARE(SI2165_FIRMWARE_REV_D);