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sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / media / pci / cx88 / cx88-dvb.c
blobddf90678df349ebbfb83b06f383176b0dc72a612
1 /*
2 * device driver for Conexant 2388x based TV cards
3 * MPEG Transport Stream (DVB) routines
4 *
5 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
6 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19 #include "cx88.h"
20 #include "dvb-pll.h"
21
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/device.h>
25 #include <linux/fs.h>
26 #include <linux/kthread.h>
27 #include <linux/file.h>
28 #include <linux/suspend.h>
29
30 #include <media/v4l2-common.h>
31
32 #include "mt352.h"
33 #include "mt352_priv.h"
34 #include "cx88-vp3054-i2c.h"
35 #include "zl10353.h"
36 #include "cx22702.h"
37 #include "or51132.h"
38 #include "lgdt330x.h"
39 #include "s5h1409.h"
40 #include "xc4000.h"
41 #include "xc5000.h"
42 #include "nxt200x.h"
43 #include "cx24123.h"
44 #include "isl6421.h"
45 #include "tuner-simple.h"
46 #include "tda9887.h"
47 #include "s5h1411.h"
48 #include "stv0299.h"
49 #include "z0194a.h"
50 #include "stv0288.h"
51 #include "stb6000.h"
52 #include "cx24116.h"
53 #include "stv0900.h"
54 #include "stb6100.h"
55 #include "stb6100_proc.h"
56 #include "mb86a16.h"
57 #include "ts2020.h"
58 #include "ds3000.h"
59
60 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
61 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
62 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
63 MODULE_LICENSE("GPL");
64 MODULE_VERSION(CX88_VERSION);
65
66 static unsigned int debug;
67 module_param(debug, int, 0644);
68 MODULE_PARM_DESC(debug, "enable debug messages [dvb]");
69
70 static unsigned int dvb_buf_tscnt = 32;
71 module_param(dvb_buf_tscnt, int, 0644);
72 MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
73
74 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
75
76 #define dprintk(level, fmt, arg...) do { \
77 if (debug >= level) \
78 printk(KERN_DEBUG pr_fmt("%s: dvb:" fmt), \
79 __func__, ##arg); \
80 } while (0)
81
82 /* ------------------------------------------------------------------ */
83
84 static int queue_setup(struct vb2_queue *q,
85 unsigned int *num_buffers, unsigned int *num_planes,
86 unsigned int sizes[], struct device *alloc_devs[])
87 {
88 struct cx8802_dev *dev = q->drv_priv;
89
90 *num_planes = 1;
91 dev->ts_packet_size = 188 * 4;
92 dev->ts_packet_count = dvb_buf_tscnt;
93 sizes[0] = dev->ts_packet_size * dev->ts_packet_count;
94 *num_buffers = dvb_buf_tscnt;
95 return 0;
96 }
97
98 static int buffer_prepare(struct vb2_buffer *vb)
99 {
100 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
101 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
102 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
103
104 return cx8802_buf_prepare(vb->vb2_queue, dev, buf);
105 }
106
107 static void buffer_finish(struct vb2_buffer *vb)
108 {
109 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
110 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
111 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
112 struct cx88_riscmem *risc = &buf->risc;
113
114 if (risc->cpu)
115 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
116 memset(risc, 0, sizeof(*risc));
117 }
118
119 static void buffer_queue(struct vb2_buffer *vb)
120 {
121 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
122 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
123 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
124
125 cx8802_buf_queue(dev, buf);
126 }
127
128 static int start_streaming(struct vb2_queue *q, unsigned int count)
129 {
130 struct cx8802_dev *dev = q->drv_priv;
131 struct cx88_dmaqueue *dmaq = &dev->mpegq;
132 struct cx88_buffer *buf;
133
134 buf = list_entry(dmaq->active.next, struct cx88_buffer, list);
135 cx8802_start_dma(dev, dmaq, buf);
136 return 0;
137 }
138
139 static void stop_streaming(struct vb2_queue *q)
140 {
141 struct cx8802_dev *dev = q->drv_priv;
142 struct cx88_dmaqueue *dmaq = &dev->mpegq;
143 unsigned long flags;
144
145 cx8802_cancel_buffers(dev);
146
147 spin_lock_irqsave(&dev->slock, flags);
148 while (!list_empty(&dmaq->active)) {
149 struct cx88_buffer *buf = list_entry(dmaq->active.next,
150 struct cx88_buffer, list);
151
152 list_del(&buf->list);
153 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
154 }
155 spin_unlock_irqrestore(&dev->slock, flags);
156 }
157
158 static const struct vb2_ops dvb_qops = {
159 .queue_setup = queue_setup,
160 .buf_prepare = buffer_prepare,
161 .buf_finish = buffer_finish,
162 .buf_queue = buffer_queue,
163 .wait_prepare = vb2_ops_wait_prepare,
164 .wait_finish = vb2_ops_wait_finish,
165 .start_streaming = start_streaming,
166 .stop_streaming = stop_streaming,
167 };
168
169 /* ------------------------------------------------------------------ */
170
171 static int cx88_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
172 {
173 struct cx8802_dev *dev = fe->dvb->priv;
174 struct cx8802_driver *drv = NULL;
175 int ret = 0;
176 int fe_id;
177
178 fe_id = vb2_dvb_find_frontend(&dev->frontends, fe);
179 if (!fe_id) {
180 pr_err("%s() No frontend found\n", __func__);
181 return -EINVAL;
182 }
183
184 mutex_lock(&dev->core->lock);
185 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
186 if (drv) {
187 if (acquire) {
188 dev->frontends.active_fe_id = fe_id;
189 ret = drv->request_acquire(drv);
190 } else {
191 ret = drv->request_release(drv);
192 dev->frontends.active_fe_id = 0;
193 }
194 }
195 mutex_unlock(&dev->core->lock);
196
197 return ret;
198 }
199
200 static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
201 {
202 struct vb2_dvb_frontends *f;
203 struct vb2_dvb_frontend *fe;
204
205 if (!core->dvbdev)
206 return;
207
208 f = &core->dvbdev->frontends;
209
210 if (!f)
211 return;
212
213 if (f->gate <= 1) /* undefined or fe0 */
214 fe = vb2_dvb_get_frontend(f, 1);
215 else
216 fe = vb2_dvb_get_frontend(f, f->gate);
217
218 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
219 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
220 }
221
222 /* ------------------------------------------------------------------ */
223
224 static int dvico_fusionhdtv_demod_init(struct dvb_frontend *fe)
225 {
226 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x39 };
227 static const u8 reset[] = { RESET, 0x80 };
228 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
229 static const u8 agc_cfg[] = { AGC_TARGET, 0x24, 0x20 };
230 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 };
231 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
232
233 mt352_write(fe, clock_config, sizeof(clock_config));
234 udelay(200);
235 mt352_write(fe, reset, sizeof(reset));
236 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
237
238 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
239 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
240 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
241 return 0;
242 }
243
244 static int dvico_dual_demod_init(struct dvb_frontend *fe)
245 {
246 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x38 };
247 static const u8 reset[] = { RESET, 0x80 };
248 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
249 static const u8 agc_cfg[] = { AGC_TARGET, 0x28, 0x20 };
250 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 };
251 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
252
253 mt352_write(fe, clock_config, sizeof(clock_config));
254 udelay(200);
255 mt352_write(fe, reset, sizeof(reset));
256 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
257
258 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
259 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
260 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
261
262 return 0;
263 }
264
265 static int dntv_live_dvbt_demod_init(struct dvb_frontend *fe)
266 {
267 static const u8 clock_config[] = { 0x89, 0x38, 0x39 };
268 static const u8 reset[] = { 0x50, 0x80 };
269 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };
270 static const u8 agc_cfg[] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
271 0x00, 0xFF, 0x00, 0x40, 0x40 };
272 static const u8 dntv_extra[] = { 0xB5, 0x7A };
273 static const u8 capt_range_cfg[] = { 0x75, 0x32 };
274
275 mt352_write(fe, clock_config, sizeof(clock_config));
276 udelay(2000);
277 mt352_write(fe, reset, sizeof(reset));
278 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
279
280 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
281 udelay(2000);
282 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
283 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
284
285 return 0;
286 }
287
288 static const struct mt352_config dvico_fusionhdtv = {
289 .demod_address = 0x0f,
290 .demod_init = dvico_fusionhdtv_demod_init,
291 };
292
293 static const struct mt352_config dntv_live_dvbt_config = {
294 .demod_address = 0x0f,
295 .demod_init = dntv_live_dvbt_demod_init,
296 };
297
298 static const struct mt352_config dvico_fusionhdtv_dual = {
299 .demod_address = 0x0f,
300 .demod_init = dvico_dual_demod_init,
301 };
302
303 static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
304 .demod_address = (0x1e >> 1),
305 .no_tuner = 1,
306 .if2 = 45600,
307 };
308
309 static struct mb86a16_config twinhan_vp1027 = {
310 .demod_address = 0x08,
311 };
312
313 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
314 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend *fe)
315 {
316 static const u8 clock_config[] = { 0x89, 0x38, 0x38 };
317 static const u8 reset[] = { 0x50, 0x80 };
318 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };
319 static const u8 agc_cfg[] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
320 0x00, 0xFF, 0x00, 0x40, 0x40 };
321 static const u8 dntv_extra[] = { 0xB5, 0x7A };
322 static const u8 capt_range_cfg[] = { 0x75, 0x32 };
323
324 mt352_write(fe, clock_config, sizeof(clock_config));
325 udelay(2000);
326 mt352_write(fe, reset, sizeof(reset));
327 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
328
329 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
330 udelay(2000);
331 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
332 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
333
334 return 0;
335 }
336
337 static const struct mt352_config dntv_live_dvbt_pro_config = {
338 .demod_address = 0x0f,
339 .no_tuner = 1,
340 .demod_init = dntv_live_dvbt_pro_demod_init,
341 };
342 #endif
343
344 static const struct zl10353_config dvico_fusionhdtv_hybrid = {
345 .demod_address = 0x0f,
346 .no_tuner = 1,
347 };
348
349 static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
350 .demod_address = 0x0f,
351 .if2 = 45600,
352 .no_tuner = 1,
353 };
354
355 static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
356 .demod_address = 0x0f,
357 .if2 = 4560,
358 .no_tuner = 1,
359 .demod_init = dvico_fusionhdtv_demod_init,
360 };
361
362 static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
363 .demod_address = 0x0f,
364 };
365
366 static const struct cx22702_config connexant_refboard_config = {
367 .demod_address = 0x43,
368 .output_mode = CX22702_SERIAL_OUTPUT,
369 };
370
371 static const struct cx22702_config hauppauge_hvr_config = {
372 .demod_address = 0x63,
373 .output_mode = CX22702_SERIAL_OUTPUT,
374 };
375
376 static int or51132_set_ts_param(struct dvb_frontend *fe, int is_punctured)
377 {
378 struct cx8802_dev *dev = fe->dvb->priv;
379
380 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
381 return 0;
382 }
383
384 static const struct or51132_config pchdtv_hd3000 = {
385 .demod_address = 0x15,
386 .set_ts_params = or51132_set_ts_param,
387 };
388
389 static int lgdt330x_pll_rf_set(struct dvb_frontend *fe, int index)
390 {
391 struct cx8802_dev *dev = fe->dvb->priv;
392 struct cx88_core *core = dev->core;
393
394 dprintk(1, "%s: index = %d\n", __func__, index);
395 if (index == 0)
396 cx_clear(MO_GP0_IO, 8);
397 else
398 cx_set(MO_GP0_IO, 8);
399 return 0;
400 }
401
402 static int lgdt330x_set_ts_param(struct dvb_frontend *fe, int is_punctured)
403 {
404 struct cx8802_dev *dev = fe->dvb->priv;
405
406 if (is_punctured)
407 dev->ts_gen_cntrl |= 0x04;
408 else
409 dev->ts_gen_cntrl &= ~0x04;
410 return 0;
411 }
412
413 static struct lgdt330x_config fusionhdtv_3_gold = {
414 .demod_address = 0x0e,
415 .demod_chip = LGDT3302,
416 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
417 .set_ts_params = lgdt330x_set_ts_param,
418 };
419
420 static const struct lgdt330x_config fusionhdtv_5_gold = {
421 .demod_address = 0x0e,
422 .demod_chip = LGDT3303,
423 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
424 .set_ts_params = lgdt330x_set_ts_param,
425 };
426
427 static const struct lgdt330x_config pchdtv_hd5500 = {
428 .demod_address = 0x59,
429 .demod_chip = LGDT3303,
430 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
431 .set_ts_params = lgdt330x_set_ts_param,
432 };
433
434 static int nxt200x_set_ts_param(struct dvb_frontend *fe, int is_punctured)
435 {
436 struct cx8802_dev *dev = fe->dvb->priv;
437
438 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
439 return 0;
440 }
441
442 static const struct nxt200x_config ati_hdtvwonder = {
443 .demod_address = 0x0a,
444 .set_ts_params = nxt200x_set_ts_param,
445 };
446
447 static int cx24123_set_ts_param(struct dvb_frontend *fe,
448 int is_punctured)
449 {
450 struct cx8802_dev *dev = fe->dvb->priv;
451
452 dev->ts_gen_cntrl = 0x02;
453 return 0;
454 }
455
456 static int kworld_dvbs_100_set_voltage(struct dvb_frontend *fe,
457 enum fe_sec_voltage voltage)
458 {
459 struct cx8802_dev *dev = fe->dvb->priv;
460 struct cx88_core *core = dev->core;
461
462 if (voltage == SEC_VOLTAGE_OFF)
463 cx_write(MO_GP0_IO, 0x000006fb);
464 else
465 cx_write(MO_GP0_IO, 0x000006f9);
466
467 if (core->prev_set_voltage)
468 return core->prev_set_voltage(fe, voltage);
469 return 0;
470 }
471
472 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
473 enum fe_sec_voltage voltage)
474 {
475 struct cx8802_dev *dev = fe->dvb->priv;
476 struct cx88_core *core = dev->core;
477
478 if (voltage == SEC_VOLTAGE_OFF) {
479 dprintk(1, "LNB Voltage OFF\n");
480 cx_write(MO_GP0_IO, 0x0000efff);
481 }
482
483 if (core->prev_set_voltage)
484 return core->prev_set_voltage(fe, voltage);
485 return 0;
486 }
487
488 static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
489 enum fe_sec_voltage voltage)
490 {
491 struct cx8802_dev *dev = fe->dvb->priv;
492 struct cx88_core *core = dev->core;
493
494 cx_set(MO_GP0_IO, 0x6040);
495 switch (voltage) {
496 case SEC_VOLTAGE_13:
497 cx_clear(MO_GP0_IO, 0x20);
498 break;
499 case SEC_VOLTAGE_18:
500 cx_set(MO_GP0_IO, 0x20);
501 break;
502 case SEC_VOLTAGE_OFF:
503 cx_clear(MO_GP0_IO, 0x20);
504 break;
505 }
506
507 if (core->prev_set_voltage)
508 return core->prev_set_voltage(fe, voltage);
509 return 0;
510 }
511
512 static int vp1027_set_voltage(struct dvb_frontend *fe,
513 enum fe_sec_voltage voltage)
514 {
515 struct cx8802_dev *dev = fe->dvb->priv;
516 struct cx88_core *core = dev->core;
517
518 switch (voltage) {
519 case SEC_VOLTAGE_13:
520 dprintk(1, "LNB SEC Voltage=13\n");
521 cx_write(MO_GP0_IO, 0x00001220);
522 break;
523 case SEC_VOLTAGE_18:
524 dprintk(1, "LNB SEC Voltage=18\n");
525 cx_write(MO_GP0_IO, 0x00001222);
526 break;
527 case SEC_VOLTAGE_OFF:
528 dprintk(1, "LNB Voltage OFF\n");
529 cx_write(MO_GP0_IO, 0x00001230);
530 break;
531 }
532
533 if (core->prev_set_voltage)
534 return core->prev_set_voltage(fe, voltage);
535 return 0;
536 }
537
538 static const struct cx24123_config geniatech_dvbs_config = {
539 .demod_address = 0x55,
540 .set_ts_params = cx24123_set_ts_param,
541 };
542
543 static const struct cx24123_config hauppauge_novas_config = {
544 .demod_address = 0x55,
545 .set_ts_params = cx24123_set_ts_param,
546 };
547
548 static const struct cx24123_config kworld_dvbs_100_config = {
549 .demod_address = 0x15,
550 .set_ts_params = cx24123_set_ts_param,
551 .lnb_polarity = 1,
552 };
553
554 static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
555 .demod_address = 0x32 >> 1,
556 .output_mode = S5H1409_PARALLEL_OUTPUT,
557 .gpio = S5H1409_GPIO_ON,
558 .qam_if = 44000,
559 .inversion = S5H1409_INVERSION_OFF,
560 .status_mode = S5H1409_DEMODLOCKING,
561 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
562 };
563
564 static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
565 .demod_address = 0x32 >> 1,
566 .output_mode = S5H1409_SERIAL_OUTPUT,
567 .gpio = S5H1409_GPIO_OFF,
568 .inversion = S5H1409_INVERSION_OFF,
569 .status_mode = S5H1409_DEMODLOCKING,
570 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
571 };
572
573 static const struct s5h1409_config kworld_atsc_120_config = {
574 .demod_address = 0x32 >> 1,
575 .output_mode = S5H1409_SERIAL_OUTPUT,
576 .gpio = S5H1409_GPIO_OFF,
577 .inversion = S5H1409_INVERSION_OFF,
578 .status_mode = S5H1409_DEMODLOCKING,
579 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
580 };
581
582 static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
583 .i2c_address = 0x64,
584 .if_khz = 5380,
585 };
586
587 static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
588 .demod_address = (0x1e >> 1),
589 .no_tuner = 1,
590 .if2 = 45600,
591 };
592
593 static const struct zl10353_config cx88_geniatech_x8000_mt = {
594 .demod_address = (0x1e >> 1),
595 .no_tuner = 1,
596 .disable_i2c_gate_ctrl = 1,
597 };
598
599 static const struct s5h1411_config dvico_fusionhdtv7_config = {
600 .output_mode = S5H1411_SERIAL_OUTPUT,
601 .gpio = S5H1411_GPIO_ON,
602 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
603 .qam_if = S5H1411_IF_44000,
604 .vsb_if = S5H1411_IF_44000,
605 .inversion = S5H1411_INVERSION_OFF,
606 .status_mode = S5H1411_DEMODLOCKING
607 };
608
609 static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
610 .i2c_address = 0xc2 >> 1,
611 .if_khz = 5380,
612 };
613
614 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
615 {
616 struct dvb_frontend *fe;
617 struct vb2_dvb_frontend *fe0 = NULL;
618 struct xc2028_ctrl ctl;
619 struct xc2028_config cfg = {
620 .i2c_adap = &dev->core->i2c_adap,
621 .i2c_addr = addr,
622 .ctrl = &ctl,
623 };
624
625 /* Get the first frontend */
626 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
627 if (!fe0)
628 return -EINVAL;
629
630 if (!fe0->dvb.frontend) {
631 pr_err("dvb frontend not attached. Can't attach xc3028\n");
632 return -EINVAL;
633 }
634
635 /*
636 * Some xc3028 devices may be hidden by an I2C gate. This is known
637 * to happen with some s5h1409-based devices.
638 * Now that I2C gate is open, sets up xc3028 configuration
639 */
640 cx88_setup_xc3028(dev->core, &ctl);
641
642 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
643 if (!fe) {
644 pr_err("xc3028 attach failed\n");
645 dvb_frontend_detach(fe0->dvb.frontend);
646 dvb_unregister_frontend(fe0->dvb.frontend);
647 fe0->dvb.frontend = NULL;
648 return -EINVAL;
649 }
650
651 pr_info("xc3028 attached\n");
652
653 return 0;
654 }
655
656 static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
657 {
658 struct dvb_frontend *fe;
659 struct vb2_dvb_frontend *fe0 = NULL;
660
661 /* Get the first frontend */
662 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
663 if (!fe0)
664 return -EINVAL;
665
666 if (!fe0->dvb.frontend) {
667 pr_err("dvb frontend not attached. Can't attach xc4000\n");
668 return -EINVAL;
669 }
670
671 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
672 cfg);
673 if (!fe) {
674 pr_err("xc4000 attach failed\n");
675 dvb_frontend_detach(fe0->dvb.frontend);
676 dvb_unregister_frontend(fe0->dvb.frontend);
677 fe0->dvb.frontend = NULL;
678 return -EINVAL;
679 }
680
681 pr_info("xc4000 attached\n");
682
683 return 0;
684 }
685
686 static int cx24116_set_ts_param(struct dvb_frontend *fe,
687 int is_punctured)
688 {
689 struct cx8802_dev *dev = fe->dvb->priv;
690
691 dev->ts_gen_cntrl = 0x2;
692
693 return 0;
694 }
695
696 static int stv0900_set_ts_param(struct dvb_frontend *fe,
697 int is_punctured)
698 {
699 struct cx8802_dev *dev = fe->dvb->priv;
700
701 dev->ts_gen_cntrl = 0;
702
703 return 0;
704 }
705
706 static int cx24116_reset_device(struct dvb_frontend *fe)
707 {
708 struct cx8802_dev *dev = fe->dvb->priv;
709 struct cx88_core *core = dev->core;
710
711 /* Reset the part */
712 /* Put the cx24116 into reset */
713 cx_write(MO_SRST_IO, 0);
714 usleep_range(10000, 20000);
715 /* Take the cx24116 out of reset */
716 cx_write(MO_SRST_IO, 1);
717 usleep_range(10000, 20000);
718
719 return 0;
720 }
721
722 static const struct cx24116_config hauppauge_hvr4000_config = {
723 .demod_address = 0x05,
724 .set_ts_params = cx24116_set_ts_param,
725 .reset_device = cx24116_reset_device,
726 };
727
728 static const struct cx24116_config tevii_s460_config = {
729 .demod_address = 0x55,
730 .set_ts_params = cx24116_set_ts_param,
731 .reset_device = cx24116_reset_device,
732 };
733
734 static int ds3000_set_ts_param(struct dvb_frontend *fe,
735 int is_punctured)
736 {
737 struct cx8802_dev *dev = fe->dvb->priv;
738
739 dev->ts_gen_cntrl = 4;
740
741 return 0;
742 }
743
744 static struct ds3000_config tevii_ds3000_config = {
745 .demod_address = 0x68,
746 .set_ts_params = ds3000_set_ts_param,
747 };
748
749 static struct ts2020_config tevii_ts2020_config = {
750 .tuner_address = 0x60,
751 .clk_out_div = 1,
752 };
753
754 static const struct stv0900_config prof_7301_stv0900_config = {
755 .demod_address = 0x6a,
756 /* demod_mode = 0,*/
757 .xtal = 27000000,
758 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
759 .diseqc_mode = 2,/* 2/3 PWM */
760 .tun1_maddress = 0,/* 0x60 */
761 .tun1_adc = 0,/* 2 Vpp */
762 .path1_mode = 3,
763 .set_ts_params = stv0900_set_ts_param,
764 };
765
766 static const struct stb6100_config prof_7301_stb6100_config = {
767 .tuner_address = 0x60,
768 .refclock = 27000000,
769 };
770
771 static const struct stv0299_config tevii_tuner_sharp_config = {
772 .demod_address = 0x68,
773 .inittab = sharp_z0194a_inittab,
774 .mclk = 88000000UL,
775 .invert = 1,
776 .skip_reinit = 0,
777 .lock_output = 1,
778 .volt13_op0_op1 = STV0299_VOLT13_OP1,
779 .min_delay_ms = 100,
780 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
781 .set_ts_params = cx24116_set_ts_param,
782 };
783
784 static const struct stv0288_config tevii_tuner_earda_config = {
785 .demod_address = 0x68,
786 .min_delay_ms = 100,
787 .set_ts_params = cx24116_set_ts_param,
788 };
789
790 static int cx8802_alloc_frontends(struct cx8802_dev *dev)
791 {
792 struct cx88_core *core = dev->core;
793 struct vb2_dvb_frontend *fe = NULL;
794 int i;
795
796 mutex_init(&dev->frontends.lock);
797 INIT_LIST_HEAD(&dev->frontends.felist);
798
799 if (!core->board.num_frontends)
800 return -ENODEV;
801
802 pr_info("%s: allocating %d frontend(s)\n", __func__,
803 core->board.num_frontends);
804 for (i = 1; i <= core->board.num_frontends; i++) {
805 fe = vb2_dvb_alloc_frontend(&dev->frontends, i);
806 if (!fe) {
807 pr_err("%s() failed to alloc\n", __func__);
808 vb2_dvb_dealloc_frontends(&dev->frontends);
809 return -ENOMEM;
810 }
811 }
812 return 0;
813 }
814
815 static const u8 samsung_smt_7020_inittab[] = {
816 0x01, 0x15,
817 0x02, 0x00,
818 0x03, 0x00,
819 0x04, 0x7D,
820 0x05, 0x0F,
821 0x06, 0x02,
822 0x07, 0x00,
823 0x08, 0x60,
824
825 0x0A, 0xC2,
826 0x0B, 0x00,
827 0x0C, 0x01,
828 0x0D, 0x81,
829 0x0E, 0x44,
830 0x0F, 0x09,
831 0x10, 0x3C,
832 0x11, 0x84,
833 0x12, 0xDA,
834 0x13, 0x99,
835 0x14, 0x8D,
836 0x15, 0xCE,
837 0x16, 0xE8,
838 0x17, 0x43,
839 0x18, 0x1C,
840 0x19, 0x1B,
841 0x1A, 0x1D,
842
843 0x1C, 0x12,
844 0x1D, 0x00,
845 0x1E, 0x00,
846 0x1F, 0x00,
847 0x20, 0x00,
848 0x21, 0x00,
849 0x22, 0x00,
850 0x23, 0x00,
851
852 0x28, 0x02,
853 0x29, 0x28,
854 0x2A, 0x14,
855 0x2B, 0x0F,
856 0x2C, 0x09,
857 0x2D, 0x05,
858
859 0x31, 0x1F,
860 0x32, 0x19,
861 0x33, 0xFC,
862 0x34, 0x13,
863 0xff, 0xff,
864 };
865
866 static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
867 {
868 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
869 struct cx8802_dev *dev = fe->dvb->priv;
870 u8 buf[4];
871 u32 div;
872 struct i2c_msg msg = {
873 .addr = 0x61,
874 .flags = 0,
875 .buf = buf,
876 .len = sizeof(buf) };
877
878 div = c->frequency / 125;
879
880 buf[0] = (div >> 8) & 0x7f;
881 buf[1] = div & 0xff;
882 buf[2] = 0x84; /* 0xC4 */
883 buf[3] = 0x00;
884
885 if (c->frequency < 1500000)
886 buf[3] |= 0x10;
887
888 if (fe->ops.i2c_gate_ctrl)
889 fe->ops.i2c_gate_ctrl(fe, 1);
890
891 if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
892 return -EIO;
893
894 return 0;
895 }
896
897 static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
898 enum fe_sec_tone_mode tone)
899 {
900 struct cx8802_dev *dev = fe->dvb->priv;
901 struct cx88_core *core = dev->core;
902
903 cx_set(MO_GP0_IO, 0x0800);
904
905 switch (tone) {
906 case SEC_TONE_ON:
907 cx_set(MO_GP0_IO, 0x08);
908 break;
909 case SEC_TONE_OFF:
910 cx_clear(MO_GP0_IO, 0x08);
911 break;
912 default:
913 return -EINVAL;
914 }
915
916 return 0;
917 }
918
919 static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
920 enum fe_sec_voltage voltage)
921 {
922 struct cx8802_dev *dev = fe->dvb->priv;
923 struct cx88_core *core = dev->core;
924
925 u8 data;
926 struct i2c_msg msg = {
927 .addr = 8,
928 .flags = 0,
929 .buf = &data,
930 .len = sizeof(data) };
931
932 cx_set(MO_GP0_IO, 0x8000);
933
934 switch (voltage) {
935 case SEC_VOLTAGE_OFF:
936 break;
937 case SEC_VOLTAGE_13:
938 data = ISL6421_EN1 | ISL6421_LLC1;
939 cx_clear(MO_GP0_IO, 0x80);
940 break;
941 case SEC_VOLTAGE_18:
942 data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
943 cx_clear(MO_GP0_IO, 0x80);
944 break;
945 default:
946 return -EINVAL;
947 }
948
949 return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
950 }
951
952 static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
953 u32 srate, u32 ratio)
954 {
955 u8 aclk = 0;
956 u8 bclk = 0;
957
958 if (srate < 1500000) {
959 aclk = 0xb7;
960 bclk = 0x47;
961 } else if (srate < 3000000) {
962 aclk = 0xb7;
963 bclk = 0x4b;
964 } else if (srate < 7000000) {
965 aclk = 0xb7;
966 bclk = 0x4f;
967 } else if (srate < 14000000) {
968 aclk = 0xb7;
969 bclk = 0x53;
970 } else if (srate < 30000000) {
971 aclk = 0xb6;
972 bclk = 0x53;
973 } else if (srate < 45000000) {
974 aclk = 0xb4;
975 bclk = 0x51;
976 }
977
978 stv0299_writereg(fe, 0x13, aclk);
979 stv0299_writereg(fe, 0x14, bclk);
980 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
981 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
982 stv0299_writereg(fe, 0x21, ratio & 0xf0);
983
984 return 0;
985 }
986
987 static const struct stv0299_config samsung_stv0299_config = {
988 .demod_address = 0x68,
989 .inittab = samsung_smt_7020_inittab,
990 .mclk = 88000000UL,
991 .invert = 0,
992 .skip_reinit = 0,
993 .lock_output = STV0299_LOCKOUTPUT_LK,
994 .volt13_op0_op1 = STV0299_VOLT13_OP1,
995 .min_delay_ms = 100,
996 .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
997 };
998
999 static int dvb_register(struct cx8802_dev *dev)
1000 {
1001 struct cx88_core *core = dev->core;
1002 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
1003 int mfe_shared = 0; /* bus not shared by default */
1004 int res = -EINVAL;
1005
1006 if (core->i2c_rc != 0) {
1007 pr_err("no i2c-bus available, cannot attach dvb drivers\n");
1008 goto frontend_detach;
1009 }
1010
1011 /* Get the first frontend */
1012 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
1013 if (!fe0)
1014 goto frontend_detach;
1015
1016 /* multi-frontend gate control is undefined or defaults to fe0 */
1017 dev->frontends.gate = 0;
1018
1019 /* Sets the gate control callback to be used by i2c command calls */
1020 core->gate_ctrl = cx88_dvb_gate_ctrl;
1021
1022 /* init frontend(s) */
1023 switch (core->boardnr) {
1024 case CX88_BOARD_HAUPPAUGE_DVB_T1:
1025 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1026 &connexant_refboard_config,
1027 &core->i2c_adap);
1028 if (fe0->dvb.frontend) {
1029 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1030 0x61, &core->i2c_adap,
1031 DVB_PLL_THOMSON_DTT759X))
1032 goto frontend_detach;
1033 }
1034 break;
1035 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
1036 case CX88_BOARD_CONEXANT_DVB_T1:
1037 case CX88_BOARD_KWORLD_DVB_T_CX22702:
1038 case CX88_BOARD_WINFAST_DTV1000:
1039 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1040 &connexant_refboard_config,
1041 &core->i2c_adap);
1042 if (fe0->dvb.frontend) {
1043 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1044 0x60, &core->i2c_adap,
1045 DVB_PLL_THOMSON_DTT7579))
1046 goto frontend_detach;
1047 }
1048 break;
1049 case CX88_BOARD_WINFAST_DTV2000H:
1050 case CX88_BOARD_HAUPPAUGE_HVR1100:
1051 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
1052 case CX88_BOARD_HAUPPAUGE_HVR1300:
1053 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1054 &hauppauge_hvr_config,
1055 &core->i2c_adap);
1056 if (fe0->dvb.frontend) {
1057 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1058 &core->i2c_adap, 0x61,
1059 TUNER_PHILIPS_FMD1216ME_MK3))
1060 goto frontend_detach;
1061 }
1062 break;
1063 case CX88_BOARD_WINFAST_DTV2000H_J:
1064 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1065 &hauppauge_hvr_config,
1066 &core->i2c_adap);
1067 if (fe0->dvb.frontend) {
1068 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1069 &core->i2c_adap, 0x61,
1070 TUNER_PHILIPS_FMD1216MEX_MK3))
1071 goto frontend_detach;
1072 }
1073 break;
1074 case CX88_BOARD_HAUPPAUGE_HVR3000:
1075 /* MFE frontend 1 */
1076 mfe_shared = 1;
1077 dev->frontends.gate = 2;
1078 /* DVB-S init */
1079 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1080 &hauppauge_novas_config,
1081 &dev->core->i2c_adap);
1082 if (fe0->dvb.frontend) {
1083 if (!dvb_attach(isl6421_attach,
1084 fe0->dvb.frontend,
1085 &dev->core->i2c_adap,
1086 0x08, ISL6421_DCL, 0x00, false))
1087 goto frontend_detach;
1088 }
1089 /* MFE frontend 2 */
1090 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1091 if (!fe1)
1092 goto frontend_detach;
1093 /* DVB-T init */
1094 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1095 &hauppauge_hvr_config,
1096 &dev->core->i2c_adap);
1097 if (fe1->dvb.frontend) {
1098 fe1->dvb.frontend->id = 1;
1099 if (!dvb_attach(simple_tuner_attach,
1100 fe1->dvb.frontend,
1101 &dev->core->i2c_adap,
1102 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1103 goto frontend_detach;
1104 }
1105 break;
1106 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
1107 fe0->dvb.frontend = dvb_attach(mt352_attach,
1108 &dvico_fusionhdtv,
1109 &core->i2c_adap);
1110 if (fe0->dvb.frontend) {
1111 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1112 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1113 goto frontend_detach;
1114 break;
1115 }
1116 /* ZL10353 replaces MT352 on later cards */
1117 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1118 &dvico_fusionhdtv_plus_v1_1,
1119 &core->i2c_adap);
1120 if (fe0->dvb.frontend) {
1121 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1122 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1123 goto frontend_detach;
1124 }
1125 break;
1126 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
1127 /*
1128 * The tin box says DEE1601, but it seems to be DTT7579
1129 * compatible, with a slightly different MT352 AGC gain.
1130 */
1131 fe0->dvb.frontend = dvb_attach(mt352_attach,
1132 &dvico_fusionhdtv_dual,
1133 &core->i2c_adap);
1134 if (fe0->dvb.frontend) {
1135 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1136 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1137 goto frontend_detach;
1138 break;
1139 }
1140 /* ZL10353 replaces MT352 on later cards */
1141 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1142 &dvico_fusionhdtv_plus_v1_1,
1143 &core->i2c_adap);
1144 if (fe0->dvb.frontend) {
1145 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1146 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1147 goto frontend_detach;
1148 }
1149 break;
1150 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
1151 fe0->dvb.frontend = dvb_attach(mt352_attach,
1152 &dvico_fusionhdtv,
1153 &core->i2c_adap);
1154 if (fe0->dvb.frontend) {
1155 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1156 0x61, NULL, DVB_PLL_LG_Z201))
1157 goto frontend_detach;
1158 }
1159 break;
1160 case CX88_BOARD_KWORLD_DVB_T:
1161 case CX88_BOARD_DNTV_LIVE_DVB_T:
1162 case CX88_BOARD_ADSTECH_DVB_T_PCI:
1163 fe0->dvb.frontend = dvb_attach(mt352_attach,
1164 &dntv_live_dvbt_config,
1165 &core->i2c_adap);
1166 if (fe0->dvb.frontend) {
1167 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1168 0x61, NULL, DVB_PLL_UNKNOWN_1))
1169 goto frontend_detach;
1170 }
1171 break;
1172 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
1173 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
1174 /* MT352 is on a secondary I2C bus made from some GPIO lines */
1175 fe0->dvb.frontend = dvb_attach(mt352_attach,
1176 &dntv_live_dvbt_pro_config,
1177 &dev->vp3054->adap);
1178 if (fe0->dvb.frontend) {
1179 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1180 &core->i2c_adap, 0x61,
1181 TUNER_PHILIPS_FMD1216ME_MK3))
1182 goto frontend_detach;
1183 }
1184 #else
1185 pr_err("built without vp3054 support\n");
1186 #endif
1187 break;
1188 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
1189 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1190 &dvico_fusionhdtv_hybrid,
1191 &core->i2c_adap);
1192 if (fe0->dvb.frontend) {
1193 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1194 &core->i2c_adap, 0x61,
1195 TUNER_THOMSON_FE6600))
1196 goto frontend_detach;
1197 }
1198 break;
1199 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
1200 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1201 &dvico_fusionhdtv_xc3028,
1202 &core->i2c_adap);
1203 if (!fe0->dvb.frontend)
1204 fe0->dvb.frontend = dvb_attach(mt352_attach,
1205 &dvico_fusionhdtv_mt352_xc3028,
1206 &core->i2c_adap);
1207 /*
1208 * On this board, the demod provides the I2C bus pullup.
1209 * We must not permit gate_ctrl to be performed, or
1210 * the xc3028 cannot communicate on the bus.
1211 */
1212 if (fe0->dvb.frontend)
1213 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1214 if (attach_xc3028(0x61, dev) < 0)
1215 goto frontend_detach;
1216 break;
1217 case CX88_BOARD_PCHDTV_HD3000:
1218 fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
1219 &core->i2c_adap);
1220 if (fe0->dvb.frontend) {
1221 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1222 &core->i2c_adap, 0x61,
1223 TUNER_THOMSON_DTT761X))
1224 goto frontend_detach;
1225 }
1226 break;
1227 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
1228 dev->ts_gen_cntrl = 0x08;
1229
1230 /* Do a hardware reset of chip before using it. */
1231 cx_clear(MO_GP0_IO, 1);
1232 mdelay(100);
1233 cx_set(MO_GP0_IO, 1);
1234 mdelay(200);
1235
1236 /* Select RF connector callback */
1237 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
1238 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1239 &fusionhdtv_3_gold,
1240 &core->i2c_adap);
1241 if (fe0->dvb.frontend) {
1242 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1243 &core->i2c_adap, 0x61,
1244 TUNER_MICROTUNE_4042FI5))
1245 goto frontend_detach;
1246 }
1247 break;
1248 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
1249 dev->ts_gen_cntrl = 0x08;
1250
1251 /* Do a hardware reset of chip before using it. */
1252 cx_clear(MO_GP0_IO, 1);
1253 mdelay(100);
1254 cx_set(MO_GP0_IO, 9);
1255 mdelay(200);
1256 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1257 &fusionhdtv_3_gold,
1258 &core->i2c_adap);
1259 if (fe0->dvb.frontend) {
1260 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1261 &core->i2c_adap, 0x61,
1262 TUNER_THOMSON_DTT761X))
1263 goto frontend_detach;
1264 }
1265 break;
1266 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1267 dev->ts_gen_cntrl = 0x08;
1268
1269 /* Do a hardware reset of chip before using it. */
1270 cx_clear(MO_GP0_IO, 1);
1271 mdelay(100);
1272 cx_set(MO_GP0_IO, 1);
1273 mdelay(200);
1274 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1275 &fusionhdtv_5_gold,
1276 &core->i2c_adap);
1277 if (fe0->dvb.frontend) {
1278 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1279 &core->i2c_adap, 0x61,
1280 TUNER_LG_TDVS_H06XF))
1281 goto frontend_detach;
1282 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1283 &core->i2c_adap, 0x43))
1284 goto frontend_detach;
1285 }
1286 break;
1287 case CX88_BOARD_PCHDTV_HD5500:
1288 dev->ts_gen_cntrl = 0x08;
1289
1290 /* Do a hardware reset of chip before using it. */
1291 cx_clear(MO_GP0_IO, 1);
1292 mdelay(100);
1293 cx_set(MO_GP0_IO, 1);
1294 mdelay(200);
1295 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1296 &pchdtv_hd5500,
1297 &core->i2c_adap);
1298 if (fe0->dvb.frontend) {
1299 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1300 &core->i2c_adap, 0x61,
1301 TUNER_LG_TDVS_H06XF))
1302 goto frontend_detach;
1303 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1304 &core->i2c_adap, 0x43))
1305 goto frontend_detach;
1306 }
1307 break;
1308 case CX88_BOARD_ATI_HDTVWONDER:
1309 fe0->dvb.frontend = dvb_attach(nxt200x_attach,
1310 &ati_hdtvwonder,
1311 &core->i2c_adap);
1312 if (fe0->dvb.frontend) {
1313 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1314 &core->i2c_adap, 0x61,
1315 TUNER_PHILIPS_TUV1236D))
1316 goto frontend_detach;
1317 }
1318 break;
1319 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
1320 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
1321 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1322 &hauppauge_novas_config,
1323 &core->i2c_adap);
1324 if (fe0->dvb.frontend) {
1325 bool override_tone;
1326
1327 if (core->model == 92001)
1328 override_tone = true;
1329 else
1330 override_tone = false;
1331
1332 if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
1333 &core->i2c_adap, 0x08, ISL6421_DCL,
1334 0x00, override_tone))
1335 goto frontend_detach;
1336 }
1337 break;
1338 case CX88_BOARD_KWORLD_DVBS_100:
1339 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1340 &kworld_dvbs_100_config,
1341 &core->i2c_adap);
1342 if (fe0->dvb.frontend) {
1343 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1344 fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
1345 }
1346 break;
1347 case CX88_BOARD_GENIATECH_DVBS:
1348 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1349 &geniatech_dvbs_config,
1350 &core->i2c_adap);
1351 if (fe0->dvb.frontend) {
1352 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1353 fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
1354 }
1355 break;
1356 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
1357 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1358 &pinnacle_pctv_hd_800i_config,
1359 &core->i2c_adap);
1360 if (fe0->dvb.frontend) {
1361 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1362 &core->i2c_adap,
1363 &pinnacle_pctv_hd_800i_tuner_config))
1364 goto frontend_detach;
1365 }
1366 break;
1367 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1368 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1369 &dvico_hdtv5_pci_nano_config,
1370 &core->i2c_adap);
1371 if (fe0->dvb.frontend) {
1372 struct dvb_frontend *fe;
1373 struct xc2028_config cfg = {
1374 .i2c_adap = &core->i2c_adap,
1375 .i2c_addr = 0x61,
1376 };
1377 static struct xc2028_ctrl ctl = {
1378 .fname = XC2028_DEFAULT_FIRMWARE,
1379 .max_len = 64,
1380 .scode_table = XC3028_FE_OREN538,
1381 };
1382
1383 fe = dvb_attach(xc2028_attach,
1384 fe0->dvb.frontend, &cfg);
1385 if (fe && fe->ops.tuner_ops.set_config)
1386 fe->ops.tuner_ops.set_config(fe, &ctl);
1387 }
1388 break;
1389 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
1390 case CX88_BOARD_WINFAST_DTV1800H:
1391 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1392 &cx88_pinnacle_hybrid_pctv,
1393 &core->i2c_adap);
1394 if (fe0->dvb.frontend) {
1395 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1396 if (attach_xc3028(0x61, dev) < 0)
1397 goto frontend_detach;
1398 }
1399 break;
1400 case CX88_BOARD_WINFAST_DTV1800H_XC4000:
1401 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1402 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1403 &cx88_pinnacle_hybrid_pctv,
1404 &core->i2c_adap);
1405 if (fe0->dvb.frontend) {
1406 struct xc4000_config cfg = {
1407 .i2c_address = 0x61,
1408 .default_pm = 0,
1409 .dvb_amplitude = 134,
1410 .set_smoothedcvbs = 1,
1411 .if_khz = 4560
1412 };
1413 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1414 if (attach_xc4000(dev, &cfg) < 0)
1415 goto frontend_detach;
1416 }
1417 break;
1418 case CX88_BOARD_GENIATECH_X8000_MT:
1419 dev->ts_gen_cntrl = 0x00;
1420
1421 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1422 &cx88_geniatech_x8000_mt,
1423 &core->i2c_adap);
1424 if (attach_xc3028(0x61, dev) < 0)
1425 goto frontend_detach;
1426 break;
1427 case CX88_BOARD_KWORLD_ATSC_120:
1428 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1429 &kworld_atsc_120_config,
1430 &core->i2c_adap);
1431 if (attach_xc3028(0x61, dev) < 0)
1432 goto frontend_detach;
1433 break;
1434 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
1435 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1436 &dvico_fusionhdtv7_config,
1437 &core->i2c_adap);
1438 if (fe0->dvb.frontend) {
1439 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1440 &core->i2c_adap,
1441 &dvico_fusionhdtv7_tuner_config))
1442 goto frontend_detach;
1443 }
1444 break;
1445 case CX88_BOARD_HAUPPAUGE_HVR4000:
1446 /* MFE frontend 1 */
1447 mfe_shared = 1;
1448 dev->frontends.gate = 2;
1449 /* DVB-S/S2 Init */
1450 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1451 &hauppauge_hvr4000_config,
1452 &dev->core->i2c_adap);
1453 if (fe0->dvb.frontend) {
1454 if (!dvb_attach(isl6421_attach,
1455 fe0->dvb.frontend,
1456 &dev->core->i2c_adap,
1457 0x08, ISL6421_DCL, 0x00, false))
1458 goto frontend_detach;
1459 }
1460 /* MFE frontend 2 */
1461 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1462 if (!fe1)
1463 goto frontend_detach;
1464 /* DVB-T Init */
1465 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1466 &hauppauge_hvr_config,
1467 &dev->core->i2c_adap);
1468 if (fe1->dvb.frontend) {
1469 fe1->dvb.frontend->id = 1;
1470 if (!dvb_attach(simple_tuner_attach,
1471 fe1->dvb.frontend,
1472 &dev->core->i2c_adap,
1473 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1474 goto frontend_detach;
1475 }
1476 break;
1477 case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
1478 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1479 &hauppauge_hvr4000_config,
1480 &dev->core->i2c_adap);
1481 if (fe0->dvb.frontend) {
1482 if (!dvb_attach(isl6421_attach,
1483 fe0->dvb.frontend,
1484 &dev->core->i2c_adap,
1485 0x08, ISL6421_DCL, 0x00, false))
1486 goto frontend_detach;
1487 }
1488 break;
1489 case CX88_BOARD_PROF_6200:
1490 case CX88_BOARD_TBS_8910:
1491 case CX88_BOARD_TEVII_S420:
1492 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1493 &tevii_tuner_sharp_config,
1494 &core->i2c_adap);
1495 if (fe0->dvb.frontend) {
1496 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
1497 &core->i2c_adap, DVB_PLL_OPERA1))
1498 goto frontend_detach;
1499 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1500 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1501
1502 } else {
1503 fe0->dvb.frontend = dvb_attach(stv0288_attach,
1504 &tevii_tuner_earda_config,
1505 &core->i2c_adap);
1506 if (fe0->dvb.frontend) {
1507 if (!dvb_attach(stb6000_attach,
1508 fe0->dvb.frontend, 0x61,
1509 &core->i2c_adap))
1510 goto frontend_detach;
1511 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1512 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1513 }
1514 }
1515 break;
1516 case CX88_BOARD_TEVII_S460:
1517 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1518 &tevii_s460_config,
1519 &core->i2c_adap);
1520 if (fe0->dvb.frontend)
1521 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1522 break;
1523 case CX88_BOARD_TEVII_S464:
1524 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1525 &tevii_ds3000_config,
1526 &core->i2c_adap);
1527 if (fe0->dvb.frontend) {
1528 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1529 &tevii_ts2020_config, &core->i2c_adap);
1530 fe0->dvb.frontend->ops.set_voltage =
1531 tevii_dvbs_set_voltage;
1532 }
1533 break;
1534 case CX88_BOARD_OMICOM_SS4_PCI:
1535 case CX88_BOARD_TBS_8920:
1536 case CX88_BOARD_PROF_7300:
1537 case CX88_BOARD_SATTRADE_ST4200:
1538 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1539 &hauppauge_hvr4000_config,
1540 &core->i2c_adap);
1541 if (fe0->dvb.frontend)
1542 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1543 break;
1544 case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
1545 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1546 &cx88_terratec_cinergy_ht_pci_mkii_config,
1547 &core->i2c_adap);
1548 if (fe0->dvb.frontend) {
1549 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1550 if (attach_xc3028(0x61, dev) < 0)
1551 goto frontend_detach;
1552 }
1553 break;
1554 case CX88_BOARD_PROF_7301:{
1555 struct dvb_tuner_ops *tuner_ops = NULL;
1556
1557 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1558 &prof_7301_stv0900_config,
1559 &core->i2c_adap, 0);
1560 if (fe0->dvb.frontend) {
1561 if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
1562 &prof_7301_stb6100_config,
1563 &core->i2c_adap))
1564 goto frontend_detach;
1565
1566 tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
1567 tuner_ops->set_frequency = stb6100_set_freq;
1568 tuner_ops->get_frequency = stb6100_get_freq;
1569 tuner_ops->set_bandwidth = stb6100_set_bandw;
1570 tuner_ops->get_bandwidth = stb6100_get_bandw;
1571
1572 core->prev_set_voltage =
1573 fe0->dvb.frontend->ops.set_voltage;
1574 fe0->dvb.frontend->ops.set_voltage =
1575 tevii_dvbs_set_voltage;
1576 }
1577 break;
1578 }
1579 case CX88_BOARD_SAMSUNG_SMT_7020:
1580 dev->ts_gen_cntrl = 0x08;
1581
1582 cx_set(MO_GP0_IO, 0x0101);
1583
1584 cx_clear(MO_GP0_IO, 0x01);
1585 mdelay(100);
1586 cx_set(MO_GP0_IO, 0x01);
1587 mdelay(200);
1588
1589 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1590 &samsung_stv0299_config,
1591 &dev->core->i2c_adap);
1592 if (fe0->dvb.frontend) {
1593 fe0->dvb.frontend->ops.tuner_ops.set_params =
1594 samsung_smt_7020_tuner_set_params;
1595 fe0->dvb.frontend->tuner_priv =
1596 &dev->core->i2c_adap;
1597 fe0->dvb.frontend->ops.set_voltage =
1598 samsung_smt_7020_set_voltage;
1599 fe0->dvb.frontend->ops.set_tone =
1600 samsung_smt_7020_set_tone;
1601 }
1602
1603 break;
1604 case CX88_BOARD_TWINHAN_VP1027_DVBS:
1605 dev->ts_gen_cntrl = 0x00;
1606 fe0->dvb.frontend = dvb_attach(mb86a16_attach,
1607 &twinhan_vp1027,
1608 &core->i2c_adap);
1609 if (fe0->dvb.frontend) {
1610 core->prev_set_voltage =
1611 fe0->dvb.frontend->ops.set_voltage;
1612 fe0->dvb.frontend->ops.set_voltage =
1613 vp1027_set_voltage;
1614 }
1615 break;
1616
1617 default:
1618 pr_err("The frontend of your DVB/ATSC card isn't supported yet\n");
1619 break;
1620 }
1621
1622 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1623 pr_err("frontend initialization failed\n");
1624 goto frontend_detach;
1625 }
1626 /* define general-purpose callback pointer */
1627 fe0->dvb.frontend->callback = cx88_tuner_callback;
1628
1629 /* Ensure all frontends negotiate bus access */
1630 fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1631 if (fe1)
1632 fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1633
1634 /* Put the analog decoder in standby to keep it quiet */
1635 call_all(core, core, s_power, 0);
1636
1637 /* register everything */
1638 res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1639 &dev->pci->dev, NULL, adapter_nr,
1640 mfe_shared);
1641 if (res)
1642 goto frontend_detach;
1643 return res;
1644
1645 frontend_detach:
1646 core->gate_ctrl = NULL;
1647 vb2_dvb_dealloc_frontends(&dev->frontends);
1648 return res;
1649 }
1650
1651 /* ----------------------------------------------------------- */
1652
1653 /* CX8802 MPEG -> mini driver - We have been given the hardware */
1654 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
1655 {
1656 struct cx88_core *core = drv->core;
1657 int err = 0;
1658
1659 dprintk(1, "%s\n", __func__);
1660
1661 switch (core->boardnr) {
1662 case CX88_BOARD_HAUPPAUGE_HVR1300:
1663 /* We arrive here with either the cx23416 or the cx22702
1664 * on the bus. Take the bus from the cx23416 and enable the
1665 * cx22702 demod
1666 */
1667 /* Toggle reset on cx22702 leaving i2c active */
1668 cx_set(MO_GP0_IO, 0x00000080);
1669 udelay(1000);
1670 cx_clear(MO_GP0_IO, 0x00000080);
1671 udelay(50);
1672 cx_set(MO_GP0_IO, 0x00000080);
1673 udelay(1000);
1674 /* enable the cx22702 pins */
1675 cx_clear(MO_GP0_IO, 0x00000004);
1676 udelay(1000);
1677 break;
1678
1679 case CX88_BOARD_HAUPPAUGE_HVR3000:
1680 case CX88_BOARD_HAUPPAUGE_HVR4000:
1681 /* Toggle reset on cx22702 leaving i2c active */
1682 cx_set(MO_GP0_IO, 0x00000080);
1683 udelay(1000);
1684 cx_clear(MO_GP0_IO, 0x00000080);
1685 udelay(50);
1686 cx_set(MO_GP0_IO, 0x00000080);
1687 udelay(1000);
1688 switch (core->dvbdev->frontends.active_fe_id) {
1689 case 1: /* DVB-S/S2 Enabled */
1690 /* tri-state the cx22702 pins */
1691 cx_set(MO_GP0_IO, 0x00000004);
1692 /* Take the cx24116/cx24123 out of reset */
1693 cx_write(MO_SRST_IO, 1);
1694 core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
1695 break;
1696 case 2: /* DVB-T Enabled */
1697 /* Put the cx24116/cx24123 into reset */
1698 cx_write(MO_SRST_IO, 0);
1699 /* enable the cx22702 pins */
1700 cx_clear(MO_GP0_IO, 0x00000004);
1701 core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
1702 break;
1703 }
1704 udelay(1000);
1705 break;
1706
1707 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1708 /* set RF input to AIR for DVB-T (GPIO 16) */
1709 cx_write(MO_GP2_IO, 0x0101);
1710 break;
1711
1712 default:
1713 err = -ENODEV;
1714 }
1715 return err;
1716 }
1717
1718 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
1719 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
1720 {
1721 struct cx88_core *core = drv->core;
1722 int err = 0;
1723
1724 dprintk(1, "%s\n", __func__);
1725
1726 switch (core->boardnr) {
1727 case CX88_BOARD_HAUPPAUGE_HVR1300:
1728 /* Do Nothing, leave the cx22702 on the bus. */
1729 break;
1730 case CX88_BOARD_HAUPPAUGE_HVR3000:
1731 case CX88_BOARD_HAUPPAUGE_HVR4000:
1732 break;
1733 default:
1734 err = -ENODEV;
1735 }
1736 return err;
1737 }
1738
1739 static int cx8802_dvb_probe(struct cx8802_driver *drv)
1740 {
1741 struct cx88_core *core = drv->core;
1742 struct cx8802_dev *dev = drv->core->dvbdev;
1743 int err;
1744 struct vb2_dvb_frontend *fe;
1745 int i;
1746
1747 dprintk(1, "%s\n", __func__);
1748 dprintk(1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1749 core->boardnr,
1750 core->name,
1751 core->pci_bus,
1752 core->pci_slot);
1753
1754 err = -ENODEV;
1755 if (!(core->board.mpeg & CX88_MPEG_DVB))
1756 goto fail_core;
1757
1758 /* If vp3054 isn't enabled, a stub will just return 0 */
1759 err = vp3054_i2c_probe(dev);
1760 if (err != 0)
1761 goto fail_core;
1762
1763 /* dvb stuff */
1764 pr_info("cx2388x based DVB/ATSC card\n");
1765 dev->ts_gen_cntrl = 0x0c;
1766
1767 err = cx8802_alloc_frontends(dev);
1768 if (err)
1769 goto fail_core;
1770
1771 for (i = 1; i <= core->board.num_frontends; i++) {
1772 struct vb2_queue *q;
1773
1774 fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i);
1775 if (!fe) {
1776 pr_err("%s() failed to get frontend(%d)\n",
1777 __func__, i);
1778 err = -ENODEV;
1779 goto fail_probe;
1780 }
1781 q = &fe->dvb.dvbq;
1782 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1783 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1784 q->gfp_flags = GFP_DMA32;
1785 q->min_buffers_needed = 2;
1786 q->drv_priv = dev;
1787 q->buf_struct_size = sizeof(struct cx88_buffer);
1788 q->ops = &dvb_qops;
1789 q->mem_ops = &vb2_dma_sg_memops;
1790 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1791 q->lock = &core->lock;
1792 q->dev = &dev->pci->dev;
1793
1794 err = vb2_queue_init(q);
1795 if (err < 0)
1796 goto fail_probe;
1797
1798 /* init struct vb2_dvb */
1799 fe->dvb.name = dev->core->name;
1800 }
1801
1802 err = dvb_register(dev);
1803 if (err)
1804 /* frontends/adapter de-allocated in dvb_register */
1805 pr_err("dvb_register failed (err = %d)\n", err);
1806 return err;
1807 fail_probe:
1808 vb2_dvb_dealloc_frontends(&core->dvbdev->frontends);
1809 fail_core:
1810 return err;
1811 }
1812
1813 static int cx8802_dvb_remove(struct cx8802_driver *drv)
1814 {
1815 struct cx88_core *core = drv->core;
1816 struct cx8802_dev *dev = drv->core->dvbdev;
1817
1818 dprintk(1, "%s\n", __func__);
1819
1820 vb2_dvb_unregister_bus(&dev->frontends);
1821
1822 vp3054_i2c_remove(dev);
1823
1824 core->gate_ctrl = NULL;
1825
1826 return 0;
1827 }
1828
1829 static struct cx8802_driver cx8802_dvb_driver = {
1830 .type_id = CX88_MPEG_DVB,
1831 .hw_access = CX8802_DRVCTL_SHARED,
1832 .probe = cx8802_dvb_probe,
1833 .remove = cx8802_dvb_remove,
1834 .advise_acquire = cx8802_dvb_advise_acquire,
1835 .advise_release = cx8802_dvb_advise_release,
1836 };
1837
1838 static int __init dvb_init(void)
1839 {
1840 pr_info("cx2388x dvb driver version %s loaded\n", CX88_VERSION);
1841 return cx8802_register_driver(&cx8802_dvb_driver);
1842 }
1843
1844 static void __exit dvb_fini(void)
1845 {
1846 cx8802_unregister_driver(&cx8802_dvb_driver);
1847 }
1848
1849 module_init(dvb_init);
1850 module_exit(dvb_fini);
Linux with added FPC-III support