?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / media / pci / dm1105 / dm1105.c
bloba589aa78d1d98deed94e38b98deacb080d8b0e3a
1 /*
2 * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
3 *
4 * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
22 #include <linux/i2c.h>
23 #include <linux/i2c-algo-bit.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/proc_fs.h>
29 #include <linux/pci.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/slab.h>
32 #include <media/rc-core.h>
33
34 #include "demux.h"
35 #include "dmxdev.h"
36 #include "dvb_demux.h"
37 #include "dvb_frontend.h"
38 #include "dvb_net.h"
39 #include "dvbdev.h"
40 #include "dvb-pll.h"
41
42 #include "stv0299.h"
43 #include "stv0288.h"
44 #include "stb6000.h"
45 #include "si21xx.h"
46 #include "cx24116.h"
47 #include "z0194a.h"
48 #include "ts2020.h"
49 #include "ds3000.h"
50
51 #define MODULE_NAME "dm1105"
52
53 #define UNSET (-1U)
54
55 #define DM1105_BOARD_NOAUTO UNSET
56 #define DM1105_BOARD_UNKNOWN 0
57 #define DM1105_BOARD_DVBWORLD_2002 1
58 #define DM1105_BOARD_DVBWORLD_2004 2
59 #define DM1105_BOARD_AXESS_DM05 3
60 #define DM1105_BOARD_UNBRANDED_I2C_ON_GPIO 4
61
62 /* ----------------------------------------------- */
63 /*
64 * PCI ID's
65 */
66 #ifndef PCI_VENDOR_ID_TRIGEM
67 #define PCI_VENDOR_ID_TRIGEM 0x109f
68 #endif
69 #ifndef PCI_VENDOR_ID_AXESS
70 #define PCI_VENDOR_ID_AXESS 0x195d
71 #endif
72 #ifndef PCI_DEVICE_ID_DM1105
73 #define PCI_DEVICE_ID_DM1105 0x036f
74 #endif
75 #ifndef PCI_DEVICE_ID_DW2002
76 #define PCI_DEVICE_ID_DW2002 0x2002
77 #endif
78 #ifndef PCI_DEVICE_ID_DW2004
79 #define PCI_DEVICE_ID_DW2004 0x2004
80 #endif
81 #ifndef PCI_DEVICE_ID_DM05
82 #define PCI_DEVICE_ID_DM05 0x1105
83 #endif
84 /* ----------------------------------------------- */
85 /* sdmc dm1105 registers */
86
87 /* TS Control */
88 #define DM1105_TSCTR 0x00
89 #define DM1105_DTALENTH 0x04
90
91 /* GPIO Interface */
92 #define DM1105_GPIOVAL 0x08
93 #define DM1105_GPIOCTR 0x0c
94
95 /* PID serial number */
96 #define DM1105_PIDN 0x10
97
98 /* Odd-even secret key select */
99 #define DM1105_CWSEL 0x14
100
101 /* Host Command Interface */
102 #define DM1105_HOST_CTR 0x18
103 #define DM1105_HOST_AD 0x1c
104
105 /* PCI Interface */
106 #define DM1105_CR 0x30
107 #define DM1105_RST 0x34
108 #define DM1105_STADR 0x38
109 #define DM1105_RLEN 0x3c
110 #define DM1105_WRP 0x40
111 #define DM1105_INTCNT 0x44
112 #define DM1105_INTMAK 0x48
113 #define DM1105_INTSTS 0x4c
114
115 /* CW Value */
116 #define DM1105_ODD 0x50
117 #define DM1105_EVEN 0x58
118
119 /* PID Value */
120 #define DM1105_PID 0x60
121
122 /* IR Control */
123 #define DM1105_IRCTR 0x64
124 #define DM1105_IRMODE 0x68
125 #define DM1105_SYSTEMCODE 0x6c
126 #define DM1105_IRCODE 0x70
127
128 /* Unknown Values */
129 #define DM1105_ENCRYPT 0x74
130 #define DM1105_VER 0x7c
131
132 /* I2C Interface */
133 #define DM1105_I2CCTR 0x80
134 #define DM1105_I2CSTS 0x81
135 #define DM1105_I2CDAT 0x82
136 #define DM1105_I2C_RA 0x83
137 /* ----------------------------------------------- */
138 /* Interrupt Mask Bits */
139
140 #define INTMAK_TSIRQM 0x01
141 #define INTMAK_HIRQM 0x04
142 #define INTMAK_IRM 0x08
143 #define INTMAK_ALLMASK (INTMAK_TSIRQM | \
144 INTMAK_HIRQM | \
145 INTMAK_IRM)
146 #define INTMAK_NONEMASK 0x00
147
148 /* Interrupt Status Bits */
149 #define INTSTS_TSIRQ 0x01
150 #define INTSTS_HIRQ 0x04
151 #define INTSTS_IR 0x08
152
153 /* IR Control Bits */
154 #define DM1105_IR_EN 0x01
155 #define DM1105_SYS_CHK 0x02
156 #define DM1105_REP_FLG 0x08
157
158 /* EEPROM addr */
159 #define IIC_24C01_addr 0xa0
160 /* Max board count */
161 #define DM1105_MAX 0x04
162
163 #define DRIVER_NAME "dm1105"
164 #define DM1105_I2C_GPIO_NAME "dm1105-gpio"
165
166 #define DM1105_DMA_PACKETS 47
167 #define DM1105_DMA_PACKET_LENGTH (128*4)
168 #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
169
170 /* */
171 #define GPIO08 (1 << 8)
172 #define GPIO13 (1 << 13)
173 #define GPIO14 (1 << 14)
174 #define GPIO15 (1 << 15)
175 #define GPIO16 (1 << 16)
176 #define GPIO17 (1 << 17)
177 #define GPIO_ALL 0x03ffff
178
179 /* GPIO's for LNB power control */
180 #define DM1105_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13))
181 #define DM1105_LNB_OFF GPIO17
182 #define DM1105_LNB_13V (GPIO16 | GPIO08)
183 #define DM1105_LNB_18V GPIO08
184
185 /* GPIO's for LNB power control for Axess DM05 */
186 #define DM05_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13))
187 #define DM05_LNB_OFF GPIO17/* actually 13v */
188 #define DM05_LNB_13V GPIO17
189 #define DM05_LNB_18V (GPIO17 | GPIO16)
190
191 /* GPIO's for LNB power control for unbranded with I2C on GPIO */
192 #define UNBR_LNB_MASK (GPIO17 | GPIO16)
193 #define UNBR_LNB_OFF 0
194 #define UNBR_LNB_13V GPIO17
195 #define UNBR_LNB_18V (GPIO17 | GPIO16)
196
197 static unsigned int card[] = {[0 ... 3] = UNSET };
198 module_param_array(card, int, NULL, 0444);
199 MODULE_PARM_DESC(card, "card type");
200
201 static int ir_debug;
202 module_param(ir_debug, int, 0644);
203 MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
204
205 static unsigned int dm1105_devcount;
206
207 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
208
209 struct dm1105_board {
210 char *name;
211 struct {
212 u32 mask, off, v13, v18;
213 } lnb;
214 u32 gpio_scl, gpio_sda;
215 };
216
217 struct dm1105_subid {
218 u16 subvendor;
219 u16 subdevice;
220 u32 card;
221 };
222
223 static const struct dm1105_board dm1105_boards[] = {
224 [DM1105_BOARD_UNKNOWN] = {
225 .name = "UNKNOWN/GENERIC",
226 .lnb = {
227 .mask = DM1105_LNB_MASK,
228 .off = DM1105_LNB_OFF,
229 .v13 = DM1105_LNB_13V,
230 .v18 = DM1105_LNB_18V,
231 },
232 },
233 [DM1105_BOARD_DVBWORLD_2002] = {
234 .name = "DVBWorld PCI 2002",
235 .lnb = {
236 .mask = DM1105_LNB_MASK,
237 .off = DM1105_LNB_OFF,
238 .v13 = DM1105_LNB_13V,
239 .v18 = DM1105_LNB_18V,
240 },
241 },
242 [DM1105_BOARD_DVBWORLD_2004] = {
243 .name = "DVBWorld PCI 2004",
244 .lnb = {
245 .mask = DM1105_LNB_MASK,
246 .off = DM1105_LNB_OFF,
247 .v13 = DM1105_LNB_13V,
248 .v18 = DM1105_LNB_18V,
249 },
250 },
251 [DM1105_BOARD_AXESS_DM05] = {
252 .name = "Axess/EasyTv DM05",
253 .lnb = {
254 .mask = DM05_LNB_MASK,
255 .off = DM05_LNB_OFF,
256 .v13 = DM05_LNB_13V,
257 .v18 = DM05_LNB_18V,
258 },
259 },
260 [DM1105_BOARD_UNBRANDED_I2C_ON_GPIO] = {
261 .name = "Unbranded DM1105 with i2c on GPIOs",
262 .lnb = {
263 .mask = UNBR_LNB_MASK,
264 .off = UNBR_LNB_OFF,
265 .v13 = UNBR_LNB_13V,
266 .v18 = UNBR_LNB_18V,
267 },
268 .gpio_scl = GPIO14,
269 .gpio_sda = GPIO13,
270 },
271 };
272
273 static const struct dm1105_subid dm1105_subids[] = {
274 {
275 .subvendor = 0x0000,
276 .subdevice = 0x2002,
277 .card = DM1105_BOARD_DVBWORLD_2002,
278 }, {
279 .subvendor = 0x0001,
280 .subdevice = 0x2002,
281 .card = DM1105_BOARD_DVBWORLD_2002,
282 }, {
283 .subvendor = 0x0000,
284 .subdevice = 0x2004,
285 .card = DM1105_BOARD_DVBWORLD_2004,
286 }, {
287 .subvendor = 0x0001,
288 .subdevice = 0x2004,
289 .card = DM1105_BOARD_DVBWORLD_2004,
290 }, {
291 .subvendor = 0x195d,
292 .subdevice = 0x1105,
293 .card = DM1105_BOARD_AXESS_DM05,
294 },
295 };
296
297 static void dm1105_card_list(struct pci_dev *pci)
298 {
299 int i;
300
301 if (0 == pci->subsystem_vendor &&
302 0 == pci->subsystem_device) {
303 printk(KERN_ERR
304 "dm1105: Your board has no valid PCI Subsystem ID\n"
305 "dm1105: and thus can't be autodetected\n"
306 "dm1105: Please pass card=<n> insmod option to\n"
307 "dm1105: workaround that. Redirect complaints to\n"
308 "dm1105: the vendor of the TV card. Best regards,\n"
309 "dm1105: -- tux\n");
310 } else {
311 printk(KERN_ERR
312 "dm1105: Your board isn't known (yet) to the driver.\n"
313 "dm1105: You can try to pick one of the existing\n"
314 "dm1105: card configs via card=<n> insmod option.\n"
315 "dm1105: Updating to the latest version might help\n"
316 "dm1105: as well.\n");
317 }
318 printk(KERN_ERR "Here is a list of valid choices for the card=<n> insmod option:\n");
319 for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
320 printk(KERN_ERR "dm1105: card=%d -> %s\n",
321 i, dm1105_boards[i].name);
322 }
323
324 /* infrared remote control */
325 struct infrared {
326 struct rc_dev *dev;
327 char input_phys[32];
328 struct work_struct work;
329 u32 ir_command;
330 };
331
332 struct dm1105_dev {
333 /* pci */
334 struct pci_dev *pdev;
335 u8 __iomem *io_mem;
336
337 /* ir */
338 struct infrared ir;
339
340 /* dvb */
341 struct dmx_frontend hw_frontend;
342 struct dmx_frontend mem_frontend;
343 struct dmxdev dmxdev;
344 struct dvb_adapter dvb_adapter;
345 struct dvb_demux demux;
346 struct dvb_frontend *fe;
347 struct dvb_net dvbnet;
348 unsigned int full_ts_users;
349 unsigned int boardnr;
350 int nr;
351
352 /* i2c */
353 struct i2c_adapter i2c_adap;
354 struct i2c_adapter i2c_bb_adap;
355 struct i2c_algo_bit_data i2c_bit;
356
357 /* irq */
358 struct work_struct work;
359 struct workqueue_struct *wq;
360 char wqn[16];
361
362 /* dma */
363 dma_addr_t dma_addr;
364 unsigned char *ts_buf;
365 u32 wrp;
366 u32 nextwrp;
367 u32 buffer_size;
368 unsigned int PacketErrorCount;
369 unsigned int dmarst;
370 spinlock_t lock;
371 };
372
373 #define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
374
375 #define dm_readb(reg) inb(dm_io_mem(reg))
376 #define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
377
378 #define dm_readw(reg) inw(dm_io_mem(reg))
379 #define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
380
381 #define dm_readl(reg) inl(dm_io_mem(reg))
382 #define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
383
384 #define dm_andorl(reg, mask, value) \
385 outl((inl(dm_io_mem(reg)) & ~(mask)) |\
386 ((value) & (mask)), (dm_io_mem(reg)))
387
388 #define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
389 #define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
390
391 /* The chip has 18 GPIOs. In HOST mode GPIO's used as 15 bit address lines,
392 so we can use only 3 GPIO's from GPIO15 to GPIO17.
393 Here I don't check whether HOST is enebled as it is not implemented yet.
394 */
395 static void dm1105_gpio_set(struct dm1105_dev *dev, u32 mask)
396 {
397 if (mask & 0xfffc0000)
398 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
399
400 if (mask & 0x0003ffff)
401 dm_setl(DM1105_GPIOVAL, mask & 0x0003ffff);
402
403 }
404
405 static void dm1105_gpio_clear(struct dm1105_dev *dev, u32 mask)
406 {
407 if (mask & 0xfffc0000)
408 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
409
410 if (mask & 0x0003ffff)
411 dm_clearl(DM1105_GPIOVAL, mask & 0x0003ffff);
412
413 }
414
415 static void dm1105_gpio_andor(struct dm1105_dev *dev, u32 mask, u32 val)
416 {
417 if (mask & 0xfffc0000)
418 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
419
420 if (mask & 0x0003ffff)
421 dm_andorl(DM1105_GPIOVAL, mask & 0x0003ffff, val);
422
423 }
424
425 static u32 dm1105_gpio_get(struct dm1105_dev *dev, u32 mask)
426 {
427 if (mask & 0xfffc0000)
428 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
429
430 if (mask & 0x0003ffff)
431 return dm_readl(DM1105_GPIOVAL) & mask & 0x0003ffff;
432
433 return 0;
434 }
435
436 static void dm1105_gpio_enable(struct dm1105_dev *dev, u32 mask, int asoutput)
437 {
438 if (mask & 0xfffc0000)
439 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
440
441 if ((mask & 0x0003ffff) && asoutput)
442 dm_clearl(DM1105_GPIOCTR, mask & 0x0003ffff);
443 else if ((mask & 0x0003ffff) && !asoutput)
444 dm_setl(DM1105_GPIOCTR, mask & 0x0003ffff);
445
446 }
447
448 static void dm1105_setline(struct dm1105_dev *dev, u32 line, int state)
449 {
450 if (state)
451 dm1105_gpio_enable(dev, line, 0);
452 else {
453 dm1105_gpio_enable(dev, line, 1);
454 dm1105_gpio_clear(dev, line);
455 }
456 }
457
458 static void dm1105_setsda(void *data, int state)
459 {
460 struct dm1105_dev *dev = data;
461
462 dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_sda, state);
463 }
464
465 static void dm1105_setscl(void *data, int state)
466 {
467 struct dm1105_dev *dev = data;
468
469 dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_scl, state);
470 }
471
472 static int dm1105_getsda(void *data)
473 {
474 struct dm1105_dev *dev = data;
475
476 return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_sda)
477 ? 1 : 0;
478 }
479
480 static int dm1105_getscl(void *data)
481 {
482 struct dm1105_dev *dev = data;
483
484 return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_scl)
485 ? 1 : 0;
486 }
487
488 static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
489 struct i2c_msg *msgs, int num)
490 {
491 struct dm1105_dev *dev ;
492
493 int addr, rc, i, j, k, len, byte, data;
494 u8 status;
495
496 dev = i2c_adap->algo_data;
497 for (i = 0; i < num; i++) {
498 dm_writeb(DM1105_I2CCTR, 0x00);
499 if (msgs[i].flags & I2C_M_RD) {
500 /* read bytes */
501 addr = msgs[i].addr << 1;
502 addr |= 1;
503 dm_writeb(DM1105_I2CDAT, addr);
504 for (byte = 0; byte < msgs[i].len; byte++)
505 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
506
507 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
508 for (j = 0; j < 55; j++) {
509 mdelay(10);
510 status = dm_readb(DM1105_I2CSTS);
511 if ((status & 0xc0) == 0x40)
512 break;
513 }
514 if (j >= 55)
515 return -1;
516
517 for (byte = 0; byte < msgs[i].len; byte++) {
518 rc = dm_readb(DM1105_I2CDAT + byte + 1);
519 if (rc < 0)
520 goto err;
521 msgs[i].buf[byte] = rc;
522 }
523 } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
524 /* prepaired for cx24116 firmware */
525 /* Write in small blocks */
526 len = msgs[i].len - 1;
527 k = 1;
528 do {
529 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
530 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
531 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
532 data = msgs[i].buf[k + byte];
533 dm_writeb(DM1105_I2CDAT + byte + 2, data);
534 }
535 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
536 for (j = 0; j < 25; j++) {
537 mdelay(10);
538 status = dm_readb(DM1105_I2CSTS);
539 if ((status & 0xc0) == 0x40)
540 break;
541 }
542
543 if (j >= 25)
544 return -1;
545
546 k += 48;
547 len -= 48;
548 } while (len > 0);
549 } else {
550 /* write bytes */
551 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
552 for (byte = 0; byte < msgs[i].len; byte++) {
553 data = msgs[i].buf[byte];
554 dm_writeb(DM1105_I2CDAT + byte + 1, data);
555 }
556 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
557 for (j = 0; j < 25; j++) {
558 mdelay(10);
559 status = dm_readb(DM1105_I2CSTS);
560 if ((status & 0xc0) == 0x40)
561 break;
562 }
563
564 if (j >= 25)
565 return -1;
566 }
567 }
568 return num;
569 err:
570 return rc;
571 }
572
573 static u32 functionality(struct i2c_adapter *adap)
574 {
575 return I2C_FUNC_I2C;
576 }
577
578 static struct i2c_algorithm dm1105_algo = {
579 .master_xfer = dm1105_i2c_xfer,
580 .functionality = functionality,
581 };
582
583 static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
584 {
585 return container_of(feed->demux, struct dm1105_dev, demux);
586 }
587
588 static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
589 {
590 return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
591 }
592
593 static int dm1105_set_voltage(struct dvb_frontend *fe,
594 enum fe_sec_voltage voltage)
595 {
596 struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
597
598 dm1105_gpio_enable(dev, dm1105_boards[dev->boardnr].lnb.mask, 1);
599 if (voltage == SEC_VOLTAGE_18)
600 dm1105_gpio_andor(dev,
601 dm1105_boards[dev->boardnr].lnb.mask,
602 dm1105_boards[dev->boardnr].lnb.v18);
603 else if (voltage == SEC_VOLTAGE_13)
604 dm1105_gpio_andor(dev,
605 dm1105_boards[dev->boardnr].lnb.mask,
606 dm1105_boards[dev->boardnr].lnb.v13);
607 else
608 dm1105_gpio_andor(dev,
609 dm1105_boards[dev->boardnr].lnb.mask,
610 dm1105_boards[dev->boardnr].lnb.off);
611
612 return 0;
613 }
614
615 static void dm1105_set_dma_addr(struct dm1105_dev *dev)
616 {
617 dm_writel(DM1105_STADR, (__force u32)cpu_to_le32(dev->dma_addr));
618 }
619
620 static int dm1105_dma_map(struct dm1105_dev *dev)
621 {
622 dev->ts_buf = pci_alloc_consistent(dev->pdev,
623 6 * DM1105_DMA_BYTES,
624 &dev->dma_addr);
625
626 return !dev->ts_buf;
627 }
628
629 static void dm1105_dma_unmap(struct dm1105_dev *dev)
630 {
631 pci_free_consistent(dev->pdev,
632 6 * DM1105_DMA_BYTES,
633 dev->ts_buf,
634 dev->dma_addr);
635 }
636
637 static void dm1105_enable_irqs(struct dm1105_dev *dev)
638 {
639 dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
640 dm_writeb(DM1105_CR, 1);
641 }
642
643 static void dm1105_disable_irqs(struct dm1105_dev *dev)
644 {
645 dm_writeb(DM1105_INTMAK, INTMAK_IRM);
646 dm_writeb(DM1105_CR, 0);
647 }
648
649 static int dm1105_start_feed(struct dvb_demux_feed *f)
650 {
651 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
652
653 if (dev->full_ts_users++ == 0)
654 dm1105_enable_irqs(dev);
655
656 return 0;
657 }
658
659 static int dm1105_stop_feed(struct dvb_demux_feed *f)
660 {
661 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
662
663 if (--dev->full_ts_users == 0)
664 dm1105_disable_irqs(dev);
665
666 return 0;
667 }
668
669 /* ir work handler */
670 static void dm1105_emit_key(struct work_struct *work)
671 {
672 struct infrared *ir = container_of(work, struct infrared, work);
673 u32 ircom = ir->ir_command;
674 u8 data;
675
676 if (ir_debug)
677 printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
678
679 data = (ircom >> 8) & 0x7f;
680
681 /* FIXME: UNKNOWN because we don't generate a full NEC scancode (yet?) */
682 rc_keydown(ir->dev, RC_TYPE_UNKNOWN, data, 0);
683 }
684
685 /* work handler */
686 static void dm1105_dmx_buffer(struct work_struct *work)
687 {
688 struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
689 unsigned int nbpackets;
690 u32 oldwrp = dev->wrp;
691 u32 nextwrp = dev->nextwrp;
692
693 if (!((dev->ts_buf[oldwrp] == 0x47) &&
694 (dev->ts_buf[oldwrp + 188] == 0x47) &&
695 (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
696 dev->PacketErrorCount++;
697 /* bad packet found */
698 if ((dev->PacketErrorCount >= 2) &&
699 (dev->dmarst == 0)) {
700 dm_writeb(DM1105_RST, 1);
701 dev->wrp = 0;
702 dev->PacketErrorCount = 0;
703 dev->dmarst = 0;
704 return;
705 }
706 }
707
708 if (nextwrp < oldwrp) {
709 memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
710 nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
711 } else
712 nbpackets = (nextwrp - oldwrp) / 188;
713
714 dev->wrp = nextwrp;
715 dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
716 }
717
718 static irqreturn_t dm1105_irq(int irq, void *dev_id)
719 {
720 struct dm1105_dev *dev = dev_id;
721
722 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
723 unsigned int intsts = dm_readb(DM1105_INTSTS);
724 dm_writeb(DM1105_INTSTS, intsts);
725
726 switch (intsts) {
727 case INTSTS_TSIRQ:
728 case (INTSTS_TSIRQ | INTSTS_IR):
729 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
730 queue_work(dev->wq, &dev->work);
731 break;
732 case INTSTS_IR:
733 dev->ir.ir_command = dm_readl(DM1105_IRCODE);
734 schedule_work(&dev->ir.work);
735 break;
736 }
737
738 return IRQ_HANDLED;
739 }
740
741 static int dm1105_ir_init(struct dm1105_dev *dm1105)
742 {
743 struct rc_dev *dev;
744 int err = -ENOMEM;
745
746 dev = rc_allocate_device();
747 if (!dev)
748 return -ENOMEM;
749
750 snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
751 "pci-%s/ir0", pci_name(dm1105->pdev));
752
753 dev->driver_name = MODULE_NAME;
754 dev->map_name = RC_MAP_DM1105_NEC;
755 dev->driver_type = RC_DRIVER_SCANCODE;
756 dev->input_name = "DVB on-card IR receiver";
757 dev->input_phys = dm1105->ir.input_phys;
758 dev->input_id.bustype = BUS_PCI;
759 dev->input_id.version = 1;
760 if (dm1105->pdev->subsystem_vendor) {
761 dev->input_id.vendor = dm1105->pdev->subsystem_vendor;
762 dev->input_id.product = dm1105->pdev->subsystem_device;
763 } else {
764 dev->input_id.vendor = dm1105->pdev->vendor;
765 dev->input_id.product = dm1105->pdev->device;
766 }
767 dev->dev.parent = &dm1105->pdev->dev;
768
769 INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
770
771 err = rc_register_device(dev);
772 if (err < 0) {
773 rc_free_device(dev);
774 return err;
775 }
776
777 dm1105->ir.dev = dev;
778 return 0;
779 }
780
781 static void dm1105_ir_exit(struct dm1105_dev *dm1105)
782 {
783 rc_unregister_device(dm1105->ir.dev);
784 }
785
786 static int dm1105_hw_init(struct dm1105_dev *dev)
787 {
788 dm1105_disable_irqs(dev);
789
790 dm_writeb(DM1105_HOST_CTR, 0);
791
792 /*DATALEN 188,*/
793 dm_writeb(DM1105_DTALENTH, 188);
794 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
795 dm_writew(DM1105_TSCTR, 0xc10a);
796
797 /* map DMA and set address */
798 dm1105_dma_map(dev);
799 dm1105_set_dma_addr(dev);
800 /* big buffer */
801 dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
802 dm_writeb(DM1105_INTCNT, 47);
803
804 /* IR NEC mode enable */
805 dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
806 dm_writeb(DM1105_IRMODE, 0);
807 dm_writew(DM1105_SYSTEMCODE, 0);
808
809 return 0;
810 }
811
812 static void dm1105_hw_exit(struct dm1105_dev *dev)
813 {
814 dm1105_disable_irqs(dev);
815
816 /* IR disable */
817 dm_writeb(DM1105_IRCTR, 0);
818 dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
819
820 dm1105_dma_unmap(dev);
821 }
822
823 static struct stv0299_config sharp_z0194a_config = {
824 .demod_address = 0x68,
825 .inittab = sharp_z0194a_inittab,
826 .mclk = 88000000UL,
827 .invert = 1,
828 .skip_reinit = 0,
829 .lock_output = STV0299_LOCKOUTPUT_1,
830 .volt13_op0_op1 = STV0299_VOLT13_OP1,
831 .min_delay_ms = 100,
832 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
833 };
834
835 static struct stv0288_config earda_config = {
836 .demod_address = 0x68,
837 .min_delay_ms = 100,
838 };
839
840 static struct si21xx_config serit_config = {
841 .demod_address = 0x68,
842 .min_delay_ms = 100,
843
844 };
845
846 static struct cx24116_config serit_sp2633_config = {
847 .demod_address = 0x55,
848 };
849
850 static struct ds3000_config dvbworld_ds3000_config = {
851 .demod_address = 0x68,
852 };
853
854 static struct ts2020_config dvbworld_ts2020_config = {
855 .tuner_address = 0x60,
856 .clk_out_div = 1,
857 };
858
859 static int frontend_init(struct dm1105_dev *dev)
860 {
861 int ret;
862
863 switch (dev->boardnr) {
864 case DM1105_BOARD_UNBRANDED_I2C_ON_GPIO:
865 dm1105_gpio_enable(dev, GPIO15, 1);
866 dm1105_gpio_clear(dev, GPIO15);
867 msleep(100);
868 dm1105_gpio_set(dev, GPIO15);
869 msleep(200);
870 dev->fe = dvb_attach(
871 stv0299_attach, &sharp_z0194a_config,
872 &dev->i2c_bb_adap);
873 if (dev->fe) {
874 dev->fe->ops.set_voltage = dm1105_set_voltage;
875 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
876 &dev->i2c_bb_adap, DVB_PLL_OPERA1);
877 break;
878 }
879
880 dev->fe = dvb_attach(
881 stv0288_attach, &earda_config,
882 &dev->i2c_bb_adap);
883 if (dev->fe) {
884 dev->fe->ops.set_voltage = dm1105_set_voltage;
885 dvb_attach(stb6000_attach, dev->fe, 0x61,
886 &dev->i2c_bb_adap);
887 break;
888 }
889
890 dev->fe = dvb_attach(
891 si21xx_attach, &serit_config,
892 &dev->i2c_bb_adap);
893 if (dev->fe)
894 dev->fe->ops.set_voltage = dm1105_set_voltage;
895 break;
896 case DM1105_BOARD_DVBWORLD_2004:
897 dev->fe = dvb_attach(
898 cx24116_attach, &serit_sp2633_config,
899 &dev->i2c_adap);
900 if (dev->fe) {
901 dev->fe->ops.set_voltage = dm1105_set_voltage;
902 break;
903 }
904
905 dev->fe = dvb_attach(
906 ds3000_attach, &dvbworld_ds3000_config,
907 &dev->i2c_adap);
908 if (dev->fe) {
909 dvb_attach(ts2020_attach, dev->fe,
910 &dvbworld_ts2020_config, &dev->i2c_adap);
911 dev->fe->ops.set_voltage = dm1105_set_voltage;
912 }
913
914 break;
915 case DM1105_BOARD_DVBWORLD_2002:
916 case DM1105_BOARD_AXESS_DM05:
917 default:
918 dev->fe = dvb_attach(
919 stv0299_attach, &sharp_z0194a_config,
920 &dev->i2c_adap);
921 if (dev->fe) {
922 dev->fe->ops.set_voltage = dm1105_set_voltage;
923 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
924 &dev->i2c_adap, DVB_PLL_OPERA1);
925 break;
926 }
927
928 dev->fe = dvb_attach(
929 stv0288_attach, &earda_config,
930 &dev->i2c_adap);
931 if (dev->fe) {
932 dev->fe->ops.set_voltage = dm1105_set_voltage;
933 dvb_attach(stb6000_attach, dev->fe, 0x61,
934 &dev->i2c_adap);
935 break;
936 }
937
938 dev->fe = dvb_attach(
939 si21xx_attach, &serit_config,
940 &dev->i2c_adap);
941 if (dev->fe)
942 dev->fe->ops.set_voltage = dm1105_set_voltage;
943
944 }
945
946 if (!dev->fe) {
947 dev_err(&dev->pdev->dev, "could not attach frontend\n");
948 return -ENODEV;
949 }
950
951 ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
952 if (ret < 0) {
953 if (dev->fe->ops.release)
954 dev->fe->ops.release(dev->fe);
955 dev->fe = NULL;
956 return ret;
957 }
958
959 return 0;
960 }
961
962 static void dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
963 {
964 static u8 command[1] = { 0x28 };
965
966 struct i2c_msg msg[] = {
967 {
968 .addr = IIC_24C01_addr >> 1,
969 .flags = 0,
970 .buf = command,
971 .len = 1
972 }, {
973 .addr = IIC_24C01_addr >> 1,
974 .flags = I2C_M_RD,
975 .buf = mac,
976 .len = 6
977 },
978 };
979
980 dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
981 dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
982 }
983
984 static int dm1105_probe(struct pci_dev *pdev,
985 const struct pci_device_id *ent)
986 {
987 struct dm1105_dev *dev;
988 struct dvb_adapter *dvb_adapter;
989 struct dvb_demux *dvbdemux;
990 struct dmx_demux *dmx;
991 int ret = -ENOMEM;
992 int i;
993
994 dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
995 if (!dev)
996 return -ENOMEM;
997
998 /* board config */
999 dev->nr = dm1105_devcount;
1000 dev->boardnr = UNSET;
1001 if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
1002 dev->boardnr = card[dev->nr];
1003 for (i = 0; UNSET == dev->boardnr &&
1004 i < ARRAY_SIZE(dm1105_subids); i++)
1005 if (pdev->subsystem_vendor ==
1006 dm1105_subids[i].subvendor &&
1007 pdev->subsystem_device ==
1008 dm1105_subids[i].subdevice)
1009 dev->boardnr = dm1105_subids[i].card;
1010
1011 if (UNSET == dev->boardnr) {
1012 dev->boardnr = DM1105_BOARD_UNKNOWN;
1013 dm1105_card_list(pdev);
1014 }
1015
1016 dm1105_devcount++;
1017 dev->pdev = pdev;
1018 dev->buffer_size = 5 * DM1105_DMA_BYTES;
1019 dev->PacketErrorCount = 0;
1020 dev->dmarst = 0;
1021
1022 ret = pci_enable_device(pdev);
1023 if (ret < 0)
1024 goto err_kfree;
1025
1026 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1027 if (ret < 0)
1028 goto err_pci_disable_device;
1029
1030 pci_set_master(pdev);
1031
1032 ret = pci_request_regions(pdev, DRIVER_NAME);
1033 if (ret < 0)
1034 goto err_pci_disable_device;
1035
1036 dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
1037 if (!dev->io_mem) {
1038 ret = -EIO;
1039 goto err_pci_release_regions;
1040 }
1041
1042 spin_lock_init(&dev->lock);
1043 pci_set_drvdata(pdev, dev);
1044
1045 ret = dm1105_hw_init(dev);
1046 if (ret < 0)
1047 goto err_pci_iounmap;
1048
1049 /* i2c */
1050 i2c_set_adapdata(&dev->i2c_adap, dev);
1051 strcpy(dev->i2c_adap.name, DRIVER_NAME);
1052 dev->i2c_adap.owner = THIS_MODULE;
1053 dev->i2c_adap.dev.parent = &pdev->dev;
1054 dev->i2c_adap.algo = &dm1105_algo;
1055 dev->i2c_adap.algo_data = dev;
1056 ret = i2c_add_adapter(&dev->i2c_adap);
1057
1058 if (ret < 0)
1059 goto err_dm1105_hw_exit;
1060
1061 i2c_set_adapdata(&dev->i2c_bb_adap, dev);
1062 strcpy(dev->i2c_bb_adap.name, DM1105_I2C_GPIO_NAME);
1063 dev->i2c_bb_adap.owner = THIS_MODULE;
1064 dev->i2c_bb_adap.dev.parent = &pdev->dev;
1065 dev->i2c_bb_adap.algo_data = &dev->i2c_bit;
1066 dev->i2c_bit.data = dev;
1067 dev->i2c_bit.setsda = dm1105_setsda;
1068 dev->i2c_bit.setscl = dm1105_setscl;
1069 dev->i2c_bit.getsda = dm1105_getsda;
1070 dev->i2c_bit.getscl = dm1105_getscl;
1071 dev->i2c_bit.udelay = 10;
1072 dev->i2c_bit.timeout = 10;
1073
1074 /* Raise SCL and SDA */
1075 dm1105_setsda(dev, 1);
1076 dm1105_setscl(dev, 1);
1077
1078 ret = i2c_bit_add_bus(&dev->i2c_bb_adap);
1079 if (ret < 0)
1080 goto err_i2c_del_adapter;
1081
1082 /* dvb */
1083 ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
1084 THIS_MODULE, &pdev->dev, adapter_nr);
1085 if (ret < 0)
1086 goto err_i2c_del_adapters;
1087
1088 dvb_adapter = &dev->dvb_adapter;
1089
1090 dm1105_read_mac(dev, dvb_adapter->proposed_mac);
1091
1092 dvbdemux = &dev->demux;
1093 dvbdemux->filternum = 256;
1094 dvbdemux->feednum = 256;
1095 dvbdemux->start_feed = dm1105_start_feed;
1096 dvbdemux->stop_feed = dm1105_stop_feed;
1097 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
1098 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
1099 ret = dvb_dmx_init(dvbdemux);
1100 if (ret < 0)
1101 goto err_dvb_unregister_adapter;
1102
1103 dmx = &dvbdemux->dmx;
1104 dev->dmxdev.filternum = 256;
1105 dev->dmxdev.demux = dmx;
1106 dev->dmxdev.capabilities = 0;
1107
1108 ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
1109 if (ret < 0)
1110 goto err_dvb_dmx_release;
1111
1112 dev->hw_frontend.source = DMX_FRONTEND_0;
1113
1114 ret = dmx->add_frontend(dmx, &dev->hw_frontend);
1115 if (ret < 0)
1116 goto err_dvb_dmxdev_release;
1117
1118 dev->mem_frontend.source = DMX_MEMORY_FE;
1119
1120 ret = dmx->add_frontend(dmx, &dev->mem_frontend);
1121 if (ret < 0)
1122 goto err_remove_hw_frontend;
1123
1124 ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
1125 if (ret < 0)
1126 goto err_remove_mem_frontend;
1127
1128 ret = dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
1129 if (ret < 0)
1130 goto err_disconnect_frontend;
1131
1132 ret = frontend_init(dev);
1133 if (ret < 0)
1134 goto err_dvb_net;
1135
1136 dm1105_ir_init(dev);
1137
1138 INIT_WORK(&dev->work, dm1105_dmx_buffer);
1139 sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
1140 dev->wq = create_singlethread_workqueue(dev->wqn);
1141 if (!dev->wq) {
1142 ret = -ENOMEM;
1143 goto err_dvb_net;
1144 }
1145
1146 ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
1147 DRIVER_NAME, dev);
1148 if (ret < 0)
1149 goto err_workqueue;
1150
1151 return 0;
1152
1153 err_workqueue:
1154 destroy_workqueue(dev->wq);
1155 err_dvb_net:
1156 dvb_net_release(&dev->dvbnet);
1157 err_disconnect_frontend:
1158 dmx->disconnect_frontend(dmx);
1159 err_remove_mem_frontend:
1160 dmx->remove_frontend(dmx, &dev->mem_frontend);
1161 err_remove_hw_frontend:
1162 dmx->remove_frontend(dmx, &dev->hw_frontend);
1163 err_dvb_dmxdev_release:
1164 dvb_dmxdev_release(&dev->dmxdev);
1165 err_dvb_dmx_release:
1166 dvb_dmx_release(dvbdemux);
1167 err_dvb_unregister_adapter:
1168 dvb_unregister_adapter(dvb_adapter);
1169 err_i2c_del_adapters:
1170 i2c_del_adapter(&dev->i2c_bb_adap);
1171 err_i2c_del_adapter:
1172 i2c_del_adapter(&dev->i2c_adap);
1173 err_dm1105_hw_exit:
1174 dm1105_hw_exit(dev);
1175 err_pci_iounmap:
1176 pci_iounmap(pdev, dev->io_mem);
1177 err_pci_release_regions:
1178 pci_release_regions(pdev);
1179 err_pci_disable_device:
1180 pci_disable_device(pdev);
1181 err_kfree:
1182 kfree(dev);
1183 return ret;
1184 }
1185
1186 static void dm1105_remove(struct pci_dev *pdev)
1187 {
1188 struct dm1105_dev *dev = pci_get_drvdata(pdev);
1189 struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
1190 struct dvb_demux *dvbdemux = &dev->demux;
1191 struct dmx_demux *dmx = &dvbdemux->dmx;
1192
1193 dm1105_ir_exit(dev);
1194 dmx->close(dmx);
1195 dvb_net_release(&dev->dvbnet);
1196 if (dev->fe)
1197 dvb_unregister_frontend(dev->fe);
1198
1199 dmx->disconnect_frontend(dmx);
1200 dmx->remove_frontend(dmx, &dev->mem_frontend);
1201 dmx->remove_frontend(dmx, &dev->hw_frontend);
1202 dvb_dmxdev_release(&dev->dmxdev);
1203 dvb_dmx_release(dvbdemux);
1204 dvb_unregister_adapter(dvb_adapter);
1205 i2c_del_adapter(&dev->i2c_adap);
1206
1207 dm1105_hw_exit(dev);
1208 free_irq(pdev->irq, dev);
1209 pci_iounmap(pdev, dev->io_mem);
1210 pci_release_regions(pdev);
1211 pci_disable_device(pdev);
1212 dm1105_devcount--;
1213 kfree(dev);
1214 }
1215
1216 static struct pci_device_id dm1105_id_table[] = {
1217 {
1218 .vendor = PCI_VENDOR_ID_TRIGEM,
1219 .device = PCI_DEVICE_ID_DM1105,
1220 .subvendor = PCI_ANY_ID,
1221 .subdevice = PCI_ANY_ID,
1222 }, {
1223 .vendor = PCI_VENDOR_ID_AXESS,
1224 .device = PCI_DEVICE_ID_DM05,
1225 .subvendor = PCI_ANY_ID,
1226 .subdevice = PCI_ANY_ID,
1227 }, {
1228 /* empty */
1229 },
1230 };
1231
1232 MODULE_DEVICE_TABLE(pci, dm1105_id_table);
1233
1234 static struct pci_driver dm1105_driver = {
1235 .name = DRIVER_NAME,
1236 .id_table = dm1105_id_table,
1237 .probe = dm1105_probe,
1238 .remove = dm1105_remove,
1239 };
1240
1241 module_pci_driver(dm1105_driver);
1242
1243 MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
1244 MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
1245 MODULE_LICENSE("GPL");
Linux with added FPC-III support