drivers/media/pci/saa7134/saa7134-ts.c

   1 /*
   2  *
   3  * device driver for philips saa7134 based TV cards
   4  * video4linux video interface
   5  *
   6  * (c) 2001,02 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
   7  *
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License as published by
  10  *  the Free Software Foundation; either version 2 of the License, or
  11  *  (at your option) any later version.
  12  *
  13  *  This program is distributed in the hope that it will be useful,
  14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *  GNU General Public License for more details.
  17  *
  18  *  You should have received a copy of the GNU General Public License
  19  *  along with this program; if not, write to the Free Software
  20  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include "saa7134.h"
  24 #include "saa7134-reg.h"
  25
  26 #include <linux/init.h>
  27 #include <linux/list.h>
  28 #include <linux/module.h>
  29 #include <linux/kernel.h>
  30 #include <linux/delay.h>
  31
  32 /* ------------------------------------------------------------------ */
  33
  34 static unsigned int ts_debug;
  35 module_param(ts_debug, int, 0644);
  36 MODULE_PARM_DESC(ts_debug,"enable debug messages [ts]");
  37
  38 #define ts_dbg(fmt, arg...) do { \
  39         if (ts_debug) \
  40                 printk(KERN_DEBUG pr_fmt("ts: " fmt), ## arg); \
  41         } while (0)
  42
  43 /* ------------------------------------------------------------------ */
  44 static int buffer_activate(struct saa7134_dev *dev,
  45                            struct saa7134_buf *buf,
  46                            struct saa7134_buf *next)
  47 {
  48
  49         ts_dbg("buffer_activate [%p]", buf);
  50         buf->top_seen = 0;
  51
  52         if (!dev->ts_started)
  53                 dev->ts_field = V4L2_FIELD_TOP;
  54
  55         if (NULL == next)
  56                 next = buf;
  57         if (V4L2_FIELD_TOP == dev->ts_field) {
  58                 ts_dbg("- [top]     buf=%p next=%p\n", buf, next);
  59                 saa_writel(SAA7134_RS_BA1(5),saa7134_buffer_base(buf));
  60                 saa_writel(SAA7134_RS_BA2(5),saa7134_buffer_base(next));
  61                 dev->ts_field = V4L2_FIELD_BOTTOM;
  62         } else {
  63                 ts_dbg("- [bottom]  buf=%p next=%p\n", buf, next);
  64                 saa_writel(SAA7134_RS_BA1(5),saa7134_buffer_base(next));
  65                 saa_writel(SAA7134_RS_BA2(5),saa7134_buffer_base(buf));
  66                 dev->ts_field = V4L2_FIELD_TOP;
  67         }
  68
  69         /* start DMA */
  70         saa7134_set_dmabits(dev);
  71
  72         mod_timer(&dev->ts_q.timeout, jiffies+TS_BUFFER_TIMEOUT);
  73
  74         if (!dev->ts_started)
  75                 saa7134_ts_start(dev);
  76
  77         return 0;
  78 }
  79
  80 int saa7134_ts_buffer_init(struct vb2_buffer *vb2)
  81 {
  82         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2);
  83         struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
  84         struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2);
  85
  86         dmaq->curr = NULL;
  87         buf->activate = buffer_activate;
  88
  89         return 0;
  90 }
  91 EXPORT_SYMBOL_GPL(saa7134_ts_buffer_init);
  92
  93 int saa7134_ts_buffer_prepare(struct vb2_buffer *vb2)
  94 {
  95         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2);
  96         struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
  97         struct saa7134_dev *dev = dmaq->dev;
  98         struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2);
  99         struct sg_table *dma = vb2_dma_sg_plane_desc(vb2, 0);
 100         unsigned int lines, llength, size;
 101
 102         ts_dbg("buffer_prepare [%p]\n", buf);
 103
 104         llength = TS_PACKET_SIZE;
 105         lines = dev->ts.nr_packets;
 106
 107         size = lines * llength;
 108         if (vb2_plane_size(vb2, 0) < size)
 109                 return -EINVAL;
 110
 111         vb2_set_plane_payload(vb2, 0, size);
 112         vbuf->field = dev->field;
 113
 114         return saa7134_pgtable_build(dev->pci, &dmaq->pt, dma->sgl, dma->nents,
 115                                     saa7134_buffer_startpage(buf));
 116 }
 117 EXPORT_SYMBOL_GPL(saa7134_ts_buffer_prepare);
 118
 119 int saa7134_ts_queue_setup(struct vb2_queue *q,
 120                            unsigned int *nbuffers, unsigned int *nplanes,
 121                            unsigned int sizes[], struct device *alloc_devs[])
 122 {
 123         struct saa7134_dmaqueue *dmaq = q->drv_priv;
 124         struct saa7134_dev *dev = dmaq->dev;
 125         int size = TS_PACKET_SIZE * dev->ts.nr_packets;
 126
 127         if (0 == *nbuffers)
 128                 *nbuffers = dev->ts.nr_bufs;
 129         *nbuffers = saa7134_buffer_count(size, *nbuffers);
 130         if (*nbuffers < 3)
 131                 *nbuffers = 3;
 132         *nplanes = 1;
 133         sizes[0] = size;
 134         return 0;
 135 }
 136 EXPORT_SYMBOL_GPL(saa7134_ts_queue_setup);
 137
 138 int saa7134_ts_start_streaming(struct vb2_queue *vq, unsigned int count)
 139 {
 140         struct saa7134_dmaqueue *dmaq = vq->drv_priv;
 141         struct saa7134_dev *dev = dmaq->dev;
 142
 143         /*
 144          * Planar video capture and TS share the same DMA channel,
 145          * so only one can be active at a time.
 146          */
 147         if (vb2_is_busy(&dev->video_vbq) && dev->fmt->planar) {
 148                 struct saa7134_buf *buf, *tmp;
 149
 150                 list_for_each_entry_safe(buf, tmp, &dmaq->queue, entry) {
 151                         list_del(&buf->entry);
 152                         vb2_buffer_done(&buf->vb2.vb2_buf,
 153                                         VB2_BUF_STATE_QUEUED);
 154                 }
 155                 if (dmaq->curr) {
 156                         vb2_buffer_done(&dmaq->curr->vb2.vb2_buf,
 157                                         VB2_BUF_STATE_QUEUED);
 158                         dmaq->curr = NULL;
 159                 }
 160                 return -EBUSY;
 161         }
 162         dmaq->seq_nr = 0;
 163         return 0;
 164 }
 165 EXPORT_SYMBOL_GPL(saa7134_ts_start_streaming);
 166
 167 void saa7134_ts_stop_streaming(struct vb2_queue *vq)
 168 {
 169         struct saa7134_dmaqueue *dmaq = vq->drv_priv;
 170         struct saa7134_dev *dev = dmaq->dev;
 171
 172         saa7134_ts_stop(dev);
 173         saa7134_stop_streaming(dev, dmaq);
 174 }
 175 EXPORT_SYMBOL_GPL(saa7134_ts_stop_streaming);
 176
 177 struct vb2_ops saa7134_ts_qops = {
 178         .queue_setup    = saa7134_ts_queue_setup,
 179         .buf_init       = saa7134_ts_buffer_init,
 180         .buf_prepare    = saa7134_ts_buffer_prepare,
 181         .buf_queue      = saa7134_vb2_buffer_queue,
 182         .wait_prepare   = vb2_ops_wait_prepare,
 183         .wait_finish    = vb2_ops_wait_finish,
 184         .stop_streaming = saa7134_ts_stop_streaming,
 185 };
 186 EXPORT_SYMBOL_GPL(saa7134_ts_qops);
 187
 188 /* ----------------------------------------------------------- */
 189 /* exported stuff                                              */
 190
 191 static unsigned int tsbufs = 8;
 192 module_param(tsbufs, int, 0444);
 193 MODULE_PARM_DESC(tsbufs, "number of ts buffers for read/write IO, range 2-32");
 194
 195 static unsigned int ts_nr_packets = 64;
 196 module_param(ts_nr_packets, int, 0444);
 197 MODULE_PARM_DESC(ts_nr_packets,"size of a ts buffers (in ts packets)");
 198
 199 int saa7134_ts_init_hw(struct saa7134_dev *dev)
 200 {
 201         /* deactivate TS softreset */
 202         saa_writeb(SAA7134_TS_SERIAL1, 0x00);
 203         /* TSSOP high active, TSVAL high active, TSLOCK ignored */
 204         saa_writeb(SAA7134_TS_PARALLEL, 0x6c);
 205         saa_writeb(SAA7134_TS_PARALLEL_SERIAL, (TS_PACKET_SIZE-1));
 206         saa_writeb(SAA7134_TS_DMA0, ((dev->ts.nr_packets-1)&0xff));
 207         saa_writeb(SAA7134_TS_DMA1, (((dev->ts.nr_packets-1)>>8)&0xff));
 208         /* TSNOPIT=0, TSCOLAP=0 */
 209         saa_writeb(SAA7134_TS_DMA2,
 210                 ((((dev->ts.nr_packets-1)>>16)&0x3f) | 0x00));
 211
 212         return 0;
 213 }
 214
 215 int saa7134_ts_init1(struct saa7134_dev *dev)
 216 {
 217         /* sanitycheck insmod options */
 218         if (tsbufs < 2)
 219                 tsbufs = 2;
 220         if (tsbufs > VIDEO_MAX_FRAME)
 221                 tsbufs = VIDEO_MAX_FRAME;
 222         if (ts_nr_packets < 4)
 223                 ts_nr_packets = 4;
 224         if (ts_nr_packets > 312)
 225                 ts_nr_packets = 312;
 226         dev->ts.nr_bufs    = tsbufs;
 227         dev->ts.nr_packets = ts_nr_packets;
 228
 229         INIT_LIST_HEAD(&dev->ts_q.queue);
 230         init_timer(&dev->ts_q.timeout);
 231         dev->ts_q.timeout.function = saa7134_buffer_timeout;
 232         dev->ts_q.timeout.data     = (unsigned long)(&dev->ts_q);
 233         dev->ts_q.dev              = dev;
 234         dev->ts_q.need_two         = 1;
 235         dev->ts_started            = 0;
 236         saa7134_pgtable_alloc(dev->pci, &dev->ts_q.pt);
 237
 238         /* init TS hw */
 239         saa7134_ts_init_hw(dev);
 240
 241         return 0;
 242 }
 243
 244 /* Function for stop TS */
 245 int saa7134_ts_stop(struct saa7134_dev *dev)
 246 {
 247         ts_dbg("TS stop\n");
 248
 249         if (!dev->ts_started)
 250                 return 0;
 251
 252         /* Stop TS stream */
 253         switch (saa7134_boards[dev->board].ts_type) {
 254         case SAA7134_MPEG_TS_PARALLEL:
 255                 saa_writeb(SAA7134_TS_PARALLEL, 0x6c);
 256                 dev->ts_started = 0;
 257                 break;
 258         case SAA7134_MPEG_TS_SERIAL:
 259                 saa_writeb(SAA7134_TS_SERIAL0, 0x40);
 260                 dev->ts_started = 0;
 261                 break;
 262         }
 263         return 0;
 264 }
 265
 266 /* Function for start TS */
 267 int saa7134_ts_start(struct saa7134_dev *dev)
 268 {
 269         ts_dbg("TS start\n");
 270
 271         if (WARN_ON(dev->ts_started))
 272                 return 0;
 273
 274         /* dma: setup channel 5 (= TS) */
 275         saa_writeb(SAA7134_TS_DMA0, (dev->ts.nr_packets - 1) & 0xff);
 276         saa_writeb(SAA7134_TS_DMA1,
 277                 ((dev->ts.nr_packets - 1) >> 8) & 0xff);
 278         /* TSNOPIT=0, TSCOLAP=0 */
 279         saa_writeb(SAA7134_TS_DMA2,
 280                 (((dev->ts.nr_packets - 1) >> 16) & 0x3f) | 0x00);
 281         saa_writel(SAA7134_RS_PITCH(5), TS_PACKET_SIZE);
 282         saa_writel(SAA7134_RS_CONTROL(5), SAA7134_RS_CONTROL_BURST_16 |
 283                                           SAA7134_RS_CONTROL_ME |
 284                                           (dev->ts_q.pt.dma >> 12));
 285
 286         /* reset hardware TS buffers */
 287         saa_writeb(SAA7134_TS_SERIAL1, 0x00);
 288         saa_writeb(SAA7134_TS_SERIAL1, 0x03);
 289         saa_writeb(SAA7134_TS_SERIAL1, 0x00);
 290         saa_writeb(SAA7134_TS_SERIAL1, 0x01);
 291
 292         /* TS clock non-inverted */
 293         saa_writeb(SAA7134_TS_SERIAL1, 0x00);
 294
 295         /* Start TS stream */
 296         switch (saa7134_boards[dev->board].ts_type) {
 297         case SAA7134_MPEG_TS_PARALLEL:
 298                 saa_writeb(SAA7134_TS_SERIAL0, 0x40);
 299                 saa_writeb(SAA7134_TS_PARALLEL, 0xec |
 300                         (saa7134_boards[dev->board].ts_force_val << 4));
 301                 break;
 302         case SAA7134_MPEG_TS_SERIAL:
 303                 saa_writeb(SAA7134_TS_SERIAL0, 0xd8);
 304                 saa_writeb(SAA7134_TS_PARALLEL, 0x6c |
 305                         (saa7134_boards[dev->board].ts_force_val << 4));
 306                 saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc);
 307                 saa_writeb(SAA7134_TS_SERIAL1, 0x02);
 308                 break;
 309         }
 310
 311         dev->ts_started = 1;
 312
 313         return 0;
 314 }
 315
 316 int saa7134_ts_fini(struct saa7134_dev *dev)
 317 {
 318         saa7134_pgtable_free(dev->pci, &dev->ts_q.pt);
 319         return 0;
 320 }
 321
 322 void saa7134_irq_ts_done(struct saa7134_dev *dev, unsigned long status)
 323 {
 324         enum v4l2_field field;
 325
 326         spin_lock(&dev->slock);
 327         if (dev->ts_q.curr) {
 328                 field = dev->ts_field;
 329                 if (field != V4L2_FIELD_TOP) {
 330                         if ((status & 0x100000) != 0x000000)
 331                                 goto done;
 332                 } else {
 333                         if ((status & 0x100000) != 0x100000)
 334                                 goto done;
 335                 }
 336                 saa7134_buffer_finish(dev, &dev->ts_q, VB2_BUF_STATE_DONE);
 337         }
 338         saa7134_buffer_next(dev,&dev->ts_q);
 339
 340  done:
 341         spin_unlock(&dev->slock);
 342 }