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sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / media / pci / saa7164 / saa7164-core.c
blob03a1511a92be2c870951f199ec60ba06b441b97a
1 /*
2 * Driver for the NXP SAA7164 PCIe bridge
3 *
4 * Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/init.h>
23 #include <linux/list.h>
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
26 #include <linux/kmod.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/interrupt.h>
30 #include <linux/delay.h>
31 #include <asm/div64.h>
32
33 #ifdef CONFIG_PROC_FS
34 #include <linux/proc_fs.h>
35 #endif
36 #include "saa7164.h"
37
38 MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
39 MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
40 MODULE_LICENSE("GPL");
41
42 /*
43 * 1 Basic
44 * 2
45 * 4 i2c
46 * 8 api
47 * 16 cmd
48 * 32 bus
49 */
50
51 unsigned int saa_debug;
52 module_param_named(debug, saa_debug, int, 0644);
53 MODULE_PARM_DESC(debug, "enable debug messages");
54
55 static unsigned int fw_debug;
56 module_param(fw_debug, int, 0644);
57 MODULE_PARM_DESC(fw_debug, "Firmware debug level def:2");
58
59 unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS;
60 module_param(encoder_buffers, int, 0644);
61 MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64");
62
63 unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS;
64 module_param(vbi_buffers, int, 0644);
65 MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64");
66
67 unsigned int waitsecs = 10;
68 module_param(waitsecs, int, 0644);
69 MODULE_PARM_DESC(waitsecs, "timeout on firmware messages");
70
71 static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
72 module_param_array(card, int, NULL, 0444);
73 MODULE_PARM_DESC(card, "card type");
74
75 static unsigned int print_histogram = 64;
76 module_param(print_histogram, int, 0644);
77 MODULE_PARM_DESC(print_histogram, "print histogram values once");
78
79 unsigned int crc_checking = 1;
80 module_param(crc_checking, int, 0644);
81 MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers");
82
83 static unsigned int guard_checking = 1;
84 module_param(guard_checking, int, 0644);
85 MODULE_PARM_DESC(guard_checking,
86 "enable dma sanity checking for buffer overruns");
87
88 static bool enable_msi = true;
89 module_param(enable_msi, bool, 0444);
90 MODULE_PARM_DESC(enable_msi,
91 "enable the use of an msi interrupt if available");
92
93 static unsigned int saa7164_devcount;
94
95 static DEFINE_MUTEX(devlist);
96 LIST_HEAD(saa7164_devlist);
97
98 #define INT_SIZE 16
99
100 static void saa7164_pack_verifier(struct saa7164_buffer *buf)
101 {
102 u8 *p = (u8 *)buf->cpu;
103 int i;
104
105 for (i = 0; i < buf->actual_size; i += 2048) {
106
107 if ((*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) ||
108 (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA)) {
109 printk(KERN_ERR "No pack at 0x%x\n", i);
110 #if 0
111 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
112 p + 1, 32, false);
113 #endif
114 }
115 }
116 }
117
118 #define FIXED_VIDEO_PID 0xf1
119 #define FIXED_AUDIO_PID 0xf2
120
121 static void saa7164_ts_verifier(struct saa7164_buffer *buf)
122 {
123 struct saa7164_port *port = buf->port;
124 u32 i;
125 u8 cc, a;
126 u16 pid;
127 u8 *bufcpu = (u8 *)buf->cpu;
128
129 port->sync_errors = 0;
130 port->v_cc_errors = 0;
131 port->a_cc_errors = 0;
132
133 for (i = 0; i < buf->actual_size; i += 188) {
134 if (*(bufcpu + i) != 0x47)
135 port->sync_errors++;
136
137 /* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */
138 pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2);
139 cc = *(bufcpu + i + 3) & 0x0f;
140
141 if (pid == FIXED_VIDEO_PID) {
142 a = ((port->last_v_cc + 1) & 0x0f);
143 if (a != cc) {
144 printk(KERN_ERR "video cc last = %x current = %x i = %d\n",
145 port->last_v_cc, cc, i);
146 port->v_cc_errors++;
147 }
148
149 port->last_v_cc = cc;
150 } else
151 if (pid == FIXED_AUDIO_PID) {
152 a = ((port->last_a_cc + 1) & 0x0f);
153 if (a != cc) {
154 printk(KERN_ERR "audio cc last = %x current = %x i = %d\n",
155 port->last_a_cc, cc, i);
156 port->a_cc_errors++;
157 }
158
159 port->last_a_cc = cc;
160 }
161
162 }
163
164 /* Only report errors if we've been through this function atleast
165 * once already and the cached cc values are primed. First time through
166 * always generates errors.
167 */
168 if (port->v_cc_errors && (port->done_first_interrupt > 1))
169 printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
170
171 if (port->a_cc_errors && (port->done_first_interrupt > 1))
172 printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
173
174 if (port->sync_errors && (port->done_first_interrupt > 1))
175 printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
176
177 if (port->done_first_interrupt == 1)
178 port->done_first_interrupt++;
179 }
180
181 static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
182 {
183 int i;
184
185 memset(hg, 0, sizeof(struct saa7164_histogram));
186 strcpy(hg->name, name);
187
188 /* First 30ms x 1ms */
189 for (i = 0; i < 30; i++)
190 hg->counter1[0 + i].val = i;
191
192 /* 30 - 200ms x 10ms */
193 for (i = 0; i < 18; i++)
194 hg->counter1[30 + i].val = 30 + (i * 10);
195
196 /* 200 - 2000ms x 100ms */
197 for (i = 0; i < 15; i++)
198 hg->counter1[48 + i].val = 200 + (i * 200);
199
200 /* Catch all massive value (2secs) */
201 hg->counter1[55].val = 2000;
202
203 /* Catch all massive value (4secs) */
204 hg->counter1[56].val = 4000;
205
206 /* Catch all massive value (8secs) */
207 hg->counter1[57].val = 8000;
208
209 /* Catch all massive value (15secs) */
210 hg->counter1[58].val = 15000;
211
212 /* Catch all massive value (30secs) */
213 hg->counter1[59].val = 30000;
214
215 /* Catch all massive value (60secs) */
216 hg->counter1[60].val = 60000;
217
218 /* Catch all massive value (5mins) */
219 hg->counter1[61].val = 300000;
220
221 /* Catch all massive value (15mins) */
222 hg->counter1[62].val = 900000;
223
224 /* Catch all massive values (1hr) */
225 hg->counter1[63].val = 3600000;
226 }
227
228 void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
229 {
230 int i;
231 for (i = 0; i < 64; i++) {
232 if (val <= hg->counter1[i].val) {
233 hg->counter1[i].count++;
234 hg->counter1[i].update_time = jiffies;
235 break;
236 }
237 }
238 }
239
240 static void saa7164_histogram_print(struct saa7164_port *port,
241 struct saa7164_histogram *hg)
242 {
243 u32 entries = 0;
244 int i;
245
246 printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name);
247 for (i = 0; i < 64; i++) {
248 if (hg->counter1[i].count == 0)
249 continue;
250
251 printk(KERN_ERR " %4d %12d %Ld\n",
252 hg->counter1[i].val,
253 hg->counter1[i].count,
254 hg->counter1[i].update_time);
255
256 entries++;
257 }
258 printk(KERN_ERR "Total: %d\n", entries);
259 }
260
261 static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr)
262 {
263 struct saa7164_dev *dev = port->dev;
264 struct saa7164_buffer *buf = NULL;
265 struct saa7164_user_buffer *ubuf = NULL;
266 struct list_head *c, *n;
267 int i = 0;
268 u8 *p;
269
270 mutex_lock(&port->dmaqueue_lock);
271 list_for_each_safe(c, n, &port->dmaqueue.list) {
272
273 buf = list_entry(c, struct saa7164_buffer, list);
274 if (i++ > port->hwcfg.buffercount) {
275 printk(KERN_ERR "%s() illegal i count %d\n",
276 __func__, i);
277 break;
278 }
279
280 if (buf->idx == bufnr) {
281
282 /* Found the buffer, deal with it */
283 dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr);
284
285 if (crc_checking) {
286 /* Throw a new checksum on the dma buffer */
287 buf->crc = crc32(0, buf->cpu, buf->actual_size);
288 }
289
290 if (guard_checking) {
291 p = (u8 *)buf->cpu;
292 if ((*(p + buf->actual_size + 0) != 0xff) ||
293 (*(p + buf->actual_size + 1) != 0xff) ||
294 (*(p + buf->actual_size + 2) != 0xff) ||
295 (*(p + buf->actual_size + 3) != 0xff) ||
296 (*(p + buf->actual_size + 0x10) != 0xff) ||
297 (*(p + buf->actual_size + 0x11) != 0xff) ||
298 (*(p + buf->actual_size + 0x12) != 0xff) ||
299 (*(p + buf->actual_size + 0x13) != 0xff)) {
300 printk(KERN_ERR "%s() buf %p guard buffer breach\n",
301 __func__, buf);
302 #if 0
303 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
304 p + buf->actual_size - 32, 64, false);
305 #endif
306 }
307 }
308
309 if ((port->nr != SAA7164_PORT_VBI1) && (port->nr != SAA7164_PORT_VBI2)) {
310 /* Validate the incoming buffer content */
311 if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
312 saa7164_ts_verifier(buf);
313 else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS)
314 saa7164_pack_verifier(buf);
315 }
316
317 /* find a free user buffer and clone to it */
318 if (!list_empty(&port->list_buf_free.list)) {
319
320 /* Pull the first buffer from the used list */
321 ubuf = list_first_entry(&port->list_buf_free.list,
322 struct saa7164_user_buffer, list);
323
324 if (buf->actual_size <= ubuf->actual_size) {
325
326 memcpy(ubuf->data, buf->cpu, ubuf->actual_size);
327
328 if (crc_checking) {
329 /* Throw a new checksum on the read buffer */
330 ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size);
331 }
332
333 /* Requeue the buffer on the free list */
334 ubuf->pos = 0;
335
336 list_move_tail(&ubuf->list,
337 &port->list_buf_used.list);
338
339 /* Flag any userland waiters */
340 wake_up_interruptible(&port->wait_read);
341
342 } else {
343 printk(KERN_ERR "buf %p bufsize fails match\n", buf);
344 }
345
346 } else
347 printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n");
348
349 /* Ensure offset into buffer remains 0, fill buffer
350 * with known bad data. We check for this data at a later point
351 * in time. */
352 saa7164_buffer_zero_offsets(port, bufnr);
353 memset(buf->cpu, 0xff, buf->pci_size);
354 if (crc_checking) {
355 /* Throw yet aanother new checksum on the dma buffer */
356 buf->crc = crc32(0, buf->cpu, buf->actual_size);
357 }
358
359 break;
360 }
361 }
362 mutex_unlock(&port->dmaqueue_lock);
363 }
364
365 static void saa7164_work_enchandler(struct work_struct *w)
366 {
367 struct saa7164_port *port =
368 container_of(w, struct saa7164_port, workenc);
369 struct saa7164_dev *dev = port->dev;
370
371 u32 wp, mcb, rp, cnt = 0;
372
373 port->last_svc_msecs_diff = port->last_svc_msecs;
374 port->last_svc_msecs = jiffies_to_msecs(jiffies);
375
376 port->last_svc_msecs_diff = port->last_svc_msecs -
377 port->last_svc_msecs_diff;
378
379 saa7164_histogram_update(&port->svc_interval,
380 port->last_svc_msecs_diff);
381
382 port->last_irq_svc_msecs_diff = port->last_svc_msecs -
383 port->last_irq_msecs;
384
385 saa7164_histogram_update(&port->irq_svc_interval,
386 port->last_irq_svc_msecs_diff);
387
388 dprintk(DBGLVL_IRQ,
389 "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
390 __func__,
391 port->last_svc_msecs_diff,
392 port->last_irq_svc_msecs_diff,
393 port->last_svc_wp,
394 port->last_svc_rp
395 );
396
397 /* Current write position */
398 wp = saa7164_readl(port->bufcounter);
399 if (wp > (port->hwcfg.buffercount - 1)) {
400 printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
401 return;
402 }
403
404 /* Most current complete buffer */
405 if (wp == 0)
406 mcb = (port->hwcfg.buffercount - 1);
407 else
408 mcb = wp - 1;
409
410 while (1) {
411 if (port->done_first_interrupt == 0) {
412 port->done_first_interrupt++;
413 rp = mcb;
414 } else
415 rp = (port->last_svc_rp + 1) % 8;
416
417 if (rp > (port->hwcfg.buffercount - 1)) {
418 printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
419 break;
420 }
421
422 saa7164_work_enchandler_helper(port, rp);
423 port->last_svc_rp = rp;
424 cnt++;
425
426 if (rp == mcb)
427 break;
428 }
429
430 /* TODO: Convert this into a /proc/saa7164 style readable file */
431 if (print_histogram == port->nr) {
432 saa7164_histogram_print(port, &port->irq_interval);
433 saa7164_histogram_print(port, &port->svc_interval);
434 saa7164_histogram_print(port, &port->irq_svc_interval);
435 saa7164_histogram_print(port, &port->read_interval);
436 saa7164_histogram_print(port, &port->poll_interval);
437 /* TODO: fix this to preserve any previous state */
438 print_histogram = 64 + port->nr;
439 }
440 }
441
442 static void saa7164_work_vbihandler(struct work_struct *w)
443 {
444 struct saa7164_port *port =
445 container_of(w, struct saa7164_port, workenc);
446 struct saa7164_dev *dev = port->dev;
447
448 u32 wp, mcb, rp, cnt = 0;
449
450 port->last_svc_msecs_diff = port->last_svc_msecs;
451 port->last_svc_msecs = jiffies_to_msecs(jiffies);
452 port->last_svc_msecs_diff = port->last_svc_msecs -
453 port->last_svc_msecs_diff;
454
455 saa7164_histogram_update(&port->svc_interval,
456 port->last_svc_msecs_diff);
457
458 port->last_irq_svc_msecs_diff = port->last_svc_msecs -
459 port->last_irq_msecs;
460
461 saa7164_histogram_update(&port->irq_svc_interval,
462 port->last_irq_svc_msecs_diff);
463
464 dprintk(DBGLVL_IRQ,
465 "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
466 __func__,
467 port->last_svc_msecs_diff,
468 port->last_irq_svc_msecs_diff,
469 port->last_svc_wp,
470 port->last_svc_rp
471 );
472
473 /* Current write position */
474 wp = saa7164_readl(port->bufcounter);
475 if (wp > (port->hwcfg.buffercount - 1)) {
476 printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
477 return;
478 }
479
480 /* Most current complete buffer */
481 if (wp == 0)
482 mcb = (port->hwcfg.buffercount - 1);
483 else
484 mcb = wp - 1;
485
486 while (1) {
487 if (port->done_first_interrupt == 0) {
488 port->done_first_interrupt++;
489 rp = mcb;
490 } else
491 rp = (port->last_svc_rp + 1) % 8;
492
493 if (rp > (port->hwcfg.buffercount - 1)) {
494 printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
495 break;
496 }
497
498 saa7164_work_enchandler_helper(port, rp);
499 port->last_svc_rp = rp;
500 cnt++;
501
502 if (rp == mcb)
503 break;
504 }
505
506 /* TODO: Convert this into a /proc/saa7164 style readable file */
507 if (print_histogram == port->nr) {
508 saa7164_histogram_print(port, &port->irq_interval);
509 saa7164_histogram_print(port, &port->svc_interval);
510 saa7164_histogram_print(port, &port->irq_svc_interval);
511 saa7164_histogram_print(port, &port->read_interval);
512 saa7164_histogram_print(port, &port->poll_interval);
513 /* TODO: fix this to preserve any previous state */
514 print_histogram = 64 + port->nr;
515 }
516 }
517
518 static void saa7164_work_cmdhandler(struct work_struct *w)
519 {
520 struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
521
522 /* Wake up any complete commands */
523 saa7164_irq_dequeue(dev);
524 }
525
526 static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
527 {
528 struct saa7164_port *port = buf->port;
529
530 /* Feed the transport payload into the kernel demux */
531 dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
532 SAA7164_TS_NUMBER_OF_LINES);
533
534 }
535
536 static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port)
537 {
538 struct saa7164_dev *dev = port->dev;
539
540 /* Store old time */
541 port->last_irq_msecs_diff = port->last_irq_msecs;
542
543 /* Collect new stats */
544 port->last_irq_msecs = jiffies_to_msecs(jiffies);
545
546 /* Calculate stats */
547 port->last_irq_msecs_diff = port->last_irq_msecs -
548 port->last_irq_msecs_diff;
549
550 saa7164_histogram_update(&port->irq_interval,
551 port->last_irq_msecs_diff);
552
553 dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
554 port->last_irq_msecs_diff);
555
556 /* Tis calls the vbi irq handler */
557 schedule_work(&port->workenc);
558 return 0;
559 }
560
561 static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
562 {
563 struct saa7164_dev *dev = port->dev;
564
565 /* Store old time */
566 port->last_irq_msecs_diff = port->last_irq_msecs;
567
568 /* Collect new stats */
569 port->last_irq_msecs = jiffies_to_msecs(jiffies);
570
571 /* Calculate stats */
572 port->last_irq_msecs_diff = port->last_irq_msecs -
573 port->last_irq_msecs_diff;
574
575 saa7164_histogram_update(&port->irq_interval,
576 port->last_irq_msecs_diff);
577
578 dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
579 port->last_irq_msecs_diff);
580
581 schedule_work(&port->workenc);
582 return 0;
583 }
584
585 static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
586 {
587 struct saa7164_dev *dev = port->dev;
588 struct saa7164_buffer *buf;
589 struct list_head *c, *n;
590 int wp, i = 0, rp;
591
592 /* Find the current write point from the hardware */
593 wp = saa7164_readl(port->bufcounter);
594 if (wp > (port->hwcfg.buffercount - 1))
595 BUG();
596
597 /* Find the previous buffer to the current write point */
598 if (wp == 0)
599 rp = (port->hwcfg.buffercount - 1);
600 else
601 rp = wp - 1;
602
603 /* Lookup the WP in the buffer list */
604 /* TODO: turn this into a worker thread */
605 list_for_each_safe(c, n, &port->dmaqueue.list) {
606 buf = list_entry(c, struct saa7164_buffer, list);
607 if (i++ > port->hwcfg.buffercount)
608 BUG();
609
610 if (buf->idx == rp) {
611 /* Found the buffer, deal with it */
612 dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
613 __func__, wp, rp);
614 saa7164_buffer_deliver(buf);
615 break;
616 }
617
618 }
619 return 0;
620 }
621
622 /* Primary IRQ handler and dispatch mechanism */
623 static irqreturn_t saa7164_irq(int irq, void *dev_id)
624 {
625 struct saa7164_dev *dev = dev_id;
626 struct saa7164_port *porta, *portb, *portc, *portd, *porte, *portf;
627
628 u32 intid, intstat[INT_SIZE/4];
629 int i, handled = 0, bit;
630
631 if (dev == NULL) {
632 printk(KERN_ERR "%s() No device specified\n", __func__);
633 handled = 0;
634 goto out;
635 }
636
637 porta = &dev->ports[SAA7164_PORT_TS1];
638 portb = &dev->ports[SAA7164_PORT_TS2];
639 portc = &dev->ports[SAA7164_PORT_ENC1];
640 portd = &dev->ports[SAA7164_PORT_ENC2];
641 porte = &dev->ports[SAA7164_PORT_VBI1];
642 portf = &dev->ports[SAA7164_PORT_VBI2];
643
644 /* Check that the hardware is accessible. If the status bytes are
645 * 0xFF then the device is not accessible, the the IRQ belongs
646 * to another driver.
647 * 4 x u32 interrupt registers.
648 */
649 for (i = 0; i < INT_SIZE/4; i++) {
650
651 /* TODO: Convert into saa7164_readl() */
652 /* Read the 4 hardware interrupt registers */
653 intstat[i] = saa7164_readl(dev->int_status + (i * 4));
654
655 if (intstat[i])
656 handled = 1;
657 }
658 if (handled == 0)
659 goto out;
660
661 /* For each of the HW interrupt registers */
662 for (i = 0; i < INT_SIZE/4; i++) {
663
664 if (intstat[i]) {
665 /* Each function of the board has it's own interruptid.
666 * Find the function that triggered then call
667 * it's handler.
668 */
669 for (bit = 0; bit < 32; bit++) {
670
671 if (((intstat[i] >> bit) & 0x00000001) == 0)
672 continue;
673
674 /* Calculate the interrupt id (0x00 to 0x7f) */
675
676 intid = (i * 32) + bit;
677 if (intid == dev->intfdesc.bInterruptId) {
678 /* A response to an cmd/api call */
679 schedule_work(&dev->workcmd);
680 } else if (intid == porta->hwcfg.interruptid) {
681
682 /* Transport path 1 */
683 saa7164_irq_ts(porta);
684
685 } else if (intid == portb->hwcfg.interruptid) {
686
687 /* Transport path 2 */
688 saa7164_irq_ts(portb);
689
690 } else if (intid == portc->hwcfg.interruptid) {
691
692 /* Encoder path 1 */
693 saa7164_irq_encoder(portc);
694
695 } else if (intid == portd->hwcfg.interruptid) {
696
697 /* Encoder path 2 */
698 saa7164_irq_encoder(portd);
699
700 } else if (intid == porte->hwcfg.interruptid) {
701
702 /* VBI path 1 */
703 saa7164_irq_vbi(porte);
704
705 } else if (intid == portf->hwcfg.interruptid) {
706
707 /* VBI path 2 */
708 saa7164_irq_vbi(portf);
709
710 } else {
711 /* Find the function */
712 dprintk(DBGLVL_IRQ,
713 "%s() unhandled interrupt reg 0x%x bit 0x%x intid = 0x%x\n",
714 __func__, i, bit, intid);
715 }
716 }
717
718 /* Ack it */
719 saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
720
721 }
722 }
723 out:
724 return IRQ_RETVAL(handled);
725 }
726
727 void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
728 {
729 struct saa7164_fw_status *s = &dev->fw_status;
730
731 dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
732 dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
733 dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
734 dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
735 dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
736 dev->fw_status.remainheap =
737 saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
738
739 dprintk(1, "Firmware status:\n");
740 dprintk(1, " .status = 0x%08x\n", s->status);
741 dprintk(1, " .mode = 0x%08x\n", s->mode);
742 dprintk(1, " .spec = 0x%08x\n", s->spec);
743 dprintk(1, " .inst = 0x%08x\n", s->inst);
744 dprintk(1, " .cpuload = 0x%08x\n", s->cpuload);
745 dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
746 }
747
748 u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
749 {
750 u32 reg;
751
752 reg = saa7164_readl(SAA_DEVICE_VERSION);
753 dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
754 (reg & 0x0000fc00) >> 10,
755 (reg & 0x000003e0) >> 5,
756 (reg & 0x0000001f),
757 (reg & 0xffff0000) >> 16,
758 reg);
759
760 return reg;
761 }
762
763 /* TODO: Debugging func, remove */
764 void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
765 {
766 int i;
767
768 dprintk(1, "--------------------> 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
769
770 for (i = 0; i < 0x100; i += 16)
771 dprintk(1, "region0[0x%08x] = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
772 i,
773 (u8)saa7164_readb(addr + i + 0),
774 (u8)saa7164_readb(addr + i + 1),
775 (u8)saa7164_readb(addr + i + 2),
776 (u8)saa7164_readb(addr + i + 3),
777 (u8)saa7164_readb(addr + i + 4),
778 (u8)saa7164_readb(addr + i + 5),
779 (u8)saa7164_readb(addr + i + 6),
780 (u8)saa7164_readb(addr + i + 7),
781 (u8)saa7164_readb(addr + i + 8),
782 (u8)saa7164_readb(addr + i + 9),
783 (u8)saa7164_readb(addr + i + 10),
784 (u8)saa7164_readb(addr + i + 11),
785 (u8)saa7164_readb(addr + i + 12),
786 (u8)saa7164_readb(addr + i + 13),
787 (u8)saa7164_readb(addr + i + 14),
788 (u8)saa7164_readb(addr + i + 15)
789 );
790 }
791
792 static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
793 {
794 dprintk(1, "@0x%p hwdesc sizeof(struct tmComResHWDescr) = %d bytes\n",
795 &dev->hwdesc, (u32)sizeof(struct tmComResHWDescr));
796
797 dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
798 dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
799 dprintk(1, " .bDescriptorSubtype = 0x%x\n",
800 dev->hwdesc.bDescriptorSubtype);
801
802 dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
803 dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
804 dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
805 dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
806 dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
807 dev->hwdesc.dwDeviceRegistersLocation);
808
809 dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
810 dev->hwdesc.dwHostMemoryRegion);
811
812 dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
813 dev->hwdesc.dwHostMemoryRegionSize);
814
815 dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
816 dev->hwdesc.dwHostHibernatMemRegion);
817
818 dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
819 dev->hwdesc.dwHostHibernatMemRegionSize);
820 }
821
822 static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
823 {
824 dprintk(1, "@0x%p intfdesc sizeof(struct tmComResInterfaceDescr) = %d bytes\n",
825 &dev->intfdesc, (u32)sizeof(struct tmComResInterfaceDescr));
826
827 dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
828 dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
829 dprintk(1, " .bDescriptorSubtype = 0x%x\n",
830 dev->intfdesc.bDescriptorSubtype);
831
832 dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
833 dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
834 dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
835 dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
836 dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
837 dprintk(1, " .bDebugInterruptId = 0x%x\n",
838 dev->intfdesc.bDebugInterruptId);
839
840 dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
841 }
842
843 static void saa7164_dump_busdesc(struct saa7164_dev *dev)
844 {
845 dprintk(1, "@0x%p busdesc sizeof(struct tmComResBusDescr) = %d bytes\n",
846 &dev->busdesc, (u32)sizeof(struct tmComResBusDescr));
847
848 dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing);
849 dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing);
850 dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite);
851 dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead);
852 dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
853 dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead);
854 }
855
856 /* Much of the hardware configuration and PCI registers are configured
857 * dynamically depending on firmware. We have to cache some initial
858 * structures then use these to locate other important structures
859 * from PCI space.
860 */
861 static void saa7164_get_descriptors(struct saa7164_dev *dev)
862 {
863 memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(struct tmComResHWDescr));
864 memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(struct tmComResHWDescr),
865 sizeof(struct tmComResInterfaceDescr));
866 memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
867 sizeof(struct tmComResBusDescr));
868
869 if (dev->hwdesc.bLength != sizeof(struct tmComResHWDescr)) {
870 printk(KERN_ERR "Structure struct tmComResHWDescr is mangled\n");
871 printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
872 (u32)sizeof(struct tmComResHWDescr));
873 } else
874 saa7164_dump_hwdesc(dev);
875
876 if (dev->intfdesc.bLength != sizeof(struct tmComResInterfaceDescr)) {
877 printk(KERN_ERR "struct struct tmComResInterfaceDescr is mangled\n");
878 printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
879 (u32)sizeof(struct tmComResInterfaceDescr));
880 } else
881 saa7164_dump_intfdesc(dev);
882
883 saa7164_dump_busdesc(dev);
884 }
885
886 static int saa7164_pci_quirks(struct saa7164_dev *dev)
887 {
888 return 0;
889 }
890
891 static int get_resources(struct saa7164_dev *dev)
892 {
893 if (request_mem_region(pci_resource_start(dev->pci, 0),
894 pci_resource_len(dev->pci, 0), dev->name)) {
895
896 if (request_mem_region(pci_resource_start(dev->pci, 2),
897 pci_resource_len(dev->pci, 2), dev->name))
898 return 0;
899 }
900
901 printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
902 dev->name,
903 (u64)pci_resource_start(dev->pci, 0),
904 (u64)pci_resource_start(dev->pci, 2));
905
906 return -EBUSY;
907 }
908
909 static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
910 {
911 struct saa7164_port *port = NULL;
912
913 if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS))
914 BUG();
915
916 port = &dev->ports[portnr];
917
918 port->dev = dev;
919 port->nr = portnr;
920
921 if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
922 port->type = SAA7164_MPEG_DVB;
923 else
924 if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) {
925 port->type = SAA7164_MPEG_ENCODER;
926
927 /* We need a deferred interrupt handler for cmd handling */
928 INIT_WORK(&port->workenc, saa7164_work_enchandler);
929 } else if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) {
930 port->type = SAA7164_MPEG_VBI;
931
932 /* We need a deferred interrupt handler for cmd handling */
933 INIT_WORK(&port->workenc, saa7164_work_vbihandler);
934 } else
935 BUG();
936
937 /* Init all the critical resources */
938 mutex_init(&port->dvb.lock);
939 INIT_LIST_HEAD(&port->dmaqueue.list);
940 mutex_init(&port->dmaqueue_lock);
941
942 INIT_LIST_HEAD(&port->list_buf_used.list);
943 INIT_LIST_HEAD(&port->list_buf_free.list);
944 init_waitqueue_head(&port->wait_read);
945
946
947 saa7164_histogram_reset(&port->irq_interval, "irq intervals");
948 saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
949 saa7164_histogram_reset(&port->irq_svc_interval,
950 "irq to deferred intervals");
951 saa7164_histogram_reset(&port->read_interval,
952 "encoder/vbi read() intervals");
953 saa7164_histogram_reset(&port->poll_interval,
954 "encoder/vbi poll() intervals");
955
956 return 0;
957 }
958
959 static int saa7164_dev_setup(struct saa7164_dev *dev)
960 {
961 int i;
962
963 mutex_init(&dev->lock);
964 atomic_inc(&dev->refcount);
965 dev->nr = saa7164_devcount++;
966
967 snprintf(dev->name, sizeof(dev->name), "saa7164[%d]", dev->nr);
968
969 mutex_lock(&devlist);
970 list_add_tail(&dev->devlist, &saa7164_devlist);
971 mutex_unlock(&devlist);
972
973 /* board config */
974 dev->board = UNSET;
975 if (card[dev->nr] < saa7164_bcount)
976 dev->board = card[dev->nr];
977
978 for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++)
979 if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
980 dev->pci->subsystem_device ==
981 saa7164_subids[i].subdevice)
982 dev->board = saa7164_subids[i].card;
983
984 if (UNSET == dev->board) {
985 dev->board = SAA7164_BOARD_UNKNOWN;
986 saa7164_card_list(dev);
987 }
988
989 dev->pci_bus = dev->pci->bus->number;
990 dev->pci_slot = PCI_SLOT(dev->pci->devfn);
991
992 /* I2C Defaults / setup */
993 dev->i2c_bus[0].dev = dev;
994 dev->i2c_bus[0].nr = 0;
995 dev->i2c_bus[1].dev = dev;
996 dev->i2c_bus[1].nr = 1;
997 dev->i2c_bus[2].dev = dev;
998 dev->i2c_bus[2].nr = 2;
999
1000 /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
1001 saa7164_port_init(dev, SAA7164_PORT_TS1);
1002 saa7164_port_init(dev, SAA7164_PORT_TS2);
1003 saa7164_port_init(dev, SAA7164_PORT_ENC1);
1004 saa7164_port_init(dev, SAA7164_PORT_ENC2);
1005 saa7164_port_init(dev, SAA7164_PORT_VBI1);
1006 saa7164_port_init(dev, SAA7164_PORT_VBI2);
1007
1008 if (get_resources(dev) < 0) {
1009 printk(KERN_ERR "CORE %s No more PCIe resources for subsystem: %04x:%04x\n",
1010 dev->name, dev->pci->subsystem_vendor,
1011 dev->pci->subsystem_device);
1012
1013 saa7164_devcount--;
1014 return -ENODEV;
1015 }
1016
1017 /* PCI/e allocations */
1018 dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
1019 pci_resource_len(dev->pci, 0));
1020
1021 dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
1022 pci_resource_len(dev->pci, 2));
1023
1024 dev->bmmio = (u8 __iomem *)dev->lmmio;
1025 dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
1026
1027 /* Inerrupt and ack register locations offset of bmmio */
1028 dev->int_status = 0x183000 + 0xf80;
1029 dev->int_ack = 0x183000 + 0xf90;
1030
1031 printk(KERN_INFO
1032 "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
1033 dev->name, dev->pci->subsystem_vendor,
1034 dev->pci->subsystem_device, saa7164_boards[dev->board].name,
1035 dev->board, card[dev->nr] == dev->board ?
1036 "insmod option" : "autodetected");
1037
1038 saa7164_pci_quirks(dev);
1039
1040 return 0;
1041 }
1042
1043 static void saa7164_dev_unregister(struct saa7164_dev *dev)
1044 {
1045 dprintk(1, "%s()\n", __func__);
1046
1047 release_mem_region(pci_resource_start(dev->pci, 0),
1048 pci_resource_len(dev->pci, 0));
1049
1050 release_mem_region(pci_resource_start(dev->pci, 2),
1051 pci_resource_len(dev->pci, 2));
1052
1053 if (!atomic_dec_and_test(&dev->refcount))
1054 return;
1055
1056 iounmap(dev->lmmio);
1057 iounmap(dev->lmmio2);
1058
1059 return;
1060 }
1061
1062 #ifdef CONFIG_PROC_FS
1063 static int saa7164_proc_show(struct seq_file *m, void *v)
1064 {
1065 struct saa7164_dev *dev;
1066 struct tmComResBusInfo *b;
1067 struct list_head *list;
1068 int i, c;
1069
1070 if (saa7164_devcount == 0)
1071 return 0;
1072
1073 list_for_each(list, &saa7164_devlist) {
1074 dev = list_entry(list, struct saa7164_dev, devlist);
1075 seq_printf(m, "%s = %p\n", dev->name, dev);
1076
1077 /* Lock the bus from any other access */
1078 b = &dev->bus;
1079 mutex_lock(&b->lock);
1080
1081 seq_printf(m, " .m_pdwSetWritePos = 0x%x (0x%08x)\n",
1082 b->m_dwSetReadPos, saa7164_readl(b->m_dwSetReadPos));
1083
1084 seq_printf(m, " .m_pdwSetReadPos = 0x%x (0x%08x)\n",
1085 b->m_dwSetWritePos, saa7164_readl(b->m_dwSetWritePos));
1086
1087 seq_printf(m, " .m_pdwGetWritePos = 0x%x (0x%08x)\n",
1088 b->m_dwGetReadPos, saa7164_readl(b->m_dwGetReadPos));
1089
1090 seq_printf(m, " .m_pdwGetReadPos = 0x%x (0x%08x)\n",
1091 b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos));
1092 c = 0;
1093 seq_printf(m, "\n Set Ring:\n");
1094 seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
1095 for (i = 0; i < b->m_dwSizeSetRing; i++) {
1096 if (c == 0)
1097 seq_printf(m, " %04x:", i);
1098
1099 seq_printf(m, " %02x", readb(b->m_pdwSetRing + i));
1100
1101 if (++c == 16) {
1102 seq_printf(m, "\n");
1103 c = 0;
1104 }
1105 }
1106
1107 c = 0;
1108 seq_printf(m, "\n Get Ring:\n");
1109 seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
1110 for (i = 0; i < b->m_dwSizeGetRing; i++) {
1111 if (c == 0)
1112 seq_printf(m, " %04x:", i);
1113
1114 seq_printf(m, " %02x", readb(b->m_pdwGetRing + i));
1115
1116 if (++c == 16) {
1117 seq_printf(m, "\n");
1118 c = 0;
1119 }
1120 }
1121
1122 mutex_unlock(&b->lock);
1123
1124 }
1125
1126 return 0;
1127 }
1128
1129 static int saa7164_proc_open(struct inode *inode, struct file *filp)
1130 {
1131 return single_open(filp, saa7164_proc_show, NULL);
1132 }
1133
1134 static const struct file_operations saa7164_proc_fops = {
1135 .open = saa7164_proc_open,
1136 .read = seq_read,
1137 .llseek = seq_lseek,
1138 .release = single_release,
1139 };
1140
1141 static int saa7164_proc_create(void)
1142 {
1143 struct proc_dir_entry *pe;
1144
1145 pe = proc_create("saa7164", S_IRUGO, NULL, &saa7164_proc_fops);
1146 if (!pe)
1147 return -ENOMEM;
1148
1149 return 0;
1150 }
1151 #endif
1152
1153 static int saa7164_thread_function(void *data)
1154 {
1155 struct saa7164_dev *dev = data;
1156 struct tmFwInfoStruct fwinfo;
1157 u64 last_poll_time = 0;
1158
1159 dprintk(DBGLVL_THR, "thread started\n");
1160
1161 set_freezable();
1162
1163 while (1) {
1164 msleep_interruptible(100);
1165 if (kthread_should_stop())
1166 break;
1167 try_to_freeze();
1168
1169 dprintk(DBGLVL_THR, "thread running\n");
1170
1171 /* Dump the firmware debug message to console */
1172 /* Polling this costs us 1-2% of the arm CPU */
1173 /* convert this into a respnde to interrupt 0x7a */
1174 saa7164_api_collect_debug(dev);
1175
1176 /* Monitor CPU load every 1 second */
1177 if ((last_poll_time + 1000 /* ms */) < jiffies_to_msecs(jiffies)) {
1178 saa7164_api_get_load_info(dev, &fwinfo);
1179 last_poll_time = jiffies_to_msecs(jiffies);
1180 }
1181
1182 }
1183
1184 dprintk(DBGLVL_THR, "thread exiting\n");
1185 return 0;
1186 }
1187
1188 static bool saa7164_enable_msi(struct pci_dev *pci_dev, struct saa7164_dev *dev)
1189 {
1190 int err;
1191
1192 if (!enable_msi) {
1193 printk(KERN_WARNING "%s() MSI disabled by module parameter 'enable_msi'"
1194 , __func__);
1195 return false;
1196 }
1197
1198 err = pci_enable_msi(pci_dev);
1199
1200 if (err) {
1201 printk(KERN_ERR "%s() Failed to enable MSI interrupt. Falling back to a shared IRQ\n",
1202 __func__);
1203 return false;
1204 }
1205
1206 /* no error - so request an msi interrupt */
1207 err = request_irq(pci_dev->irq, saa7164_irq, 0,
1208 dev->name, dev);
1209
1210 if (err) {
1211 /* fall back to legacy interrupt */
1212 printk(KERN_ERR "%s() Failed to get an MSI interrupt. Falling back to a shared IRQ\n",
1213 __func__);
1214 pci_disable_msi(pci_dev);
1215 return false;
1216 }
1217
1218 return true;
1219 }
1220
1221 static int saa7164_initdev(struct pci_dev *pci_dev,
1222 const struct pci_device_id *pci_id)
1223 {
1224 struct saa7164_dev *dev;
1225 int err, i;
1226 u32 version;
1227
1228 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1229 if (NULL == dev)
1230 return -ENOMEM;
1231
1232 err = v4l2_device_register(&pci_dev->dev, &dev->v4l2_dev);
1233 if (err < 0) {
1234 dev_err(&pci_dev->dev, "v4l2_device_register failed\n");
1235 goto fail_free;
1236 }
1237
1238 /* pci init */
1239 dev->pci = pci_dev;
1240 if (pci_enable_device(pci_dev)) {
1241 err = -EIO;
1242 goto fail_free;
1243 }
1244
1245 if (saa7164_dev_setup(dev) < 0) {
1246 err = -EINVAL;
1247 goto fail_free;
1248 }
1249
1250 /* print pci info */
1251 dev->pci_rev = pci_dev->revision;
1252 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1253 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
1254 dev->name,
1255 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1256 dev->pci_lat,
1257 (unsigned long long)pci_resource_start(pci_dev, 0));
1258
1259 pci_set_master(pci_dev);
1260 /* TODO */
1261 err = pci_set_dma_mask(pci_dev, 0xffffffff);
1262 if (err) {
1263 printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
1264 goto fail_irq;
1265 }
1266
1267 /* irq bit */
1268 if (saa7164_enable_msi(pci_dev, dev)) {
1269 dev->msi = true;
1270 } else {
1271 /* if we have an error (i.e. we don't have an interrupt)
1272 or msi is not enabled - fallback to shared interrupt */
1273
1274 err = request_irq(pci_dev->irq, saa7164_irq,
1275 IRQF_SHARED, dev->name, dev);
1276
1277 if (err < 0) {
1278 printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
1279 pci_dev->irq);
1280 err = -EIO;
1281 goto fail_irq;
1282 }
1283 }
1284
1285 pci_set_drvdata(pci_dev, dev);
1286
1287 /* Init the internal command list */
1288 for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
1289 dev->cmds[i].seqno = i;
1290 dev->cmds[i].inuse = 0;
1291 mutex_init(&dev->cmds[i].lock);
1292 init_waitqueue_head(&dev->cmds[i].wait);
1293 }
1294
1295 /* We need a deferred interrupt handler for cmd handling */
1296 INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
1297
1298 /* Only load the firmware if we know the board */
1299 if (dev->board != SAA7164_BOARD_UNKNOWN) {
1300
1301 err = saa7164_downloadfirmware(dev);
1302 if (err < 0) {
1303 printk(KERN_ERR
1304 "Failed to boot firmware, no features registered\n");
1305 goto fail_fw;
1306 }
1307
1308 saa7164_get_descriptors(dev);
1309 saa7164_dumpregs(dev, 0);
1310 saa7164_getcurrentfirmwareversion(dev);
1311 saa7164_getfirmwarestatus(dev);
1312 err = saa7164_bus_setup(dev);
1313 if (err < 0)
1314 printk(KERN_ERR
1315 "Failed to setup the bus, will continue\n");
1316 saa7164_bus_dump(dev);
1317
1318 /* Ping the running firmware via the command bus and get the
1319 * firmware version, this checks the bus is running OK.
1320 */
1321 version = 0;
1322 if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
1323 dprintk(1, "Bus is operating correctly using version %d.%d.%d.%d (0x%x)\n",
1324 (version & 0x0000fc00) >> 10,
1325 (version & 0x000003e0) >> 5,
1326 (version & 0x0000001f),
1327 (version & 0xffff0000) >> 16,
1328 version);
1329 else
1330 printk(KERN_ERR
1331 "Failed to communicate with the firmware\n");
1332
1333 /* Bring up the I2C buses */
1334 saa7164_i2c_register(&dev->i2c_bus[0]);
1335 saa7164_i2c_register(&dev->i2c_bus[1]);
1336 saa7164_i2c_register(&dev->i2c_bus[2]);
1337 saa7164_gpio_setup(dev);
1338 saa7164_card_setup(dev);
1339
1340 /* Parse the dynamic device configuration, find various
1341 * media endpoints (MPEG, WMV, PS, TS) and cache their
1342 * configuration details into the driver, so we can
1343 * reference them later during simething_register() func,
1344 * interrupt handlers, deferred work handlers etc.
1345 */
1346 saa7164_api_enum_subdevs(dev);
1347
1348 /* Begin to create the video sub-systems and register funcs */
1349 if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
1350 if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) {
1351 printk(KERN_ERR "%s() Failed to register dvb adapters on porta\n",
1352 __func__);
1353 }
1354 }
1355
1356 if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
1357 if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) {
1358 printk(KERN_ERR"%s() Failed to register dvb adapters on portb\n",
1359 __func__);
1360 }
1361 }
1362
1363 if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
1364 if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) {
1365 printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
1366 __func__);
1367 }
1368 }
1369
1370 if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
1371 if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) {
1372 printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
1373 __func__);
1374 }
1375 }
1376
1377 if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) {
1378 if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) {
1379 printk(KERN_ERR"%s() Failed to register vbi device\n",
1380 __func__);
1381 }
1382 }
1383
1384 if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) {
1385 if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) {
1386 printk(KERN_ERR"%s() Failed to register vbi device\n",
1387 __func__);
1388 }
1389 }
1390 saa7164_api_set_debug(dev, fw_debug);
1391
1392 if (fw_debug) {
1393 dev->kthread = kthread_run(saa7164_thread_function, dev,
1394 "saa7164 debug");
1395 if (IS_ERR(dev->kthread)) {
1396 dev->kthread = NULL;
1397 printk(KERN_ERR "%s() Failed to create debug kernel thread\n",
1398 __func__);
1399 }
1400 }
1401
1402 } /* != BOARD_UNKNOWN */
1403 else
1404 printk(KERN_ERR "%s() Unsupported board detected, registering without firmware\n",
1405 __func__);
1406
1407 dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
1408 dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
1409
1410 fail_fw:
1411 return 0;
1412
1413 fail_irq:
1414 saa7164_dev_unregister(dev);
1415 fail_free:
1416 v4l2_device_unregister(&dev->v4l2_dev);
1417 kfree(dev);
1418 return err;
1419 }
1420
1421 static void saa7164_shutdown(struct saa7164_dev *dev)
1422 {
1423 dprintk(1, "%s()\n", __func__);
1424 }
1425
1426 static void saa7164_finidev(struct pci_dev *pci_dev)
1427 {
1428 struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
1429
1430 if (dev->board != SAA7164_BOARD_UNKNOWN) {
1431 if (fw_debug && dev->kthread) {
1432 kthread_stop(dev->kthread);
1433 dev->kthread = NULL;
1434 }
1435 if (dev->firmwareloaded)
1436 saa7164_api_set_debug(dev, 0x00);
1437 }
1438
1439 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1440 &dev->ports[SAA7164_PORT_ENC1].irq_interval);
1441 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1442 &dev->ports[SAA7164_PORT_ENC1].svc_interval);
1443 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1444 &dev->ports[SAA7164_PORT_ENC1].irq_svc_interval);
1445 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1446 &dev->ports[SAA7164_PORT_ENC1].read_interval);
1447 saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
1448 &dev->ports[SAA7164_PORT_ENC1].poll_interval);
1449 saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1],
1450 &dev->ports[SAA7164_PORT_VBI1].read_interval);
1451 saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2],
1452 &dev->ports[SAA7164_PORT_VBI2].poll_interval);
1453
1454 saa7164_shutdown(dev);
1455
1456 if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
1457 saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]);
1458
1459 if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
1460 saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]);
1461
1462 if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
1463 saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]);
1464
1465 if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
1466 saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]);
1467
1468 if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI)
1469 saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]);
1470
1471 if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI)
1472 saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]);
1473
1474 saa7164_i2c_unregister(&dev->i2c_bus[0]);
1475 saa7164_i2c_unregister(&dev->i2c_bus[1]);
1476 saa7164_i2c_unregister(&dev->i2c_bus[2]);
1477
1478 /* unregister stuff */
1479 free_irq(pci_dev->irq, dev);
1480
1481 if (dev->msi) {
1482 pci_disable_msi(pci_dev);
1483 dev->msi = false;
1484 }
1485
1486 pci_disable_device(pci_dev);
1487
1488 mutex_lock(&devlist);
1489 list_del(&dev->devlist);
1490 mutex_unlock(&devlist);
1491
1492 saa7164_dev_unregister(dev);
1493 v4l2_device_unregister(&dev->v4l2_dev);
1494 kfree(dev);
1495 }
1496
1497 static struct pci_device_id saa7164_pci_tbl[] = {
1498 {
1499 /* SAA7164 */
1500 .vendor = 0x1131,
1501 .device = 0x7164,
1502 .subvendor = PCI_ANY_ID,
1503 .subdevice = PCI_ANY_ID,
1504 }, {
1505 /* --- end of list --- */
1506 }
1507 };
1508 MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
1509
1510 static struct pci_driver saa7164_pci_driver = {
1511 .name = "saa7164",
1512 .id_table = saa7164_pci_tbl,
1513 .probe = saa7164_initdev,
1514 .remove = saa7164_finidev,
1515 /* TODO */
1516 .suspend = NULL,
1517 .resume = NULL,
1518 };
1519
1520 static int __init saa7164_init(void)
1521 {
1522 printk(KERN_INFO "saa7164 driver loaded\n");
1523
1524 #ifdef CONFIG_PROC_FS
1525 saa7164_proc_create();
1526 #endif
1527 return pci_register_driver(&saa7164_pci_driver);
1528 }
1529
1530 static void __exit saa7164_fini(void)
1531 {
1532 #ifdef CONFIG_PROC_FS
1533 remove_proc_entry("saa7164", NULL);
1534 #endif
1535 pci_unregister_driver(&saa7164_pci_driver);
1536 }
1537
1538 module_init(saa7164_init);
1539 module_exit(saa7164_fini);
1540
Linux with added FPC-III support