sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / media / platform / exynos-gsc / gsc-regs.h
blob4678f9a6a4fd0e6f6d2c9cb7bb57e69698295956
1 /*
2 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
5 * Register definition file for Samsung G-Scaler driver
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #ifndef REGS_GSC_H_
13 #define REGS_GSC_H_
15 /* G-Scaler enable */
16 #define GSC_ENABLE 0x00
17 #define GSC_ENABLE_OP_STATUS (1 << 2)
18 #define GSC_ENABLE_SFR_UPDATE (1 << 1)
19 #define GSC_ENABLE_ON (1 << 0)
21 /* G-Scaler S/W reset */
22 #define GSC_SW_RESET 0x04
23 #define GSC_SW_RESET_SRESET (1 << 0)
25 /* G-Scaler IRQ */
26 #define GSC_IRQ 0x08
27 #define GSC_IRQ_STATUS_OR_IRQ (1 << 17)
28 #define GSC_IRQ_STATUS_FRM_DONE_IRQ (1 << 16)
29 #define GSC_IRQ_FRMDONE_MASK (1 << 1)
30 #define GSC_IRQ_ENABLE (1 << 0)
32 /* G-Scaler input control */
33 #define GSC_IN_CON 0x10
34 #define GSC_IN_ROT_MASK (7 << 16)
35 #define GSC_IN_ROT_270 (7 << 16)
36 #define GSC_IN_ROT_90_YFLIP (6 << 16)
37 #define GSC_IN_ROT_90_XFLIP (5 << 16)
38 #define GSC_IN_ROT_90 (4 << 16)
39 #define GSC_IN_ROT_180 (3 << 16)
40 #define GSC_IN_ROT_YFLIP (2 << 16)
41 #define GSC_IN_ROT_XFLIP (1 << 16)
42 #define GSC_IN_RGB_TYPE_MASK (3 << 14)
43 #define GSC_IN_RGB_HD_NARROW (3 << 14)
44 #define GSC_IN_RGB_HD_WIDE (2 << 14)
45 #define GSC_IN_RGB_SD_NARROW (1 << 14)
46 #define GSC_IN_RGB_SD_WIDE (0 << 14)
47 #define GSC_IN_YUV422_1P_ORDER_MASK (1 << 13)
48 #define GSC_IN_YUV422_1P_ORDER_LSB_Y (0 << 13)
49 #define GSC_IN_YUV422_1P_OEDER_LSB_C (1 << 13)
50 #define GSC_IN_CHROMA_ORDER_MASK (1 << 12)
51 #define GSC_IN_CHROMA_ORDER_CBCR (0 << 12)
52 #define GSC_IN_CHROMA_ORDER_CRCB (1 << 12)
53 #define GSC_IN_FORMAT_MASK (7 << 8)
54 #define GSC_IN_XRGB8888 (0 << 8)
55 #define GSC_IN_RGB565 (1 << 8)
56 #define GSC_IN_YUV420_2P (2 << 8)
57 #define GSC_IN_YUV420_3P (3 << 8)
58 #define GSC_IN_YUV422_1P (4 << 8)
59 #define GSC_IN_YUV422_2P (5 << 8)
60 #define GSC_IN_YUV422_3P (6 << 8)
61 #define GSC_IN_TILE_TYPE_MASK (1 << 4)
62 #define GSC_IN_TILE_C_16x8 (0 << 4)
63 #define GSC_IN_TILE_MODE (1 << 3)
64 #define GSC_IN_LOCAL_SEL_MASK (3 << 1)
65 #define GSC_IN_PATH_MASK (1 << 0)
66 #define GSC_IN_PATH_MEMORY (0 << 0)
68 /* G-Scaler source image size */
69 #define GSC_SRCIMG_SIZE 0x14
70 #define GSC_SRCIMG_HEIGHT(x) ((x) << 16)
71 #define GSC_SRCIMG_WIDTH(x) ((x) << 0)
73 /* G-Scaler source image offset */
74 #define GSC_SRCIMG_OFFSET 0x18
75 #define GSC_SRCIMG_OFFSET_Y(x) ((x) << 16)
76 #define GSC_SRCIMG_OFFSET_X(x) ((x) << 0)
78 /* G-Scaler cropped source image size */
79 #define GSC_CROPPED_SIZE 0x1c
80 #define GSC_CROPPED_HEIGHT(x) ((x) << 16)
81 #define GSC_CROPPED_WIDTH(x) ((x) << 0)
83 /* G-Scaler output control */
84 #define GSC_OUT_CON 0x20
85 #define GSC_OUT_GLOBAL_ALPHA_MASK (0xff << 24)
86 #define GSC_OUT_GLOBAL_ALPHA(x) ((x) << 24)
87 #define GSC_OUT_RGB_TYPE_MASK (3 << 10)
88 #define GSC_OUT_RGB_HD_WIDE (3 << 10)
89 #define GSC_OUT_RGB_HD_NARROW (2 << 10)
90 #define GSC_OUT_RGB_SD_WIDE (1 << 10)
91 #define GSC_OUT_RGB_SD_NARROW (0 << 10)
92 #define GSC_OUT_YUV422_1P_ORDER_MASK (1 << 9)
93 #define GSC_OUT_YUV422_1P_ORDER_LSB_Y (0 << 9)
94 #define GSC_OUT_YUV422_1P_OEDER_LSB_C (1 << 9)
95 #define GSC_OUT_CHROMA_ORDER_MASK (1 << 8)
96 #define GSC_OUT_CHROMA_ORDER_CBCR (0 << 8)
97 #define GSC_OUT_CHROMA_ORDER_CRCB (1 << 8)
98 #define GSC_OUT_FORMAT_MASK (7 << 4)
99 #define GSC_OUT_XRGB8888 (0 << 4)
100 #define GSC_OUT_RGB565 (1 << 4)
101 #define GSC_OUT_YUV420_2P (2 << 4)
102 #define GSC_OUT_YUV420_3P (3 << 4)
103 #define GSC_OUT_YUV422_1P (4 << 4)
104 #define GSC_OUT_YUV422_2P (5 << 4)
105 #define GSC_OUT_YUV444 (7 << 4)
106 #define GSC_OUT_TILE_TYPE_MASK (1 << 2)
107 #define GSC_OUT_TILE_C_16x8 (0 << 2)
108 #define GSC_OUT_TILE_MODE (1 << 1)
109 #define GSC_OUT_PATH_MASK (1 << 0)
110 #define GSC_OUT_PATH_LOCAL (1 << 0)
111 #define GSC_OUT_PATH_MEMORY (0 << 0)
113 /* G-Scaler scaled destination image size */
114 #define GSC_SCALED_SIZE 0x24
115 #define GSC_SCALED_HEIGHT(x) ((x) << 16)
116 #define GSC_SCALED_WIDTH(x) ((x) << 0)
118 /* G-Scaler pre scale ratio */
119 #define GSC_PRE_SCALE_RATIO 0x28
120 #define GSC_PRESC_SHFACTOR(x) ((x) << 28)
121 #define GSC_PRESC_V_RATIO(x) ((x) << 16)
122 #define GSC_PRESC_H_RATIO(x) ((x) << 0)
124 /* G-Scaler main scale horizontal ratio */
125 #define GSC_MAIN_H_RATIO 0x2c
126 #define GSC_MAIN_H_RATIO_VALUE(x) ((x) << 0)
128 /* G-Scaler main scale vertical ratio */
129 #define GSC_MAIN_V_RATIO 0x30
130 #define GSC_MAIN_V_RATIO_VALUE(x) ((x) << 0)
132 /* G-Scaler destination image size */
133 #define GSC_DSTIMG_SIZE 0x40
134 #define GSC_DSTIMG_HEIGHT(x) ((x) << 16)
135 #define GSC_DSTIMG_WIDTH(x) ((x) << 0)
137 /* G-Scaler destination image offset */
138 #define GSC_DSTIMG_OFFSET 0x44
139 #define GSC_DSTIMG_OFFSET_Y(x) ((x) << 16)
140 #define GSC_DSTIMG_OFFSET_X(x) ((x) << 0)
142 /* G-Scaler input y address mask */
143 #define GSC_IN_BASE_ADDR_Y_MASK 0x4c
144 /* G-Scaler input y base address */
145 #define GSC_IN_BASE_ADDR_Y(n) (0x50 + (n) * 0x4)
147 /* G-Scaler input cb address mask */
148 #define GSC_IN_BASE_ADDR_CB_MASK 0x7c
149 /* G-Scaler input cb base address */
150 #define GSC_IN_BASE_ADDR_CB(n) (0x80 + (n) * 0x4)
152 /* G-Scaler input cr address mask */
153 #define GSC_IN_BASE_ADDR_CR_MASK 0xac
154 /* G-Scaler input cr base address */
155 #define GSC_IN_BASE_ADDR_CR(n) (0xb0 + (n) * 0x4)
157 /* G-Scaler output y address mask */
158 #define GSC_OUT_BASE_ADDR_Y_MASK 0x10c
159 /* G-Scaler output y base address */
160 #define GSC_OUT_BASE_ADDR_Y(n) (0x110 + (n) * 0x4)
162 /* G-Scaler output cb address mask */
163 #define GSC_OUT_BASE_ADDR_CB_MASK 0x15c
164 /* G-Scaler output cb base address */
165 #define GSC_OUT_BASE_ADDR_CB(n) (0x160 + (n) * 0x4)
167 /* G-Scaler output cr address mask */
168 #define GSC_OUT_BASE_ADDR_CR_MASK 0x1ac
169 /* G-Scaler output cr base address */
170 #define GSC_OUT_BASE_ADDR_CR(n) (0x1b0 + (n) * 0x4)
172 #endif /* REGS_GSC_H_ */