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sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / media / platform / omap3isp / isp.c
blob084ecf4aa9a4a455c468d336b7d3f4c1b3990416
1 /*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 */
44
45 #include <asm/cacheflush.h>
46
47 #include <linux/clk.h>
48 #include <linux/clkdev.h>
49 #include <linux/delay.h>
50 #include <linux/device.h>
51 #include <linux/dma-mapping.h>
52 #include <linux/i2c.h>
53 #include <linux/interrupt.h>
54 #include <linux/mfd/syscon.h>
55 #include <linux/module.h>
56 #include <linux/omap-iommu.h>
57 #include <linux/platform_device.h>
58 #include <linux/regulator/consumer.h>
59 #include <linux/slab.h>
60 #include <linux/sched.h>
61 #include <linux/vmalloc.h>
62
63 #include <asm/dma-iommu.h>
64
65 #include <media/v4l2-common.h>
66 #include <media/v4l2-device.h>
67 #include <media/v4l2-mc.h>
68 #include <media/v4l2-of.h>
69
70 #include "isp.h"
71 #include "ispreg.h"
72 #include "ispccdc.h"
73 #include "isppreview.h"
74 #include "ispresizer.h"
75 #include "ispcsi2.h"
76 #include "ispccp2.h"
77 #include "isph3a.h"
78 #include "isphist.h"
79
80 static unsigned int autoidle;
81 module_param(autoidle, int, 0444);
82 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
83
84 static void isp_save_ctx(struct isp_device *isp);
85
86 static void isp_restore_ctx(struct isp_device *isp);
87
88 static const struct isp_res_mapping isp_res_maps[] = {
89 {
90 .isp_rev = ISP_REVISION_2_0,
91 .offset = {
92 /* first MMIO area */
93 0x0000, /* base, len 0x0070 */
94 0x0400, /* ccp2, len 0x01f0 */
95 0x0600, /* ccdc, len 0x00a8 */
96 0x0a00, /* hist, len 0x0048 */
97 0x0c00, /* h3a, len 0x0060 */
98 0x0e00, /* preview, len 0x00a0 */
99 0x1000, /* resizer, len 0x00ac */
100 0x1200, /* sbl, len 0x00fc */
101 /* second MMIO area */
102 0x0000, /* csi2a, len 0x0170 */
103 0x0170, /* csiphy2, len 0x000c */
104 },
105 .phy_type = ISP_PHY_TYPE_3430,
106 },
107 {
108 .isp_rev = ISP_REVISION_15_0,
109 .offset = {
110 /* first MMIO area */
111 0x0000, /* base, len 0x0070 */
112 0x0400, /* ccp2, len 0x01f0 */
113 0x0600, /* ccdc, len 0x00a8 */
114 0x0a00, /* hist, len 0x0048 */
115 0x0c00, /* h3a, len 0x0060 */
116 0x0e00, /* preview, len 0x00a0 */
117 0x1000, /* resizer, len 0x00ac */
118 0x1200, /* sbl, len 0x00fc */
119 /* second MMIO area */
120 0x0000, /* csi2a, len 0x0170 (1st area) */
121 0x0170, /* csiphy2, len 0x000c */
122 0x01c0, /* csi2a, len 0x0040 (2nd area) */
123 0x0400, /* csi2c, len 0x0170 (1st area) */
124 0x0570, /* csiphy1, len 0x000c */
125 0x05c0, /* csi2c, len 0x0040 (2nd area) */
126 },
127 .phy_type = ISP_PHY_TYPE_3630,
128 },
129 };
130
131 /* Structure for saving/restoring ISP module registers */
132 static struct isp_reg isp_reg_list[] = {
133 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
134 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
135 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
136 {0, ISP_TOK_TERM, 0}
137 };
138
139 /*
140 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
141 * @isp: OMAP3 ISP device
142 *
143 * In order to force posting of pending writes, we need to write and
144 * readback the same register, in this case the revision register.
145 *
146 * See this link for reference:
147 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
148 */
149 void omap3isp_flush(struct isp_device *isp)
150 {
151 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
152 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
153 }
154
155 /* -----------------------------------------------------------------------------
156 * XCLK
157 */
158
159 #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
160
161 static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
162 {
163 switch (xclk->id) {
164 case ISP_XCLK_A:
165 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
166 ISPTCTRL_CTRL_DIVA_MASK,
167 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
168 break;
169 case ISP_XCLK_B:
170 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
171 ISPTCTRL_CTRL_DIVB_MASK,
172 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
173 break;
174 }
175 }
176
177 static int isp_xclk_prepare(struct clk_hw *hw)
178 {
179 struct isp_xclk *xclk = to_isp_xclk(hw);
180
181 omap3isp_get(xclk->isp);
182
183 return 0;
184 }
185
186 static void isp_xclk_unprepare(struct clk_hw *hw)
187 {
188 struct isp_xclk *xclk = to_isp_xclk(hw);
189
190 omap3isp_put(xclk->isp);
191 }
192
193 static int isp_xclk_enable(struct clk_hw *hw)
194 {
195 struct isp_xclk *xclk = to_isp_xclk(hw);
196 unsigned long flags;
197
198 spin_lock_irqsave(&xclk->lock, flags);
199 isp_xclk_update(xclk, xclk->divider);
200 xclk->enabled = true;
201 spin_unlock_irqrestore(&xclk->lock, flags);
202
203 return 0;
204 }
205
206 static void isp_xclk_disable(struct clk_hw *hw)
207 {
208 struct isp_xclk *xclk = to_isp_xclk(hw);
209 unsigned long flags;
210
211 spin_lock_irqsave(&xclk->lock, flags);
212 isp_xclk_update(xclk, 0);
213 xclk->enabled = false;
214 spin_unlock_irqrestore(&xclk->lock, flags);
215 }
216
217 static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
218 unsigned long parent_rate)
219 {
220 struct isp_xclk *xclk = to_isp_xclk(hw);
221
222 return parent_rate / xclk->divider;
223 }
224
225 static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
226 {
227 u32 divider;
228
229 if (*rate >= parent_rate) {
230 *rate = parent_rate;
231 return ISPTCTRL_CTRL_DIV_BYPASS;
232 }
233
234 if (*rate == 0)
235 *rate = 1;
236
237 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
238 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
239 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
240
241 *rate = parent_rate / divider;
242 return divider;
243 }
244
245 static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
246 unsigned long *parent_rate)
247 {
248 isp_xclk_calc_divider(&rate, *parent_rate);
249 return rate;
250 }
251
252 static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
253 unsigned long parent_rate)
254 {
255 struct isp_xclk *xclk = to_isp_xclk(hw);
256 unsigned long flags;
257 u32 divider;
258
259 divider = isp_xclk_calc_divider(&rate, parent_rate);
260
261 spin_lock_irqsave(&xclk->lock, flags);
262
263 xclk->divider = divider;
264 if (xclk->enabled)
265 isp_xclk_update(xclk, divider);
266
267 spin_unlock_irqrestore(&xclk->lock, flags);
268
269 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
270 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
271 return 0;
272 }
273
274 static const struct clk_ops isp_xclk_ops = {
275 .prepare = isp_xclk_prepare,
276 .unprepare = isp_xclk_unprepare,
277 .enable = isp_xclk_enable,
278 .disable = isp_xclk_disable,
279 .recalc_rate = isp_xclk_recalc_rate,
280 .round_rate = isp_xclk_round_rate,
281 .set_rate = isp_xclk_set_rate,
282 };
283
284 static const char *isp_xclk_parent_name = "cam_mclk";
285
286 static const struct clk_init_data isp_xclk_init_data = {
287 .name = "cam_xclk",
288 .ops = &isp_xclk_ops,
289 .parent_names = &isp_xclk_parent_name,
290 .num_parents = 1,
291 };
292
293 static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
294 {
295 unsigned int idx = clkspec->args[0];
296 struct isp_device *isp = data;
297
298 if (idx >= ARRAY_SIZE(isp->xclks))
299 return ERR_PTR(-ENOENT);
300
301 return isp->xclks[idx].clk;
302 }
303
304 static int isp_xclk_init(struct isp_device *isp)
305 {
306 struct device_node *np = isp->dev->of_node;
307 struct clk_init_data init;
308 unsigned int i;
309
310 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
311 isp->xclks[i].clk = ERR_PTR(-EINVAL);
312
313 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
314 struct isp_xclk *xclk = &isp->xclks[i];
315
316 xclk->isp = isp;
317 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
318 xclk->divider = 1;
319 spin_lock_init(&xclk->lock);
320
321 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
322 init.ops = &isp_xclk_ops;
323 init.parent_names = &isp_xclk_parent_name;
324 init.num_parents = 1;
325
326 xclk->hw.init = &init;
327 /*
328 * The first argument is NULL in order to avoid circular
329 * reference, as this driver takes reference on the
330 * sensor subdevice modules and the sensors would take
331 * reference on this module through clk_get().
332 */
333 xclk->clk = clk_register(NULL, &xclk->hw);
334 if (IS_ERR(xclk->clk))
335 return PTR_ERR(xclk->clk);
336 }
337
338 if (np)
339 of_clk_add_provider(np, isp_xclk_src_get, isp);
340
341 return 0;
342 }
343
344 static void isp_xclk_cleanup(struct isp_device *isp)
345 {
346 struct device_node *np = isp->dev->of_node;
347 unsigned int i;
348
349 if (np)
350 of_clk_del_provider(np);
351
352 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
353 struct isp_xclk *xclk = &isp->xclks[i];
354
355 if (!IS_ERR(xclk->clk))
356 clk_unregister(xclk->clk);
357 }
358 }
359
360 /* -----------------------------------------------------------------------------
361 * Interrupts
362 */
363
364 /*
365 * isp_enable_interrupts - Enable ISP interrupts.
366 * @isp: OMAP3 ISP device
367 */
368 static void isp_enable_interrupts(struct isp_device *isp)
369 {
370 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
371 | IRQ0ENABLE_CSIB_IRQ
372 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
373 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
374 | IRQ0ENABLE_CCDC_VD0_IRQ
375 | IRQ0ENABLE_CCDC_VD1_IRQ
376 | IRQ0ENABLE_HS_VS_IRQ
377 | IRQ0ENABLE_HIST_DONE_IRQ
378 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
379 | IRQ0ENABLE_H3A_AF_DONE_IRQ
380 | IRQ0ENABLE_PRV_DONE_IRQ
381 | IRQ0ENABLE_RSZ_DONE_IRQ;
382
383 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
384 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
385 }
386
387 /*
388 * isp_disable_interrupts - Disable ISP interrupts.
389 * @isp: OMAP3 ISP device
390 */
391 static void isp_disable_interrupts(struct isp_device *isp)
392 {
393 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
394 }
395
396 /*
397 * isp_core_init - ISP core settings
398 * @isp: OMAP3 ISP device
399 * @idle: Consider idle state.
400 *
401 * Set the power settings for the ISP and SBL bus and configure the HS/VS
402 * interrupt source.
403 *
404 * We need to configure the HS/VS interrupt source before interrupts get
405 * enabled, as the sensor might be free-running and the ISP default setting
406 * (HS edge) would put an unnecessary burden on the CPU.
407 */
408 static void isp_core_init(struct isp_device *isp, int idle)
409 {
410 isp_reg_writel(isp,
411 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
412 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
413 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
414 ((isp->revision == ISP_REVISION_15_0) ?
415 ISP_SYSCONFIG_AUTOIDLE : 0),
416 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
417
418 isp_reg_writel(isp,
419 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
420 ISPCTRL_SYNC_DETECT_VSRISE,
421 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
422 }
423
424 /*
425 * Configure the bridge and lane shifter. Valid inputs are
426 *
427 * CCDC_INPUT_PARALLEL: Parallel interface
428 * CCDC_INPUT_CSI2A: CSI2a receiver
429 * CCDC_INPUT_CCP2B: CCP2b receiver
430 * CCDC_INPUT_CSI2C: CSI2c receiver
431 *
432 * The bridge and lane shifter are configured according to the selected input
433 * and the ISP platform data.
434 */
435 void omap3isp_configure_bridge(struct isp_device *isp,
436 enum ccdc_input_entity input,
437 const struct isp_parallel_cfg *parcfg,
438 unsigned int shift, unsigned int bridge)
439 {
440 u32 ispctrl_val;
441
442 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
443 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
444 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
445 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
446 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
447 ispctrl_val |= bridge;
448
449 switch (input) {
450 case CCDC_INPUT_PARALLEL:
451 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
452 ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
453 shift += parcfg->data_lane_shift;
454 break;
455
456 case CCDC_INPUT_CSI2A:
457 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
458 break;
459
460 case CCDC_INPUT_CCP2B:
461 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
462 break;
463
464 case CCDC_INPUT_CSI2C:
465 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
466 break;
467
468 default:
469 return;
470 }
471
472 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
473
474 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
475 }
476
477 void omap3isp_hist_dma_done(struct isp_device *isp)
478 {
479 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
480 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
481 /* Histogram cannot be enabled in this frame anymore */
482 atomic_set(&isp->isp_hist.buf_err, 1);
483 dev_dbg(isp->dev,
484 "hist: Out of synchronization with CCDC. Ignoring next buffer.\n");
485 }
486 }
487
488 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
489 {
490 static const char *name[] = {
491 "CSIA_IRQ",
492 "res1",
493 "res2",
494 "CSIB_LCM_IRQ",
495 "CSIB_IRQ",
496 "res5",
497 "res6",
498 "res7",
499 "CCDC_VD0_IRQ",
500 "CCDC_VD1_IRQ",
501 "CCDC_VD2_IRQ",
502 "CCDC_ERR_IRQ",
503 "H3A_AF_DONE_IRQ",
504 "H3A_AWB_DONE_IRQ",
505 "res14",
506 "res15",
507 "HIST_DONE_IRQ",
508 "CCDC_LSC_DONE",
509 "CCDC_LSC_PREFETCH_COMPLETED",
510 "CCDC_LSC_PREFETCH_ERROR",
511 "PRV_DONE_IRQ",
512 "CBUFF_IRQ",
513 "res22",
514 "res23",
515 "RSZ_DONE_IRQ",
516 "OVF_IRQ",
517 "res26",
518 "res27",
519 "MMU_ERR_IRQ",
520 "OCP_ERR_IRQ",
521 "SEC_ERR_IRQ",
522 "HS_VS_IRQ",
523 };
524 int i;
525
526 dev_dbg(isp->dev, "ISP IRQ: ");
527
528 for (i = 0; i < ARRAY_SIZE(name); i++) {
529 if ((1 << i) & irqstatus)
530 printk(KERN_CONT "%s ", name[i]);
531 }
532 printk(KERN_CONT "\n");
533 }
534
535 static void isp_isr_sbl(struct isp_device *isp)
536 {
537 struct device *dev = isp->dev;
538 struct isp_pipeline *pipe;
539 u32 sbl_pcr;
540
541 /*
542 * Handle shared buffer logic overflows for video buffers.
543 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
544 */
545 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
546 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
547 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
548
549 if (sbl_pcr)
550 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
551
552 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
553 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
554 if (pipe != NULL)
555 pipe->error = true;
556 }
557
558 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
559 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
560 if (pipe != NULL)
561 pipe->error = true;
562 }
563
564 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
565 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
566 if (pipe != NULL)
567 pipe->error = true;
568 }
569
570 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
571 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
572 if (pipe != NULL)
573 pipe->error = true;
574 }
575
576 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
577 | ISPSBL_PCR_RSZ2_WBL_OVF
578 | ISPSBL_PCR_RSZ3_WBL_OVF
579 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
580 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
581 if (pipe != NULL)
582 pipe->error = true;
583 }
584
585 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
586 omap3isp_stat_sbl_overflow(&isp->isp_af);
587
588 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
589 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
590 }
591
592 /*
593 * isp_isr - Interrupt Service Routine for Camera ISP module.
594 * @irq: Not used currently.
595 * @_isp: Pointer to the OMAP3 ISP device
596 *
597 * Handles the corresponding callback if plugged in.
598 */
599 static irqreturn_t isp_isr(int irq, void *_isp)
600 {
601 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
602 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
603 IRQ0STATUS_CCDC_VD0_IRQ |
604 IRQ0STATUS_CCDC_VD1_IRQ |
605 IRQ0STATUS_HS_VS_IRQ;
606 struct isp_device *isp = _isp;
607 u32 irqstatus;
608
609 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
610 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
611
612 isp_isr_sbl(isp);
613
614 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
615 omap3isp_csi2_isr(&isp->isp_csi2a);
616
617 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
618 omap3isp_ccp2_isr(&isp->isp_ccp2);
619
620 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
621 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
622 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
623 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
624 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
625 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
626 omap3isp_stat_isr_frame_sync(&isp->isp_af);
627 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
628 }
629
630 if (irqstatus & ccdc_events)
631 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
632
633 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
634 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
635 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
636 omap3isp_preview_isr(&isp->isp_prev);
637 }
638
639 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
640 omap3isp_resizer_isr(&isp->isp_res);
641
642 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
643 omap3isp_stat_isr(&isp->isp_aewb);
644
645 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
646 omap3isp_stat_isr(&isp->isp_af);
647
648 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
649 omap3isp_stat_isr(&isp->isp_hist);
650
651 omap3isp_flush(isp);
652
653 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
654 isp_isr_dbg(isp, irqstatus);
655 #endif
656
657 return IRQ_HANDLED;
658 }
659
660 static const struct media_device_ops isp_media_ops = {
661 .link_notify = v4l2_pipeline_link_notify,
662 };
663
664 /* -----------------------------------------------------------------------------
665 * Pipeline stream management
666 */
667
668 /*
669 * isp_pipeline_enable - Enable streaming on a pipeline
670 * @pipe: ISP pipeline
671 * @mode: Stream mode (single shot or continuous)
672 *
673 * Walk the entities chain starting at the pipeline output video node and start
674 * all modules in the chain in the given mode.
675 *
676 * Return 0 if successful, or the return value of the failed video::s_stream
677 * operation otherwise.
678 */
679 static int isp_pipeline_enable(struct isp_pipeline *pipe,
680 enum isp_pipeline_stream_state mode)
681 {
682 struct isp_device *isp = pipe->output->isp;
683 struct media_entity *entity;
684 struct media_pad *pad;
685 struct v4l2_subdev *subdev;
686 unsigned long flags;
687 int ret;
688
689 /* Refuse to start streaming if an entity included in the pipeline has
690 * crashed. This check must be performed before the loop below to avoid
691 * starting entities if the pipeline won't start anyway (those entities
692 * would then likely fail to stop, making the problem worse).
693 */
694 if (media_entity_enum_intersects(&pipe->ent_enum, &isp->crashed))
695 return -EIO;
696
697 spin_lock_irqsave(&pipe->lock, flags);
698 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
699 spin_unlock_irqrestore(&pipe->lock, flags);
700
701 pipe->do_propagation = false;
702
703 entity = &pipe->output->video.entity;
704 while (1) {
705 pad = &entity->pads[0];
706 if (!(pad->flags & MEDIA_PAD_FL_SINK))
707 break;
708
709 pad = media_entity_remote_pad(pad);
710 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
711 break;
712
713 entity = pad->entity;
714 subdev = media_entity_to_v4l2_subdev(entity);
715
716 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
717 if (ret < 0 && ret != -ENOIOCTLCMD)
718 return ret;
719
720 if (subdev == &isp->isp_ccdc.subdev) {
721 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
722 s_stream, mode);
723 v4l2_subdev_call(&isp->isp_af.subdev, video,
724 s_stream, mode);
725 v4l2_subdev_call(&isp->isp_hist.subdev, video,
726 s_stream, mode);
727 pipe->do_propagation = true;
728 }
729 }
730
731 return 0;
732 }
733
734 static int isp_pipeline_wait_resizer(struct isp_device *isp)
735 {
736 return omap3isp_resizer_busy(&isp->isp_res);
737 }
738
739 static int isp_pipeline_wait_preview(struct isp_device *isp)
740 {
741 return omap3isp_preview_busy(&isp->isp_prev);
742 }
743
744 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
745 {
746 return omap3isp_stat_busy(&isp->isp_af)
747 || omap3isp_stat_busy(&isp->isp_aewb)
748 || omap3isp_stat_busy(&isp->isp_hist)
749 || omap3isp_ccdc_busy(&isp->isp_ccdc);
750 }
751
752 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
753
754 static int isp_pipeline_wait(struct isp_device *isp,
755 int(*busy)(struct isp_device *isp))
756 {
757 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
758
759 while (!time_after(jiffies, timeout)) {
760 if (!busy(isp))
761 return 0;
762 }
763
764 return 1;
765 }
766
767 /*
768 * isp_pipeline_disable - Disable streaming on a pipeline
769 * @pipe: ISP pipeline
770 *
771 * Walk the entities chain starting at the pipeline output video node and stop
772 * all modules in the chain. Wait synchronously for the modules to be stopped if
773 * necessary.
774 *
775 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
776 * can't be stopped (in which case a software reset of the ISP is probably
777 * necessary).
778 */
779 static int isp_pipeline_disable(struct isp_pipeline *pipe)
780 {
781 struct isp_device *isp = pipe->output->isp;
782 struct media_entity *entity;
783 struct media_pad *pad;
784 struct v4l2_subdev *subdev;
785 int failure = 0;
786 int ret;
787
788 /*
789 * We need to stop all the modules after CCDC first or they'll
790 * never stop since they may not get a full frame from CCDC.
791 */
792 entity = &pipe->output->video.entity;
793 while (1) {
794 pad = &entity->pads[0];
795 if (!(pad->flags & MEDIA_PAD_FL_SINK))
796 break;
797
798 pad = media_entity_remote_pad(pad);
799 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
800 break;
801
802 entity = pad->entity;
803 subdev = media_entity_to_v4l2_subdev(entity);
804
805 if (subdev == &isp->isp_ccdc.subdev) {
806 v4l2_subdev_call(&isp->isp_aewb.subdev,
807 video, s_stream, 0);
808 v4l2_subdev_call(&isp->isp_af.subdev,
809 video, s_stream, 0);
810 v4l2_subdev_call(&isp->isp_hist.subdev,
811 video, s_stream, 0);
812 }
813
814 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
815
816 if (subdev == &isp->isp_res.subdev)
817 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
818 else if (subdev == &isp->isp_prev.subdev)
819 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
820 else if (subdev == &isp->isp_ccdc.subdev)
821 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
822
823 /* Handle stop failures. An entity that fails to stop can
824 * usually just be restarted. Flag the stop failure nonetheless
825 * to trigger an ISP reset the next time the device is released,
826 * just in case.
827 *
828 * The preview engine is a special case. A failure to stop can
829 * mean a hardware crash. When that happens the preview engine
830 * won't respond to read/write operations on the L4 bus anymore,
831 * resulting in a bus fault and a kernel oops next time it gets
832 * accessed. Mark it as crashed to prevent pipelines including
833 * it from being started.
834 */
835 if (ret) {
836 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
837 isp->stop_failure = true;
838 if (subdev == &isp->isp_prev.subdev)
839 media_entity_enum_set(&isp->crashed,
840 &subdev->entity);
841 failure = -ETIMEDOUT;
842 }
843 }
844
845 return failure;
846 }
847
848 /*
849 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
850 * @pipe: ISP pipeline
851 * @state: Stream state (stopped, single shot or continuous)
852 *
853 * Set the pipeline to the given stream state. Pipelines can be started in
854 * single-shot or continuous mode.
855 *
856 * Return 0 if successful, or the return value of the failed video::s_stream
857 * operation otherwise. The pipeline state is not updated when the operation
858 * fails, except when stopping the pipeline.
859 */
860 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
861 enum isp_pipeline_stream_state state)
862 {
863 int ret;
864
865 if (state == ISP_PIPELINE_STREAM_STOPPED)
866 ret = isp_pipeline_disable(pipe);
867 else
868 ret = isp_pipeline_enable(pipe, state);
869
870 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
871 pipe->stream_state = state;
872
873 return ret;
874 }
875
876 /*
877 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
878 * @pipe: ISP pipeline
879 *
880 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
881 * erroneous and makes sure no new buffer can be queued. This function is called
882 * when a fatal error that prevents any further operation on the pipeline
883 * occurs.
884 */
885 void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
886 {
887 if (pipe->input)
888 omap3isp_video_cancel_stream(pipe->input);
889 if (pipe->output)
890 omap3isp_video_cancel_stream(pipe->output);
891 }
892
893 /*
894 * isp_pipeline_resume - Resume streaming on a pipeline
895 * @pipe: ISP pipeline
896 *
897 * Resume video output and input and re-enable pipeline.
898 */
899 static void isp_pipeline_resume(struct isp_pipeline *pipe)
900 {
901 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
902
903 omap3isp_video_resume(pipe->output, !singleshot);
904 if (singleshot)
905 omap3isp_video_resume(pipe->input, 0);
906 isp_pipeline_enable(pipe, pipe->stream_state);
907 }
908
909 /*
910 * isp_pipeline_suspend - Suspend streaming on a pipeline
911 * @pipe: ISP pipeline
912 *
913 * Suspend pipeline.
914 */
915 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
916 {
917 isp_pipeline_disable(pipe);
918 }
919
920 /*
921 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
922 * video node
923 * @me: ISP module's media entity
924 *
925 * Returns 1 if the entity has an enabled link to the output video node or 0
926 * otherwise. It's true only while pipeline can have no more than one output
927 * node.
928 */
929 static int isp_pipeline_is_last(struct media_entity *me)
930 {
931 struct isp_pipeline *pipe;
932 struct media_pad *pad;
933
934 if (!me->pipe)
935 return 0;
936 pipe = to_isp_pipeline(me);
937 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
938 return 0;
939 pad = media_entity_remote_pad(&pipe->output->pad);
940 return pad->entity == me;
941 }
942
943 /*
944 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
945 * @me: ISP module's media entity
946 *
947 * Suspend the whole pipeline if module's entity has an enabled link to the
948 * output video node. It works only while pipeline can have no more than one
949 * output node.
950 */
951 static void isp_suspend_module_pipeline(struct media_entity *me)
952 {
953 if (isp_pipeline_is_last(me))
954 isp_pipeline_suspend(to_isp_pipeline(me));
955 }
956
957 /*
958 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
959 * @me: ISP module's media entity
960 *
961 * Resume the whole pipeline if module's entity has an enabled link to the
962 * output video node. It works only while pipeline can have no more than one
963 * output node.
964 */
965 static void isp_resume_module_pipeline(struct media_entity *me)
966 {
967 if (isp_pipeline_is_last(me))
968 isp_pipeline_resume(to_isp_pipeline(me));
969 }
970
971 /*
972 * isp_suspend_modules - Suspend ISP submodules.
973 * @isp: OMAP3 ISP device
974 *
975 * Returns 0 if suspend left in idle state all the submodules properly,
976 * or returns 1 if a general Reset is required to suspend the submodules.
977 */
978 static int isp_suspend_modules(struct isp_device *isp)
979 {
980 unsigned long timeout;
981
982 omap3isp_stat_suspend(&isp->isp_aewb);
983 omap3isp_stat_suspend(&isp->isp_af);
984 omap3isp_stat_suspend(&isp->isp_hist);
985 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
986 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
987 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
988 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
989 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
990
991 timeout = jiffies + ISP_STOP_TIMEOUT;
992 while (omap3isp_stat_busy(&isp->isp_af)
993 || omap3isp_stat_busy(&isp->isp_aewb)
994 || omap3isp_stat_busy(&isp->isp_hist)
995 || omap3isp_preview_busy(&isp->isp_prev)
996 || omap3isp_resizer_busy(&isp->isp_res)
997 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
998 if (time_after(jiffies, timeout)) {
999 dev_info(isp->dev, "can't stop modules.\n");
1000 return 1;
1001 }
1002 msleep(1);
1003 }
1004
1005 return 0;
1006 }
1007
1008 /*
1009 * isp_resume_modules - Resume ISP submodules.
1010 * @isp: OMAP3 ISP device
1011 */
1012 static void isp_resume_modules(struct isp_device *isp)
1013 {
1014 omap3isp_stat_resume(&isp->isp_aewb);
1015 omap3isp_stat_resume(&isp->isp_af);
1016 omap3isp_stat_resume(&isp->isp_hist);
1017 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1018 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1019 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1020 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1021 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1022 }
1023
1024 /*
1025 * isp_reset - Reset ISP with a timeout wait for idle.
1026 * @isp: OMAP3 ISP device
1027 */
1028 static int isp_reset(struct isp_device *isp)
1029 {
1030 unsigned long timeout = 0;
1031
1032 isp_reg_writel(isp,
1033 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1034 | ISP_SYSCONFIG_SOFTRESET,
1035 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1036 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1037 ISP_SYSSTATUS) & 0x1)) {
1038 if (timeout++ > 10000) {
1039 dev_alert(isp->dev, "cannot reset ISP\n");
1040 return -ETIMEDOUT;
1041 }
1042 udelay(1);
1043 }
1044
1045 isp->stop_failure = false;
1046 media_entity_enum_zero(&isp->crashed);
1047 return 0;
1048 }
1049
1050 /*
1051 * isp_save_context - Saves the values of the ISP module registers.
1052 * @isp: OMAP3 ISP device
1053 * @reg_list: Structure containing pairs of register address and value to
1054 * modify on OMAP.
1055 */
1056 static void
1057 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1058 {
1059 struct isp_reg *next = reg_list;
1060
1061 for (; next->reg != ISP_TOK_TERM; next++)
1062 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1063 }
1064
1065 /*
1066 * isp_restore_context - Restores the values of the ISP module registers.
1067 * @isp: OMAP3 ISP device
1068 * @reg_list: Structure containing pairs of register address and value to
1069 * modify on OMAP.
1070 */
1071 static void
1072 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1073 {
1074 struct isp_reg *next = reg_list;
1075
1076 for (; next->reg != ISP_TOK_TERM; next++)
1077 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1078 }
1079
1080 /*
1081 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1082 * @isp: OMAP3 ISP device
1083 *
1084 * Routine for saving the context of each module in the ISP.
1085 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1086 */
1087 static void isp_save_ctx(struct isp_device *isp)
1088 {
1089 isp_save_context(isp, isp_reg_list);
1090 omap_iommu_save_ctx(isp->dev);
1091 }
1092
1093 /*
1094 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1095 * @isp: OMAP3 ISP device
1096 *
1097 * Routine for restoring the context of each module in the ISP.
1098 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1099 */
1100 static void isp_restore_ctx(struct isp_device *isp)
1101 {
1102 isp_restore_context(isp, isp_reg_list);
1103 omap_iommu_restore_ctx(isp->dev);
1104 omap3isp_ccdc_restore_context(isp);
1105 omap3isp_preview_restore_context(isp);
1106 }
1107
1108 /* -----------------------------------------------------------------------------
1109 * SBL resources management
1110 */
1111 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1112 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1113 OMAP3_ISP_SBL_PREVIEW_READ | \
1114 OMAP3_ISP_SBL_RESIZER_READ)
1115 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1116 OMAP3_ISP_SBL_CSI2A_WRITE | \
1117 OMAP3_ISP_SBL_CSI2C_WRITE | \
1118 OMAP3_ISP_SBL_CCDC_WRITE | \
1119 OMAP3_ISP_SBL_PREVIEW_WRITE)
1120
1121 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1122 {
1123 u32 sbl = 0;
1124
1125 isp->sbl_resources |= res;
1126
1127 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1128 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1129
1130 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1131 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1132
1133 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1134 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1135
1136 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1137 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1138
1139 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1140 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1141
1142 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1143 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1144
1145 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1146 }
1147
1148 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1149 {
1150 u32 sbl = 0;
1151
1152 isp->sbl_resources &= ~res;
1153
1154 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1155 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1156
1157 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1158 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1159
1160 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1161 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1162
1163 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1164 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1165
1166 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1167 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1168
1169 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1170 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1171
1172 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1173 }
1174
1175 /*
1176 * isp_module_sync_idle - Helper to sync module with its idle state
1177 * @me: ISP submodule's media entity
1178 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1179 * @stopping: flag which tells module wants to stop
1180 *
1181 * This function checks if ISP submodule needs to wait for next interrupt. If
1182 * yes, makes the caller to sleep while waiting for such event.
1183 */
1184 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1185 atomic_t *stopping)
1186 {
1187 struct isp_pipeline *pipe = to_isp_pipeline(me);
1188
1189 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1190 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1191 !isp_pipeline_ready(pipe)))
1192 return 0;
1193
1194 /*
1195 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1196 * scenario. We'll call it here to avoid race conditions.
1197 */
1198 atomic_set(stopping, 1);
1199 smp_mb();
1200
1201 /*
1202 * If module is the last one, it's writing to memory. In this case,
1203 * it's necessary to check if the module is already paused due to
1204 * DMA queue underrun or if it has to wait for next interrupt to be
1205 * idle.
1206 * If it isn't the last one, the function won't sleep but *stopping
1207 * will still be set to warn next submodule caller's interrupt the
1208 * module wants to be idle.
1209 */
1210 if (isp_pipeline_is_last(me)) {
1211 struct isp_video *video = pipe->output;
1212 unsigned long flags;
1213 spin_lock_irqsave(&video->irqlock, flags);
1214 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1215 spin_unlock_irqrestore(&video->irqlock, flags);
1216 atomic_set(stopping, 0);
1217 smp_mb();
1218 return 0;
1219 }
1220 spin_unlock_irqrestore(&video->irqlock, flags);
1221 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1222 msecs_to_jiffies(1000))) {
1223 atomic_set(stopping, 0);
1224 smp_mb();
1225 return -ETIMEDOUT;
1226 }
1227 }
1228
1229 return 0;
1230 }
1231
1232 /*
1233 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
1234 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1235 * @stopping: flag which tells module wants to stop
1236 *
1237 * This function checks if ISP submodule was stopping. In case of yes, it
1238 * notices the caller by setting stopping to 0 and waking up the wait queue.
1239 * Returns 1 if it was stopping or 0 otherwise.
1240 */
1241 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1242 atomic_t *stopping)
1243 {
1244 if (atomic_cmpxchg(stopping, 1, 0)) {
1245 wake_up(wait);
1246 return 1;
1247 }
1248
1249 return 0;
1250 }
1251
1252 /* --------------------------------------------------------------------------
1253 * Clock management
1254 */
1255
1256 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1257 ISPCTRL_HIST_CLK_EN | \
1258 ISPCTRL_RSZ_CLK_EN | \
1259 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1260 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1261
1262 static void __isp_subclk_update(struct isp_device *isp)
1263 {
1264 u32 clk = 0;
1265
1266 /* AEWB and AF share the same clock. */
1267 if (isp->subclk_resources &
1268 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1269 clk |= ISPCTRL_H3A_CLK_EN;
1270
1271 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1272 clk |= ISPCTRL_HIST_CLK_EN;
1273
1274 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1275 clk |= ISPCTRL_RSZ_CLK_EN;
1276
1277 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1278 * RAM as well.
1279 */
1280 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1281 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1282
1283 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1284 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1285
1286 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1287 ISPCTRL_CLKS_MASK, clk);
1288 }
1289
1290 void omap3isp_subclk_enable(struct isp_device *isp,
1291 enum isp_subclk_resource res)
1292 {
1293 isp->subclk_resources |= res;
1294
1295 __isp_subclk_update(isp);
1296 }
1297
1298 void omap3isp_subclk_disable(struct isp_device *isp,
1299 enum isp_subclk_resource res)
1300 {
1301 isp->subclk_resources &= ~res;
1302
1303 __isp_subclk_update(isp);
1304 }
1305
1306 /*
1307 * isp_enable_clocks - Enable ISP clocks
1308 * @isp: OMAP3 ISP device
1309 *
1310 * Return 0 if successful, or clk_prepare_enable return value if any of them
1311 * fails.
1312 */
1313 static int isp_enable_clocks(struct isp_device *isp)
1314 {
1315 int r;
1316 unsigned long rate;
1317
1318 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1319 if (r) {
1320 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1321 goto out_clk_enable_ick;
1322 }
1323 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
1324 if (r) {
1325 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
1326 goto out_clk_enable_mclk;
1327 }
1328 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1329 if (r) {
1330 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
1331 goto out_clk_enable_mclk;
1332 }
1333 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1334 if (rate != CM_CAM_MCLK_HZ)
1335 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1336 " expected : %d\n"
1337 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1338 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1339 if (r) {
1340 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
1341 goto out_clk_enable_csi2_fclk;
1342 }
1343 return 0;
1344
1345 out_clk_enable_csi2_fclk:
1346 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1347 out_clk_enable_mclk:
1348 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1349 out_clk_enable_ick:
1350 return r;
1351 }
1352
1353 /*
1354 * isp_disable_clocks - Disable ISP clocks
1355 * @isp: OMAP3 ISP device
1356 */
1357 static void isp_disable_clocks(struct isp_device *isp)
1358 {
1359 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1360 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1361 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
1362 }
1363
1364 static const char *isp_clocks[] = {
1365 "cam_ick",
1366 "cam_mclk",
1367 "csi2_96m_fck",
1368 "l3_ick",
1369 };
1370
1371 static int isp_get_clocks(struct isp_device *isp)
1372 {
1373 struct clk *clk;
1374 unsigned int i;
1375
1376 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1377 clk = devm_clk_get(isp->dev, isp_clocks[i]);
1378 if (IS_ERR(clk)) {
1379 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1380 return PTR_ERR(clk);
1381 }
1382
1383 isp->clock[i] = clk;
1384 }
1385
1386 return 0;
1387 }
1388
1389 /*
1390 * omap3isp_get - Acquire the ISP resource.
1391 *
1392 * Initializes the clocks for the first acquire.
1393 *
1394 * Increment the reference count on the ISP. If the first reference is taken,
1395 * enable clocks and power-up all submodules.
1396 *
1397 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1398 */
1399 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1400 {
1401 struct isp_device *__isp = isp;
1402
1403 if (isp == NULL)
1404 return NULL;
1405
1406 mutex_lock(&isp->isp_mutex);
1407 if (isp->ref_count > 0)
1408 goto out;
1409
1410 if (isp_enable_clocks(isp) < 0) {
1411 __isp = NULL;
1412 goto out;
1413 }
1414
1415 /* We don't want to restore context before saving it! */
1416 if (isp->has_context)
1417 isp_restore_ctx(isp);
1418
1419 if (irq)
1420 isp_enable_interrupts(isp);
1421
1422 out:
1423 if (__isp != NULL)
1424 isp->ref_count++;
1425 mutex_unlock(&isp->isp_mutex);
1426
1427 return __isp;
1428 }
1429
1430 struct isp_device *omap3isp_get(struct isp_device *isp)
1431 {
1432 return __omap3isp_get(isp, true);
1433 }
1434
1435 /*
1436 * omap3isp_put - Release the ISP
1437 *
1438 * Decrement the reference count on the ISP. If the last reference is released,
1439 * power-down all submodules, disable clocks and free temporary buffers.
1440 */
1441 static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
1442 {
1443 if (isp == NULL)
1444 return;
1445
1446 mutex_lock(&isp->isp_mutex);
1447 BUG_ON(isp->ref_count == 0);
1448 if (--isp->ref_count == 0) {
1449 isp_disable_interrupts(isp);
1450 if (save_ctx) {
1451 isp_save_ctx(isp);
1452 isp->has_context = 1;
1453 }
1454 /* Reset the ISP if an entity has failed to stop. This is the
1455 * only way to recover from such conditions.
1456 */
1457 if (!media_entity_enum_empty(&isp->crashed) ||
1458 isp->stop_failure)
1459 isp_reset(isp);
1460 isp_disable_clocks(isp);
1461 }
1462 mutex_unlock(&isp->isp_mutex);
1463 }
1464
1465 void omap3isp_put(struct isp_device *isp)
1466 {
1467 __omap3isp_put(isp, true);
1468 }
1469
1470 /* --------------------------------------------------------------------------
1471 * Platform device driver
1472 */
1473
1474 /*
1475 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1476 * @isp: OMAP3 ISP device
1477 */
1478 #define ISP_PRINT_REGISTER(isp, name)\
1479 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1480 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1481 #define SBL_PRINT_REGISTER(isp, name)\
1482 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1483 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1484
1485 void omap3isp_print_status(struct isp_device *isp)
1486 {
1487 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1488
1489 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1490 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1491 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1492 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1493 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1494 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1495 ISP_PRINT_REGISTER(isp, CTRL);
1496 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1497 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1498 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1499 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1500 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1501 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1502 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1503 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1504
1505 SBL_PRINT_REGISTER(isp, PCR);
1506 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1507
1508 dev_dbg(isp->dev, "--------------------------------------------\n");
1509 }
1510
1511 #ifdef CONFIG_PM
1512
1513 /*
1514 * Power management support.
1515 *
1516 * As the ISP can't properly handle an input video stream interruption on a non
1517 * frame boundary, the ISP pipelines need to be stopped before sensors get
1518 * suspended. However, as suspending the sensors can require a running clock,
1519 * which can be provided by the ISP, the ISP can't be completely suspended
1520 * before the sensor.
1521 *
1522 * To solve this problem power management support is split into prepare/complete
1523 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1524 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1525 * resume(), and the the pipelines are restarted in complete().
1526 *
1527 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
1528 * yet.
1529 */
1530 static int isp_pm_prepare(struct device *dev)
1531 {
1532 struct isp_device *isp = dev_get_drvdata(dev);
1533 int reset;
1534
1535 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1536
1537 if (isp->ref_count == 0)
1538 return 0;
1539
1540 reset = isp_suspend_modules(isp);
1541 isp_disable_interrupts(isp);
1542 isp_save_ctx(isp);
1543 if (reset)
1544 isp_reset(isp);
1545
1546 return 0;
1547 }
1548
1549 static int isp_pm_suspend(struct device *dev)
1550 {
1551 struct isp_device *isp = dev_get_drvdata(dev);
1552
1553 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1554
1555 if (isp->ref_count)
1556 isp_disable_clocks(isp);
1557
1558 return 0;
1559 }
1560
1561 static int isp_pm_resume(struct device *dev)
1562 {
1563 struct isp_device *isp = dev_get_drvdata(dev);
1564
1565 if (isp->ref_count == 0)
1566 return 0;
1567
1568 return isp_enable_clocks(isp);
1569 }
1570
1571 static void isp_pm_complete(struct device *dev)
1572 {
1573 struct isp_device *isp = dev_get_drvdata(dev);
1574
1575 if (isp->ref_count == 0)
1576 return;
1577
1578 isp_restore_ctx(isp);
1579 isp_enable_interrupts(isp);
1580 isp_resume_modules(isp);
1581 }
1582
1583 #else
1584
1585 #define isp_pm_prepare NULL
1586 #define isp_pm_suspend NULL
1587 #define isp_pm_resume NULL
1588 #define isp_pm_complete NULL
1589
1590 #endif /* CONFIG_PM */
1591
1592 static void isp_unregister_entities(struct isp_device *isp)
1593 {
1594 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1595 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1596 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1597 omap3isp_preview_unregister_entities(&isp->isp_prev);
1598 omap3isp_resizer_unregister_entities(&isp->isp_res);
1599 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1600 omap3isp_stat_unregister_entities(&isp->isp_af);
1601 omap3isp_stat_unregister_entities(&isp->isp_hist);
1602
1603 v4l2_device_unregister(&isp->v4l2_dev);
1604 media_device_unregister(&isp->media_dev);
1605 media_device_cleanup(&isp->media_dev);
1606 }
1607
1608 static int isp_link_entity(
1609 struct isp_device *isp, struct media_entity *entity,
1610 enum isp_interface_type interface)
1611 {
1612 struct media_entity *input;
1613 unsigned int flags;
1614 unsigned int pad;
1615 unsigned int i;
1616
1617 /* Connect the sensor to the correct interface module.
1618 * Parallel sensors are connected directly to the CCDC, while
1619 * serial sensors are connected to the CSI2a, CCP2b or CSI2c
1620 * receiver through CSIPHY1 or CSIPHY2.
1621 */
1622 switch (interface) {
1623 case ISP_INTERFACE_PARALLEL:
1624 input = &isp->isp_ccdc.subdev.entity;
1625 pad = CCDC_PAD_SINK;
1626 flags = 0;
1627 break;
1628
1629 case ISP_INTERFACE_CSI2A_PHY2:
1630 input = &isp->isp_csi2a.subdev.entity;
1631 pad = CSI2_PAD_SINK;
1632 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1633 break;
1634
1635 case ISP_INTERFACE_CCP2B_PHY1:
1636 case ISP_INTERFACE_CCP2B_PHY2:
1637 input = &isp->isp_ccp2.subdev.entity;
1638 pad = CCP2_PAD_SINK;
1639 flags = 0;
1640 break;
1641
1642 case ISP_INTERFACE_CSI2C_PHY1:
1643 input = &isp->isp_csi2c.subdev.entity;
1644 pad = CSI2_PAD_SINK;
1645 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1646 break;
1647
1648 default:
1649 dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
1650 interface);
1651 return -EINVAL;
1652 }
1653
1654 /*
1655 * Not all interfaces are available on all revisions of the
1656 * ISP. The sub-devices of those interfaces aren't initialised
1657 * in such a case. Check this by ensuring the num_pads is
1658 * non-zero.
1659 */
1660 if (!input->num_pads) {
1661 dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
1662 interface);
1663 return -EINVAL;
1664 }
1665
1666 for (i = 0; i < entity->num_pads; i++) {
1667 if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
1668 break;
1669 }
1670 if (i == entity->num_pads) {
1671 dev_err(isp->dev, "%s: no source pad in external entity\n",
1672 __func__);
1673 return -EINVAL;
1674 }
1675
1676 return media_create_pad_link(entity, i, input, pad, flags);
1677 }
1678
1679 static int isp_register_entities(struct isp_device *isp)
1680 {
1681 int ret;
1682
1683 isp->media_dev.dev = isp->dev;
1684 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1685 sizeof(isp->media_dev.model));
1686 isp->media_dev.hw_revision = isp->revision;
1687 isp->media_dev.ops = &isp_media_ops;
1688 media_device_init(&isp->media_dev);
1689
1690 isp->v4l2_dev.mdev = &isp->media_dev;
1691 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1692 if (ret < 0) {
1693 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1694 __func__, ret);
1695 goto done;
1696 }
1697
1698 /* Register internal entities */
1699 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1700 if (ret < 0)
1701 goto done;
1702
1703 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1704 if (ret < 0)
1705 goto done;
1706
1707 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1708 if (ret < 0)
1709 goto done;
1710
1711 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1712 &isp->v4l2_dev);
1713 if (ret < 0)
1714 goto done;
1715
1716 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1717 if (ret < 0)
1718 goto done;
1719
1720 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1721 if (ret < 0)
1722 goto done;
1723
1724 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1725 if (ret < 0)
1726 goto done;
1727
1728 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1729 if (ret < 0)
1730 goto done;
1731
1732 done:
1733 if (ret < 0)
1734 isp_unregister_entities(isp);
1735
1736 return ret;
1737 }
1738
1739 /*
1740 * isp_create_links() - Create links for internal and external ISP entities
1741 * @isp : Pointer to ISP device
1742 *
1743 * This function creates all links between ISP internal and external entities.
1744 *
1745 * Return: A negative error code on failure or zero on success. Possible error
1746 * codes are those returned by media_create_pad_link().
1747 */
1748 static int isp_create_links(struct isp_device *isp)
1749 {
1750 int ret;
1751
1752 /* Create links between entities and video nodes. */
1753 ret = media_create_pad_link(
1754 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1755 &isp->isp_csi2a.video_out.video.entity, 0, 0);
1756 if (ret < 0)
1757 return ret;
1758
1759 ret = media_create_pad_link(
1760 &isp->isp_ccp2.video_in.video.entity, 0,
1761 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SINK, 0);
1762 if (ret < 0)
1763 return ret;
1764
1765 ret = media_create_pad_link(
1766 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1767 &isp->isp_ccdc.video_out.video.entity, 0, 0);
1768 if (ret < 0)
1769 return ret;
1770
1771 ret = media_create_pad_link(
1772 &isp->isp_prev.video_in.video.entity, 0,
1773 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1774 if (ret < 0)
1775 return ret;
1776
1777 ret = media_create_pad_link(
1778 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1779 &isp->isp_prev.video_out.video.entity, 0, 0);
1780 if (ret < 0)
1781 return ret;
1782
1783 ret = media_create_pad_link(
1784 &isp->isp_res.video_in.video.entity, 0,
1785 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1786 if (ret < 0)
1787 return ret;
1788
1789 ret = media_create_pad_link(
1790 &isp->isp_res.subdev.entity, RESZ_PAD_SOURCE,
1791 &isp->isp_res.video_out.video.entity, 0, 0);
1792
1793 if (ret < 0)
1794 return ret;
1795
1796 /* Create links between entities. */
1797 ret = media_create_pad_link(
1798 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1799 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1800 if (ret < 0)
1801 return ret;
1802
1803 ret = media_create_pad_link(
1804 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1805 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1806 if (ret < 0)
1807 return ret;
1808
1809 ret = media_create_pad_link(
1810 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1811 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1812 if (ret < 0)
1813 return ret;
1814
1815 ret = media_create_pad_link(
1816 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1817 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1818 if (ret < 0)
1819 return ret;
1820
1821 ret = media_create_pad_link(
1822 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1823 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1824 if (ret < 0)
1825 return ret;
1826
1827 ret = media_create_pad_link(
1828 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1829 &isp->isp_aewb.subdev.entity, 0,
1830 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1831 if (ret < 0)
1832 return ret;
1833
1834 ret = media_create_pad_link(
1835 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1836 &isp->isp_af.subdev.entity, 0,
1837 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1838 if (ret < 0)
1839 return ret;
1840
1841 ret = media_create_pad_link(
1842 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1843 &isp->isp_hist.subdev.entity, 0,
1844 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1845 if (ret < 0)
1846 return ret;
1847
1848 return 0;
1849 }
1850
1851 static void isp_cleanup_modules(struct isp_device *isp)
1852 {
1853 omap3isp_h3a_aewb_cleanup(isp);
1854 omap3isp_h3a_af_cleanup(isp);
1855 omap3isp_hist_cleanup(isp);
1856 omap3isp_resizer_cleanup(isp);
1857 omap3isp_preview_cleanup(isp);
1858 omap3isp_ccdc_cleanup(isp);
1859 omap3isp_ccp2_cleanup(isp);
1860 omap3isp_csi2_cleanup(isp);
1861 }
1862
1863 static int isp_initialize_modules(struct isp_device *isp)
1864 {
1865 int ret;
1866
1867 ret = omap3isp_csiphy_init(isp);
1868 if (ret < 0) {
1869 dev_err(isp->dev, "CSI PHY initialization failed\n");
1870 goto error_csiphy;
1871 }
1872
1873 ret = omap3isp_csi2_init(isp);
1874 if (ret < 0) {
1875 dev_err(isp->dev, "CSI2 initialization failed\n");
1876 goto error_csi2;
1877 }
1878
1879 ret = omap3isp_ccp2_init(isp);
1880 if (ret < 0) {
1881 dev_err(isp->dev, "CCP2 initialization failed\n");
1882 goto error_ccp2;
1883 }
1884
1885 ret = omap3isp_ccdc_init(isp);
1886 if (ret < 0) {
1887 dev_err(isp->dev, "CCDC initialization failed\n");
1888 goto error_ccdc;
1889 }
1890
1891 ret = omap3isp_preview_init(isp);
1892 if (ret < 0) {
1893 dev_err(isp->dev, "Preview initialization failed\n");
1894 goto error_preview;
1895 }
1896
1897 ret = omap3isp_resizer_init(isp);
1898 if (ret < 0) {
1899 dev_err(isp->dev, "Resizer initialization failed\n");
1900 goto error_resizer;
1901 }
1902
1903 ret = omap3isp_hist_init(isp);
1904 if (ret < 0) {
1905 dev_err(isp->dev, "Histogram initialization failed\n");
1906 goto error_hist;
1907 }
1908
1909 ret = omap3isp_h3a_aewb_init(isp);
1910 if (ret < 0) {
1911 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1912 goto error_h3a_aewb;
1913 }
1914
1915 ret = omap3isp_h3a_af_init(isp);
1916 if (ret < 0) {
1917 dev_err(isp->dev, "H3A AF initialization failed\n");
1918 goto error_h3a_af;
1919 }
1920
1921 return 0;
1922
1923 error_h3a_af:
1924 omap3isp_h3a_aewb_cleanup(isp);
1925 error_h3a_aewb:
1926 omap3isp_hist_cleanup(isp);
1927 error_hist:
1928 omap3isp_resizer_cleanup(isp);
1929 error_resizer:
1930 omap3isp_preview_cleanup(isp);
1931 error_preview:
1932 omap3isp_ccdc_cleanup(isp);
1933 error_ccdc:
1934 omap3isp_ccp2_cleanup(isp);
1935 error_ccp2:
1936 omap3isp_csi2_cleanup(isp);
1937 error_csi2:
1938 error_csiphy:
1939 return ret;
1940 }
1941
1942 static void isp_detach_iommu(struct isp_device *isp)
1943 {
1944 arm_iommu_release_mapping(isp->mapping);
1945 isp->mapping = NULL;
1946 iommu_group_remove_device(isp->dev);
1947 }
1948
1949 static int isp_attach_iommu(struct isp_device *isp)
1950 {
1951 struct dma_iommu_mapping *mapping;
1952 struct iommu_group *group;
1953 int ret;
1954
1955 /* Create a device group and add the device to it. */
1956 group = iommu_group_alloc();
1957 if (IS_ERR(group)) {
1958 dev_err(isp->dev, "failed to allocate IOMMU group\n");
1959 return PTR_ERR(group);
1960 }
1961
1962 ret = iommu_group_add_device(group, isp->dev);
1963 iommu_group_put(group);
1964
1965 if (ret < 0) {
1966 dev_err(isp->dev, "failed to add device to IPMMU group\n");
1967 return ret;
1968 }
1969
1970 /*
1971 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
1972 * VAs. This will allocate a corresponding IOMMU domain.
1973 */
1974 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
1975 if (IS_ERR(mapping)) {
1976 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
1977 ret = PTR_ERR(mapping);
1978 goto error;
1979 }
1980
1981 isp->mapping = mapping;
1982
1983 /* Attach the ARM VA mapping to the device. */
1984 ret = arm_iommu_attach_device(isp->dev, mapping);
1985 if (ret < 0) {
1986 dev_err(isp->dev, "failed to attach device to VA mapping\n");
1987 goto error;
1988 }
1989
1990 return 0;
1991
1992 error:
1993 isp_detach_iommu(isp);
1994 return ret;
1995 }
1996
1997 /*
1998 * isp_remove - Remove ISP platform device
1999 * @pdev: Pointer to ISP platform device
2000 *
2001 * Always returns 0.
2002 */
2003 static int isp_remove(struct platform_device *pdev)
2004 {
2005 struct isp_device *isp = platform_get_drvdata(pdev);
2006
2007 v4l2_async_notifier_unregister(&isp->notifier);
2008 isp_unregister_entities(isp);
2009 isp_cleanup_modules(isp);
2010 isp_xclk_cleanup(isp);
2011
2012 __omap3isp_get(isp, false);
2013 isp_detach_iommu(isp);
2014 __omap3isp_put(isp, false);
2015
2016 media_entity_enum_cleanup(&isp->crashed);
2017
2018 return 0;
2019 }
2020
2021 enum isp_of_phy {
2022 ISP_OF_PHY_PARALLEL = 0,
2023 ISP_OF_PHY_CSIPHY1,
2024 ISP_OF_PHY_CSIPHY2,
2025 };
2026
2027 static int isp_of_parse_node(struct device *dev, struct device_node *node,
2028 struct isp_async_subdev *isd)
2029 {
2030 struct isp_bus_cfg *buscfg = &isd->bus;
2031 struct v4l2_of_endpoint vep;
2032 unsigned int i;
2033 int ret;
2034
2035 ret = v4l2_of_parse_endpoint(node, &vep);
2036 if (ret)
2037 return ret;
2038
2039 dev_dbg(dev, "parsing endpoint %s, interface %u\n", node->full_name,
2040 vep.base.port);
2041
2042 switch (vep.base.port) {
2043 case ISP_OF_PHY_PARALLEL:
2044 buscfg->interface = ISP_INTERFACE_PARALLEL;
2045 buscfg->bus.parallel.data_lane_shift =
2046 vep.bus.parallel.data_shift;
2047 buscfg->bus.parallel.clk_pol =
2048 !!(vep.bus.parallel.flags
2049 & V4L2_MBUS_PCLK_SAMPLE_FALLING);
2050 buscfg->bus.parallel.hs_pol =
2051 !!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
2052 buscfg->bus.parallel.vs_pol =
2053 !!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
2054 buscfg->bus.parallel.fld_pol =
2055 !!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
2056 buscfg->bus.parallel.data_pol =
2057 !!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
2058 break;
2059
2060 case ISP_OF_PHY_CSIPHY1:
2061 case ISP_OF_PHY_CSIPHY2:
2062 /* FIXME: always assume CSI-2 for now. */
2063 switch (vep.base.port) {
2064 case ISP_OF_PHY_CSIPHY1:
2065 buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
2066 break;
2067 case ISP_OF_PHY_CSIPHY2:
2068 buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
2069 break;
2070 }
2071 buscfg->bus.csi2.lanecfg.clk.pos = vep.bus.mipi_csi2.clock_lane;
2072 buscfg->bus.csi2.lanecfg.clk.pol =
2073 vep.bus.mipi_csi2.lane_polarities[0];
2074 dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2075 buscfg->bus.csi2.lanecfg.clk.pol,
2076 buscfg->bus.csi2.lanecfg.clk.pos);
2077
2078 for (i = 0; i < ISP_CSIPHY2_NUM_DATA_LANES; i++) {
2079 buscfg->bus.csi2.lanecfg.data[i].pos =
2080 vep.bus.mipi_csi2.data_lanes[i];
2081 buscfg->bus.csi2.lanecfg.data[i].pol =
2082 vep.bus.mipi_csi2.lane_polarities[i + 1];
2083 dev_dbg(dev, "data lane %u polarity %u, pos %u\n", i,
2084 buscfg->bus.csi2.lanecfg.data[i].pol,
2085 buscfg->bus.csi2.lanecfg.data[i].pos);
2086 }
2087
2088 /*
2089 * FIXME: now we assume the CRC is always there.
2090 * Implement a way to obtain this information from the
2091 * sensor. Frame descriptors, perhaps?
2092 */
2093 buscfg->bus.csi2.crc = 1;
2094 break;
2095
2096 default:
2097 dev_warn(dev, "%s: invalid interface %u\n", node->full_name,
2098 vep.base.port);
2099 break;
2100 }
2101
2102 return 0;
2103 }
2104
2105 static int isp_of_parse_nodes(struct device *dev,
2106 struct v4l2_async_notifier *notifier)
2107 {
2108 struct device_node *node = NULL;
2109
2110 notifier->subdevs = devm_kcalloc(
2111 dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL);
2112 if (!notifier->subdevs)
2113 return -ENOMEM;
2114
2115 while (notifier->num_subdevs < ISP_MAX_SUBDEVS &&
2116 (node = of_graph_get_next_endpoint(dev->of_node, node))) {
2117 struct isp_async_subdev *isd;
2118
2119 isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL);
2120 if (!isd)
2121 goto error;
2122
2123 notifier->subdevs[notifier->num_subdevs] = &isd->asd;
2124
2125 if (isp_of_parse_node(dev, node, isd))
2126 goto error;
2127
2128 isd->asd.match.of.node = of_graph_get_remote_port_parent(node);
2129 if (!isd->asd.match.of.node) {
2130 dev_warn(dev, "bad remote port parent\n");
2131 goto error;
2132 }
2133
2134 isd->asd.match_type = V4L2_ASYNC_MATCH_OF;
2135 notifier->num_subdevs++;
2136 }
2137
2138 return notifier->num_subdevs;
2139
2140 error:
2141 of_node_put(node);
2142 return -EINVAL;
2143 }
2144
2145 static int isp_subdev_notifier_bound(struct v4l2_async_notifier *async,
2146 struct v4l2_subdev *subdev,
2147 struct v4l2_async_subdev *asd)
2148 {
2149 struct isp_async_subdev *isd =
2150 container_of(asd, struct isp_async_subdev, asd);
2151
2152 isd->sd = subdev;
2153 isd->sd->host_priv = &isd->bus;
2154
2155 return 0;
2156 }
2157
2158 static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
2159 {
2160 struct isp_device *isp = container_of(async, struct isp_device,
2161 notifier);
2162 struct v4l2_device *v4l2_dev = &isp->v4l2_dev;
2163 struct v4l2_subdev *sd;
2164 struct isp_bus_cfg *bus;
2165 int ret;
2166
2167 ret = media_entity_enum_init(&isp->crashed, &isp->media_dev);
2168 if (ret)
2169 return ret;
2170
2171 list_for_each_entry(sd, &v4l2_dev->subdevs, list) {
2172 /* Only try to link entities whose interface was set on bound */
2173 if (sd->host_priv) {
2174 bus = (struct isp_bus_cfg *)sd->host_priv;
2175 ret = isp_link_entity(isp, &sd->entity, bus->interface);
2176 if (ret < 0)
2177 return ret;
2178 }
2179 }
2180
2181 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
2182 if (ret < 0)
2183 return ret;
2184
2185 return media_device_register(&isp->media_dev);
2186 }
2187
2188 /*
2189 * isp_probe - Probe ISP platform device
2190 * @pdev: Pointer to ISP platform device
2191 *
2192 * Returns 0 if successful,
2193 * -ENOMEM if no memory available,
2194 * -ENODEV if no platform device resources found
2195 * or no space for remapping registers,
2196 * -EINVAL if couldn't install ISR,
2197 * or clk_get return error value.
2198 */
2199 static int isp_probe(struct platform_device *pdev)
2200 {
2201 struct isp_device *isp;
2202 struct resource *mem;
2203 int ret;
2204 int i, m;
2205
2206 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
2207 if (!isp) {
2208 dev_err(&pdev->dev, "could not allocate memory\n");
2209 return -ENOMEM;
2210 }
2211
2212 ret = of_property_read_u32(pdev->dev.of_node, "ti,phy-type",
2213 &isp->phy_type);
2214 if (ret)
2215 return ret;
2216
2217 isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
2218 "syscon");
2219 if (IS_ERR(isp->syscon))
2220 return PTR_ERR(isp->syscon);
2221
2222 ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
2223 &isp->syscon_offset);
2224 if (ret)
2225 return ret;
2226
2227 ret = isp_of_parse_nodes(&pdev->dev, &isp->notifier);
2228 if (ret < 0)
2229 return ret;
2230
2231 isp->autoidle = autoidle;
2232
2233 mutex_init(&isp->isp_mutex);
2234 spin_lock_init(&isp->stat_lock);
2235
2236 isp->dev = &pdev->dev;
2237 isp->ref_count = 0;
2238
2239 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2240 if (ret)
2241 goto error;
2242
2243 platform_set_drvdata(pdev, isp);
2244
2245 /* Regulators */
2246 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
2247 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
2248
2249 /* Clocks
2250 *
2251 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2252 * manually to read the revision before calling __omap3isp_get().
2253 *
2254 * Start by mapping the ISP MMIO area, which is in two pieces.
2255 * The ISP IOMMU is in between. Map both now, and fill in the
2256 * ISP revision specific portions a little later in the
2257 * function.
2258 */
2259 for (i = 0; i < 2; i++) {
2260 unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
2261
2262 mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
2263 isp->mmio_base[map_idx] =
2264 devm_ioremap_resource(isp->dev, mem);
2265 if (IS_ERR(isp->mmio_base[map_idx]))
2266 return PTR_ERR(isp->mmio_base[map_idx]);
2267 }
2268
2269 ret = isp_get_clocks(isp);
2270 if (ret < 0)
2271 goto error;
2272
2273 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2274 if (ret < 0)
2275 goto error;
2276
2277 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2278 dev_info(isp->dev, "Revision %d.%d found\n",
2279 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2280
2281 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2282
2283 if (__omap3isp_get(isp, false) == NULL) {
2284 ret = -ENODEV;
2285 goto error;
2286 }
2287
2288 ret = isp_reset(isp);
2289 if (ret < 0)
2290 goto error_isp;
2291
2292 ret = isp_xclk_init(isp);
2293 if (ret < 0)
2294 goto error_isp;
2295
2296 /* Memory resources */
2297 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2298 if (isp->revision == isp_res_maps[m].isp_rev)
2299 break;
2300
2301 if (m == ARRAY_SIZE(isp_res_maps)) {
2302 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2303 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2304 ret = -ENODEV;
2305 goto error_isp;
2306 }
2307
2308 for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
2309 isp->mmio_base[i] =
2310 isp->mmio_base[0] + isp_res_maps[m].offset[i];
2311
2312 for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
2313 isp->mmio_base[i] =
2314 isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
2315 + isp_res_maps[m].offset[i];
2316
2317 isp->mmio_hist_base_phys =
2318 mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
2319
2320 /* IOMMU */
2321 ret = isp_attach_iommu(isp);
2322 if (ret < 0) {
2323 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
2324 goto error_isp;
2325 }
2326
2327 /* Interrupt */
2328 ret = platform_get_irq(pdev, 0);
2329 if (ret <= 0) {
2330 dev_err(isp->dev, "No IRQ resource\n");
2331 ret = -ENODEV;
2332 goto error_iommu;
2333 }
2334 isp->irq_num = ret;
2335
2336 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2337 "OMAP3 ISP", isp)) {
2338 dev_err(isp->dev, "Unable to request IRQ\n");
2339 ret = -EINVAL;
2340 goto error_iommu;
2341 }
2342
2343 /* Entities */
2344 ret = isp_initialize_modules(isp);
2345 if (ret < 0)
2346 goto error_iommu;
2347
2348 ret = isp_register_entities(isp);
2349 if (ret < 0)
2350 goto error_modules;
2351
2352 ret = isp_create_links(isp);
2353 if (ret < 0)
2354 goto error_register_entities;
2355
2356 isp->notifier.bound = isp_subdev_notifier_bound;
2357 isp->notifier.complete = isp_subdev_notifier_complete;
2358
2359 ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
2360 if (ret)
2361 goto error_register_entities;
2362
2363 isp_core_init(isp, 1);
2364 omap3isp_put(isp);
2365
2366 return 0;
2367
2368 error_register_entities:
2369 isp_unregister_entities(isp);
2370 error_modules:
2371 isp_cleanup_modules(isp);
2372 error_iommu:
2373 isp_detach_iommu(isp);
2374 error_isp:
2375 isp_xclk_cleanup(isp);
2376 __omap3isp_put(isp, false);
2377 error:
2378 mutex_destroy(&isp->isp_mutex);
2379
2380 return ret;
2381 }
2382
2383 static const struct dev_pm_ops omap3isp_pm_ops = {
2384 .prepare = isp_pm_prepare,
2385 .suspend = isp_pm_suspend,
2386 .resume = isp_pm_resume,
2387 .complete = isp_pm_complete,
2388 };
2389
2390 static struct platform_device_id omap3isp_id_table[] = {
2391 { "omap3isp", 0 },
2392 { },
2393 };
2394 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2395
2396 static const struct of_device_id omap3isp_of_table[] = {
2397 { .compatible = "ti,omap3-isp" },
2398 { },
2399 };
2400 MODULE_DEVICE_TABLE(of, omap3isp_of_table);
2401
2402 static struct platform_driver omap3isp_driver = {
2403 .probe = isp_probe,
2404 .remove = isp_remove,
2405 .id_table = omap3isp_id_table,
2406 .driver = {
2407 .name = "omap3isp",
2408 .pm = &omap3isp_pm_ops,
2409 .of_match_table = omap3isp_of_table,
2410 },
2411 };
2412
2413 module_platform_driver(omap3isp_driver);
2414
2415 MODULE_AUTHOR("Nokia Corporation");
2416 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2417 MODULE_LICENSE("GPL");
2418 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Linux with added FPC-III support