sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / media / rc / img-ir / img-ir-hw.h
blob91a29773166148d657fd295bff7dcfa48f0b505e
1 /*
2 * ImgTec IR Hardware Decoder found in PowerDown Controller.
4 * Copyright 2010-2014 Imagination Technologies Ltd.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 #ifndef _IMG_IR_HW_H_
13 #define _IMG_IR_HW_H_
15 #include <linux/kernel.h>
16 #include <media/rc-core.h>
18 /* constants */
20 #define IMG_IR_CODETYPE_PULSELEN 0x0 /* Sony */
21 #define IMG_IR_CODETYPE_PULSEDIST 0x1 /* NEC, Toshiba, Micom, Sharp */
22 #define IMG_IR_CODETYPE_BIPHASE 0x2 /* RC-5/6 */
23 #define IMG_IR_CODETYPE_2BITPULSEPOS 0x3 /* RC-MM */
26 /* Timing information */
28 /**
29 * struct img_ir_control - Decoder control settings
30 * @decoden: Primary decoder enable
31 * @code_type: Decode type (see IMG_IR_CODETYPE_*)
32 * @hdrtog: Detect header toggle symbol after leader symbol
33 * @ldrdec: Don't discard leader if maximum width reached
34 * @decodinpol: Decoder input polarity (1=active high)
35 * @bitorien: Bit orientation (1=MSB first)
36 * @d1validsel: Decoder 2 takes over if it detects valid data
37 * @bitinv: Bit inversion switch (1=don't invert)
38 * @decodend2: Secondary decoder enable (no leader symbol)
39 * @bitoriend2: Bit orientation (1=MSB first)
40 * @bitinvd2: Secondary decoder bit inversion switch (1=don't invert)
42 struct img_ir_control {
43 unsigned decoden:1;
44 unsigned code_type:2;
45 unsigned hdrtog:1;
46 unsigned ldrdec:1;
47 unsigned decodinpol:1;
48 unsigned bitorien:1;
49 unsigned d1validsel:1;
50 unsigned bitinv:1;
51 unsigned decodend2:1;
52 unsigned bitoriend2:1;
53 unsigned bitinvd2:1;
56 /**
57 * struct img_ir_timing_range - range of timing values
58 * @min: Minimum timing value
59 * @max: Maximum timing value (if < @min, this will be set to @min during
60 * preprocessing step, so it is normally not explicitly initialised
61 * and is taken care of by the tolerance)
63 struct img_ir_timing_range {
64 u16 min;
65 u16 max;
68 /**
69 * struct img_ir_symbol_timing - timing data for a symbol
70 * @pulse: Timing range for the length of the pulse in this symbol
71 * @space: Timing range for the length of the space in this symbol
73 struct img_ir_symbol_timing {
74 struct img_ir_timing_range pulse;
75 struct img_ir_timing_range space;
78 /**
79 * struct img_ir_free_timing - timing data for free time symbol
80 * @minlen: Minimum number of bits of data
81 * @maxlen: Maximum number of bits of data
82 * @ft_min: Minimum free time after message
84 struct img_ir_free_timing {
85 /* measured in bits */
86 u8 minlen;
87 u8 maxlen;
88 u16 ft_min;
91 /**
92 * struct img_ir_timings - Timing values.
93 * @ldr: Leader symbol timing data
94 * @s00: Zero symbol timing data for primary decoder
95 * @s01: One symbol timing data for primary decoder
96 * @s10: Zero symbol timing data for secondary (no leader symbol) decoder
97 * @s11: One symbol timing data for secondary (no leader symbol) decoder
98 * @ft: Free time symbol timing data
100 struct img_ir_timings {
101 struct img_ir_symbol_timing ldr, s00, s01, s10, s11;
102 struct img_ir_free_timing ft;
106 * struct img_ir_filter - Filter IR events.
107 * @data: Data to match.
108 * @mask: Mask of bits to compare.
109 * @minlen: Additional minimum number of bits.
110 * @maxlen: Additional maximum number of bits.
112 struct img_ir_filter {
113 u64 data;
114 u64 mask;
115 u8 minlen;
116 u8 maxlen;
120 * struct img_ir_timing_regvals - Calculated timing register values.
121 * @ldr: Leader symbol timing register value
122 * @s00: Zero symbol timing register value for primary decoder
123 * @s01: One symbol timing register value for primary decoder
124 * @s10: Zero symbol timing register value for secondary decoder
125 * @s11: One symbol timing register value for secondary decoder
126 * @ft: Free time symbol timing register value
128 struct img_ir_timing_regvals {
129 u32 ldr, s00, s01, s10, s11, ft;
132 #define IMG_IR_SCANCODE 0 /* new scancode */
133 #define IMG_IR_REPEATCODE 1 /* repeat the previous code */
136 * struct img_ir_scancode_req - Scancode request data.
137 * @protocol: Protocol code of received message (defaults to
138 * RC_TYPE_UNKNOWN).
139 * @scancode: Scan code of received message (must be written by
140 * handler if IMG_IR_SCANCODE is returned).
141 * @toggle: Toggle bit (defaults to 0).
143 struct img_ir_scancode_req {
144 enum rc_type protocol;
145 u32 scancode;
146 u8 toggle;
150 * struct img_ir_decoder - Decoder settings for an IR protocol.
151 * @type: Protocol types bitmap.
152 * @tolerance: Timing tolerance as a percentage (default 10%).
153 * @unit: Unit of timings in nanoseconds (default 1 us).
154 * @timings: Primary timings
155 * @rtimings: Additional override timings while waiting for repeats.
156 * @repeat: Maximum repeat interval (always in milliseconds).
157 * @control: Control flags.
159 * @scancode: Pointer to function to convert the IR data into a scancode (it
160 * must be safe to execute in interrupt context).
161 * Returns IMG_IR_SCANCODE to emit new scancode.
162 * Returns IMG_IR_REPEATCODE to repeat previous code.
163 * Returns -errno (e.g. -EINVAL) on error.
164 * @filter: Pointer to function to convert scancode filter to raw hardware
165 * filter. The minlen and maxlen fields will have been initialised
166 * to the maximum range.
168 struct img_ir_decoder {
169 /* core description */
170 u64 type;
171 unsigned int tolerance;
172 unsigned int unit;
173 struct img_ir_timings timings;
174 struct img_ir_timings rtimings;
175 unsigned int repeat;
176 struct img_ir_control control;
178 /* scancode logic */
179 int (*scancode)(int len, u64 raw, u64 enabled_protocols,
180 struct img_ir_scancode_req *request);
181 int (*filter)(const struct rc_scancode_filter *in,
182 struct img_ir_filter *out, u64 protocols);
185 extern struct img_ir_decoder img_ir_nec;
186 extern struct img_ir_decoder img_ir_jvc;
187 extern struct img_ir_decoder img_ir_sony;
188 extern struct img_ir_decoder img_ir_sharp;
189 extern struct img_ir_decoder img_ir_sanyo;
190 extern struct img_ir_decoder img_ir_rc5;
191 extern struct img_ir_decoder img_ir_rc6;
194 * struct img_ir_reg_timings - Reg values for decoder timings at clock rate.
195 * @ctrl: Processed control register value.
196 * @timings: Processed primary timings.
197 * @rtimings: Processed repeat timings.
199 struct img_ir_reg_timings {
200 u32 ctrl;
201 struct img_ir_timing_regvals timings;
202 struct img_ir_timing_regvals rtimings;
205 struct img_ir_priv;
207 #ifdef CONFIG_IR_IMG_HW
209 enum img_ir_mode {
210 IMG_IR_M_NORMAL,
211 IMG_IR_M_REPEATING,
212 #ifdef CONFIG_PM_SLEEP
213 IMG_IR_M_WAKE,
214 #endif
218 * struct img_ir_priv_hw - Private driver data for hardware decoder.
219 * @ct_quirks: Quirk bits for each code type.
220 * @rdev: Remote control device
221 * @clk_nb: Notifier block for clock notify events.
222 * @end_timer: Timer until repeat timeout.
223 * @suspend_timer: Timer to re-enable protocol.
224 * @decoder: Current decoder settings.
225 * @enabled_protocols: Currently enabled protocols.
226 * @clk_hz: Current core clock rate in Hz.
227 * @reg_timings: Timing reg values for decoder at clock rate.
228 * @flags: IMG_IR_F_*.
229 * @filters: HW filters (derived from scancode filters).
230 * @mode: Current decode mode.
231 * @stopping: Indicates that decoder is being taken down and timers
232 * should not be restarted.
233 * @suspend_irqen: Saved IRQ enable mask over suspend.
234 * @quirk_suspend_irq: Saved IRQ enable mask over quirk suspend timer.
236 struct img_ir_priv_hw {
237 unsigned int ct_quirks[4];
238 struct rc_dev *rdev;
239 struct notifier_block clk_nb;
240 struct timer_list end_timer;
241 struct timer_list suspend_timer;
242 const struct img_ir_decoder *decoder;
243 u64 enabled_protocols;
244 unsigned long clk_hz;
245 struct img_ir_reg_timings reg_timings;
246 unsigned int flags;
247 struct img_ir_filter filters[RC_FILTER_MAX];
249 enum img_ir_mode mode;
250 bool stopping;
251 u32 suspend_irqen;
252 u32 quirk_suspend_irq;
255 static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
257 return hw->rdev;
260 void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status);
261 void img_ir_setup_hw(struct img_ir_priv *priv);
262 int img_ir_probe_hw(struct img_ir_priv *priv);
263 void img_ir_remove_hw(struct img_ir_priv *priv);
265 #ifdef CONFIG_PM_SLEEP
266 int img_ir_suspend(struct device *dev);
267 int img_ir_resume(struct device *dev);
268 #else
269 #define img_ir_suspend NULL
270 #define img_ir_resume NULL
271 #endif
273 #else
275 struct img_ir_priv_hw {
278 static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
280 return false;
282 static inline void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status)
285 static inline void img_ir_setup_hw(struct img_ir_priv *priv)
288 static inline int img_ir_probe_hw(struct img_ir_priv *priv)
290 return -ENODEV;
292 static inline void img_ir_remove_hw(struct img_ir_priv *priv)
296 #define img_ir_suspend NULL
297 #define img_ir_resume NULL
299 #endif /* CONFIG_IR_IMG_HW */
301 #endif /* _IMG_IR_HW_H_ */