sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / mfd / pcf50633-gpio.c
blobd02ddf2ebd630ab7b2e77267c0290bc6742d4f58
1 /* NXP PCF50633 GPIO Driver
3 * (C) 2006-2008 by Openmoko, Inc.
4 * Author: Balaji Rao <balajirrao@openmoko.org>
5 * All rights reserved.
7 * Broken down from monstrous PCF50633 driver mainly by
8 * Harald Welte, Andy Green and Werner Almesberger
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
20 #include <linux/mfd/pcf50633/core.h>
21 #include <linux/mfd/pcf50633/gpio.h>
22 #include <linux/mfd/pcf50633/pmic.h>
24 static const u8 pcf50633_regulator_registers[PCF50633_NUM_REGULATORS] = {
25 [PCF50633_REGULATOR_AUTO] = PCF50633_REG_AUTOOUT,
26 [PCF50633_REGULATOR_DOWN1] = PCF50633_REG_DOWN1OUT,
27 [PCF50633_REGULATOR_DOWN2] = PCF50633_REG_DOWN2OUT,
28 [PCF50633_REGULATOR_MEMLDO] = PCF50633_REG_MEMLDOOUT,
29 [PCF50633_REGULATOR_LDO1] = PCF50633_REG_LDO1OUT,
30 [PCF50633_REGULATOR_LDO2] = PCF50633_REG_LDO2OUT,
31 [PCF50633_REGULATOR_LDO3] = PCF50633_REG_LDO3OUT,
32 [PCF50633_REGULATOR_LDO4] = PCF50633_REG_LDO4OUT,
33 [PCF50633_REGULATOR_LDO5] = PCF50633_REG_LDO5OUT,
34 [PCF50633_REGULATOR_LDO6] = PCF50633_REG_LDO6OUT,
35 [PCF50633_REGULATOR_HCLDO] = PCF50633_REG_HCLDOOUT,
38 int pcf50633_gpio_set(struct pcf50633 *pcf, int gpio, u8 val)
40 u8 reg;
42 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
44 return pcf50633_reg_set_bit_mask(pcf, reg, 0x07, val);
46 EXPORT_SYMBOL_GPL(pcf50633_gpio_set);
48 u8 pcf50633_gpio_get(struct pcf50633 *pcf, int gpio)
50 u8 reg, val;
52 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
53 val = pcf50633_reg_read(pcf, reg) & 0x07;
55 return val;
57 EXPORT_SYMBOL_GPL(pcf50633_gpio_get);
59 int pcf50633_gpio_invert_set(struct pcf50633 *pcf, int gpio, int invert)
61 u8 val, reg;
63 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
64 val = !!invert << 3;
66 return pcf50633_reg_set_bit_mask(pcf, reg, 1 << 3, val);
68 EXPORT_SYMBOL_GPL(pcf50633_gpio_invert_set);
70 int pcf50633_gpio_invert_get(struct pcf50633 *pcf, int gpio)
72 u8 reg, val;
74 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
75 val = pcf50633_reg_read(pcf, reg);
77 return val & (1 << 3);
79 EXPORT_SYMBOL_GPL(pcf50633_gpio_invert_get);
81 int pcf50633_gpio_power_supply_set(struct pcf50633 *pcf,
82 int gpio, int regulator, int on)
84 u8 reg, val, mask;
86 /* the *ENA register is always one after the *OUT register */
87 reg = pcf50633_regulator_registers[regulator] + 1;
89 val = !!on << (gpio - PCF50633_GPIO1);
90 mask = 1 << (gpio - PCF50633_GPIO1);
92 return pcf50633_reg_set_bit_mask(pcf, reg, mask, val);
94 EXPORT_SYMBOL_GPL(pcf50633_gpio_power_supply_set);
96 MODULE_LICENSE("GPL");