sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / mmc / host / dw_mmc-k3.c
blob9821e6bd5d5ecf30ba045ea81f5ee397f3cd8a90
1 /*
2 * Copyright (c) 2013 Linaro Ltd.
3 * Copyright (c) 2013 Hisilicon Limited.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
11 #include <linux/clk.h>
12 #include <linux/mfd/syscon.h>
13 #include <linux/mmc/host.h>
14 #include <linux/mmc/dw_mmc.h>
15 #include <linux/module.h>
16 #include <linux/of_address.h>
17 #include <linux/platform_device.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regmap.h>
20 #include <linux/regulator/consumer.h>
22 #include "dw_mmc.h"
23 #include "dw_mmc-pltfm.h"
26 * hi6220 sd only support io voltage 1.8v and 3v
27 * Also need config AO_SCTRL_SEL18 accordingly
29 #define AO_SCTRL_SEL18 BIT(10)
30 #define AO_SCTRL_CTRL3 0x40C
32 struct k3_priv {
33 struct regmap *reg;
36 static unsigned long dw_mci_hi6220_caps[] = {
37 MMC_CAP_CMD23,
38 MMC_CAP_CMD23,
42 static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios)
44 int ret;
46 ret = clk_set_rate(host->ciu_clk, ios->clock);
47 if (ret)
48 dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock);
50 host->bus_hz = clk_get_rate(host->ciu_clk);
53 static const struct dw_mci_drv_data k3_drv_data = {
54 .set_ios = dw_mci_k3_set_ios,
57 static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
59 struct k3_priv *priv;
61 priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL);
62 if (!priv)
63 return -ENOMEM;
65 priv->reg = syscon_regmap_lookup_by_phandle(host->dev->of_node,
66 "hisilicon,peripheral-syscon");
67 if (IS_ERR(priv->reg))
68 priv->reg = NULL;
70 host->priv = priv;
71 return 0;
74 static int dw_mci_hi6220_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
76 struct dw_mci_slot *slot = mmc_priv(mmc);
77 struct k3_priv *priv;
78 struct dw_mci *host;
79 int min_uv, max_uv;
80 int ret;
82 host = slot->host;
83 priv = host->priv;
85 if (!priv || !priv->reg)
86 return 0;
88 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
89 ret = regmap_update_bits(priv->reg, AO_SCTRL_CTRL3,
90 AO_SCTRL_SEL18, 0);
91 min_uv = 3000000;
92 max_uv = 3000000;
93 } else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
94 ret = regmap_update_bits(priv->reg, AO_SCTRL_CTRL3,
95 AO_SCTRL_SEL18, AO_SCTRL_SEL18);
96 min_uv = 1800000;
97 max_uv = 1800000;
98 } else {
99 dev_dbg(host->dev, "voltage not supported\n");
100 return -EINVAL;
103 if (ret) {
104 dev_dbg(host->dev, "switch voltage failed\n");
105 return ret;
108 if (IS_ERR_OR_NULL(mmc->supply.vqmmc))
109 return 0;
111 ret = regulator_set_voltage(mmc->supply.vqmmc, min_uv, max_uv);
112 if (ret) {
113 dev_dbg(host->dev, "Regulator set error %d: %d - %d\n",
114 ret, min_uv, max_uv);
115 return ret;
118 return 0;
121 static void dw_mci_hi6220_set_ios(struct dw_mci *host, struct mmc_ios *ios)
123 int ret;
124 unsigned int clock;
126 clock = (ios->clock <= 25000000) ? 25000000 : ios->clock;
128 ret = clk_set_rate(host->biu_clk, clock);
129 if (ret)
130 dev_warn(host->dev, "failed to set rate %uHz\n", clock);
132 host->bus_hz = clk_get_rate(host->biu_clk);
135 static int dw_mci_hi6220_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
137 return 0;
140 static const struct dw_mci_drv_data hi6220_data = {
141 .caps = dw_mci_hi6220_caps,
142 .switch_voltage = dw_mci_hi6220_switch_voltage,
143 .set_ios = dw_mci_hi6220_set_ios,
144 .parse_dt = dw_mci_hi6220_parse_dt,
145 .execute_tuning = dw_mci_hi6220_execute_tuning,
148 static const struct of_device_id dw_mci_k3_match[] = {
149 { .compatible = "hisilicon,hi4511-dw-mshc", .data = &k3_drv_data, },
150 { .compatible = "hisilicon,hi6220-dw-mshc", .data = &hi6220_data, },
153 MODULE_DEVICE_TABLE(of, dw_mci_k3_match);
155 static int dw_mci_k3_probe(struct platform_device *pdev)
157 const struct dw_mci_drv_data *drv_data;
158 const struct of_device_id *match;
160 match = of_match_node(dw_mci_k3_match, pdev->dev.of_node);
161 drv_data = match->data;
163 return dw_mci_pltfm_register(pdev, drv_data);
166 static const struct dev_pm_ops dw_mci_k3_dev_pm_ops = {
167 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
168 pm_runtime_force_resume)
169 SET_RUNTIME_PM_OPS(dw_mci_runtime_suspend,
170 dw_mci_runtime_resume,
171 NULL)
174 static struct platform_driver dw_mci_k3_pltfm_driver = {
175 .probe = dw_mci_k3_probe,
176 .remove = dw_mci_pltfm_remove,
177 .driver = {
178 .name = "dwmmc_k3",
179 .of_match_table = dw_mci_k3_match,
180 .pm = &dw_mci_k3_dev_pm_ops,
184 module_platform_driver(dw_mci_k3_pltfm_driver);
186 MODULE_DESCRIPTION("K3 Specific DW-MSHC Driver Extension");
187 MODULE_LICENSE("GPL v2");
188 MODULE_ALIAS("platform:dwmmc_k3");