drivers/mmc/host/tmio_mmc.h

   1 /*
   2  * linux/drivers/mmc/host/tmio_mmc.h
   3  *
   4  * Copyright (C) 2016 Sang Engineering, Wolfram Sang
   5  * Copyright (C) 2015-16 Renesas Electronics Corporation
   6  * Copyright (C) 2007 Ian Molton
   7  * Copyright (C) 2004 Ian Molton
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * Driver for the MMC / SD / SDIO cell found in:
  14  *
  15  * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
  16  */
  17
  18 #ifndef TMIO_MMC_H
  19 #define TMIO_MMC_H
  20
  21 #include <linux/dmaengine.h>
  22 #include <linux/highmem.h>
  23 #include <linux/mutex.h>
  24 #include <linux/pagemap.h>
  25 #include <linux/scatterlist.h>
  26 #include <linux/spinlock.h>
  27
  28 #define CTL_SD_CMD 0x00
  29 #define CTL_ARG_REG 0x04
  30 #define CTL_STOP_INTERNAL_ACTION 0x08
  31 #define CTL_XFER_BLK_COUNT 0xa
  32 #define CTL_RESPONSE 0x0c
  33 /* driver merges STATUS and following STATUS2 */
  34 #define CTL_STATUS 0x1c
  35 /* driver merges IRQ_MASK and following IRQ_MASK2 */
  36 #define CTL_IRQ_MASK 0x20
  37 #define CTL_SD_CARD_CLK_CTL 0x24
  38 #define CTL_SD_XFER_LEN 0x26
  39 #define CTL_SD_MEM_CARD_OPT 0x28
  40 #define CTL_SD_ERROR_DETAIL_STATUS 0x2c
  41 #define CTL_SD_DATA_PORT 0x30
  42 #define CTL_TRANSACTION_CTL 0x34
  43 #define CTL_SDIO_STATUS 0x36
  44 #define CTL_SDIO_IRQ_MASK 0x38
  45 #define CTL_DMA_ENABLE 0xd8
  46 #define CTL_RESET_SD 0xe0
  47 #define CTL_VERSION 0xe2
  48 #define CTL_SDIO_REGS 0x100
  49 #define CTL_CLK_AND_WAIT_CTL 0x138
  50 #define CTL_RESET_SDIO 0x1e0
  51
  52 /* Definitions for values the CTRL_STATUS register can take. */
  53 #define TMIO_STAT_CMDRESPEND    BIT(0)
  54 #define TMIO_STAT_DATAEND       BIT(2)
  55 #define TMIO_STAT_CARD_REMOVE   BIT(3)
  56 #define TMIO_STAT_CARD_INSERT   BIT(4)
  57 #define TMIO_STAT_SIGSTATE      BIT(5)
  58 #define TMIO_STAT_WRPROTECT     BIT(7)
  59 #define TMIO_STAT_CARD_REMOVE_A BIT(8)
  60 #define TMIO_STAT_CARD_INSERT_A BIT(9)
  61 #define TMIO_STAT_SIGSTATE_A    BIT(10)
  62
  63 /* These belong technically to CTRL_STATUS2, but the driver merges them */
  64 #define TMIO_STAT_CMD_IDX_ERR   BIT(16)
  65 #define TMIO_STAT_CRCFAIL       BIT(17)
  66 #define TMIO_STAT_STOPBIT_ERR   BIT(18)
  67 #define TMIO_STAT_DATATIMEOUT   BIT(19)
  68 #define TMIO_STAT_RXOVERFLOW    BIT(20)
  69 #define TMIO_STAT_TXUNDERRUN    BIT(21)
  70 #define TMIO_STAT_CMDTIMEOUT    BIT(22)
  71 #define TMIO_STAT_DAT0          BIT(23) /* only known on R-Car so far */
  72 #define TMIO_STAT_RXRDY         BIT(24)
  73 #define TMIO_STAT_TXRQ          BIT(25)
  74 #define TMIO_STAT_ILL_FUNC      BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
  75 #define TMIO_STAT_SCLKDIVEN     BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
  76 #define TMIO_STAT_CMD_BUSY      BIT(30)
  77 #define TMIO_STAT_ILL_ACCESS    BIT(31)
  78
  79 #define CLK_CTL_DIV_MASK        0xff
  80 #define CLK_CTL_SCLKEN          BIT(8)
  81
  82 #define CARD_OPT_WIDTH8         BIT(13)
  83 #define CARD_OPT_WIDTH          BIT(15)
  84
  85 #define TMIO_BBS                512             /* Boot block size */
  86
  87 /* Definitions for values the CTRL_SDIO_STATUS register can take. */
  88 #define TMIO_SDIO_STAT_IOIRQ    0x0001
  89 #define TMIO_SDIO_STAT_EXPUB52  0x4000
  90 #define TMIO_SDIO_STAT_EXWT     0x8000
  91 #define TMIO_SDIO_MASK_ALL      0xc007
  92
  93 /* Define some IRQ masks */
  94 /* This is the mask used at reset by the chip */
  95 #define TMIO_MASK_ALL           0x837f031d
  96 #define TMIO_MASK_READOP  (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
  97 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
  98 #define TMIO_MASK_CMD     (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
  99                 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
 100 #define TMIO_MASK_IRQ     (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
 101
 102 struct tmio_mmc_data;
 103 struct tmio_mmc_host;
 104
 105 struct tmio_mmc_dma {
 106         enum dma_slave_buswidth dma_buswidth;
 107         bool (*filter)(struct dma_chan *chan, void *arg);
 108         void (*enable)(struct tmio_mmc_host *host, bool enable);
 109 };
 110
 111 struct tmio_mmc_host {
 112         void __iomem *ctl;
 113         struct mmc_command      *cmd;
 114         struct mmc_request      *mrq;
 115         struct mmc_data         *data;
 116         struct mmc_host         *mmc;
 117
 118         /* Callbacks for clock / power control */
 119         void (*set_pwr)(struct platform_device *host, int state);
 120         void (*set_clk_div)(struct platform_device *host, int state);
 121
 122         /* pio related stuff */
 123         struct scatterlist      *sg_ptr;
 124         struct scatterlist      *sg_orig;
 125         unsigned int            sg_len;
 126         unsigned int            sg_off;
 127         unsigned long           bus_shift;
 128
 129         struct platform_device *pdev;
 130         struct tmio_mmc_data *pdata;
 131         struct tmio_mmc_dma     *dma;
 132
 133         /* DMA support */
 134         bool                    force_pio;
 135         struct dma_chan         *chan_rx;
 136         struct dma_chan         *chan_tx;
 137         struct tasklet_struct   dma_complete;
 138         struct tasklet_struct   dma_issue;
 139         struct scatterlist      bounce_sg;
 140         u8                      *bounce_buf;
 141
 142         /* Track lost interrupts */
 143         struct delayed_work     delayed_reset_work;
 144         struct work_struct      done;
 145
 146         /* Cache */
 147         u32                     sdcard_irq_mask;
 148         u32                     sdio_irq_mask;
 149         unsigned int            clk_cache;
 150
 151         spinlock_t              lock;           /* protect host private data */
 152         unsigned long           last_req_ts;
 153         struct mutex            ios_lock;       /* protect set_ios() context */
 154         bool                    native_hotplug;
 155         bool                    sdio_irq_enabled;
 156         u32                     scc_tappos;
 157
 158         /* Mandatory callback */
 159         int (*clk_enable)(struct tmio_mmc_host *host);
 160
 161         /* Optional callbacks */
 162         unsigned int (*clk_update)(struct tmio_mmc_host *host,
 163                                    unsigned int new_clock);
 164         void (*clk_disable)(struct tmio_mmc_host *host);
 165         int (*multi_io_quirk)(struct mmc_card *card,
 166                               unsigned int direction, int blk_size);
 167         int (*card_busy)(struct mmc_host *mmc);
 168         int (*start_signal_voltage_switch)(struct mmc_host *mmc,
 169                                            struct mmc_ios *ios);
 170         int (*write16_hook)(struct tmio_mmc_host *host, int addr);
 171         void (*hw_reset)(struct tmio_mmc_host *host);
 172         void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap);
 173         bool (*check_scc_error)(struct tmio_mmc_host *host);
 174
 175         /*
 176          * Mandatory callback for tuning to occur which is optional for SDR50
 177          * and mandatory for SDR104.
 178          */
 179         unsigned int (*init_tuning)(struct tmio_mmc_host *host);
 180         int (*select_tuning)(struct tmio_mmc_host *host);
 181
 182         /* Tuning values: 1 for success, 0 for failure */
 183         DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long));
 184         unsigned int tap_num;
 185 };
 186
 187 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
 188 void tmio_mmc_host_free(struct tmio_mmc_host *host);
 189 int tmio_mmc_host_probe(struct tmio_mmc_host *host,
 190                         struct tmio_mmc_data *pdata);
 191 void tmio_mmc_host_remove(struct tmio_mmc_host *host);
 192 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
 193
 194 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
 195 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
 196 irqreturn_t tmio_mmc_irq(int irq, void *devid);
 197
 198 static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
 199                                          unsigned long *flags)
 200 {
 201         local_irq_save(*flags);
 202         return kmap_atomic(sg_page(sg)) + sg->offset;
 203 }
 204
 205 static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
 206                                           unsigned long *flags, void *virt)
 207 {
 208         kunmap_atomic(virt - sg->offset);
 209         local_irq_restore(*flags);
 210 }
 211
 212 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
 213 void tmio_mmc_start_dma(struct tmio_mmc_host *host, struct mmc_data *data);
 214 void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable);
 215 void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata);
 216 void tmio_mmc_release_dma(struct tmio_mmc_host *host);
 217 void tmio_mmc_abort_dma(struct tmio_mmc_host *host);
 218 #else
 219 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
 220                                struct mmc_data *data)
 221 {
 222 }
 223
 224 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
 225 {
 226 }
 227
 228 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
 229                                  struct tmio_mmc_data *pdata)
 230 {
 231         host->chan_tx = NULL;
 232         host->chan_rx = NULL;
 233 }
 234
 235 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
 236 {
 237 }
 238
 239 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
 240 {
 241 }
 242 #endif
 243
 244 #ifdef CONFIG_PM
 245 int tmio_mmc_host_runtime_suspend(struct device *dev);
 246 int tmio_mmc_host_runtime_resume(struct device *dev);
 247 #endif
 248
 249 static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
 250 {
 251         return readw(host->ctl + (addr << host->bus_shift));
 252 }
 253
 254 static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
 255                 u16 *buf, int count)
 256 {
 257         readsw(host->ctl + (addr << host->bus_shift), buf, count);
 258 }
 259
 260 static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int addr)
 261 {
 262         return readw(host->ctl + (addr << host->bus_shift)) |
 263                readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
 264 }
 265
 266 static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
 267                 u32 *buf, int count)
 268 {
 269         readsl(host->ctl + (addr << host->bus_shift), buf, count);
 270 }
 271
 272 static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val)
 273 {
 274         /* If there is a hook and it returns non-zero then there
 275          * is an error and the write should be skipped
 276          */
 277         if (host->write16_hook && host->write16_hook(host, addr))
 278                 return;
 279         writew(val, host->ctl + (addr << host->bus_shift));
 280 }
 281
 282 static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
 283                 u16 *buf, int count)
 284 {
 285         writesw(host->ctl + (addr << host->bus_shift), buf, count);
 286 }
 287
 288 static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int addr, u32 val)
 289 {
 290         writew(val & 0xffff, host->ctl + (addr << host->bus_shift));
 291         writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
 292 }
 293
 294 static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
 295                 const u32 *buf, int count)
 296 {
 297         writesl(host->ctl + (addr << host->bus_shift), buf, count);
 298 }
 299
 300 #endif