2 * PCIe RC driver for Synopsys DesignWare Core
4 * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
6 * Authors: Joao Pinto <Joao.Pinto@synopsys.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/clk.h>
13 #include <linux/delay.h>
14 #include <linux/gpio.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/of_gpio.h>
19 #include <linux/pci.h>
20 #include <linux/platform_device.h>
21 #include <linux/resource.h>
22 #include <linux/signal.h>
23 #include <linux/types.h>
25 #include "pcie-designware.h"
28 struct pcie_port pp
; /* pp.dbi_base is DT 0th resource */
31 static irqreturn_t
dw_plat_pcie_msi_irq_handler(int irq
, void *arg
)
33 struct pcie_port
*pp
= arg
;
35 return dw_handle_msi_irq(pp
);
38 static void dw_plat_pcie_host_init(struct pcie_port
*pp
)
41 dw_pcie_wait_for_link(pp
);
43 if (IS_ENABLED(CONFIG_PCI_MSI
))
47 static struct pcie_host_ops dw_plat_pcie_host_ops
= {
48 .host_init
= dw_plat_pcie_host_init
,
51 static int dw_plat_add_pcie_port(struct pcie_port
*pp
,
52 struct platform_device
*pdev
)
54 struct device
*dev
= pp
->dev
;
57 pp
->irq
= platform_get_irq(pdev
, 1);
61 if (IS_ENABLED(CONFIG_PCI_MSI
)) {
62 pp
->msi_irq
= platform_get_irq(pdev
, 0);
66 ret
= devm_request_irq(dev
, pp
->msi_irq
,
67 dw_plat_pcie_msi_irq_handler
,
68 IRQF_SHARED
, "dw-plat-pcie-msi", pp
);
70 dev_err(dev
, "failed to request MSI IRQ\n");
76 pp
->ops
= &dw_plat_pcie_host_ops
;
78 ret
= dw_pcie_host_init(pp
);
80 dev_err(dev
, "failed to initialize host\n");
87 static int dw_plat_pcie_probe(struct platform_device
*pdev
)
89 struct device
*dev
= &pdev
->dev
;
90 struct dw_plat_pcie
*dw_plat_pcie
;
92 struct resource
*res
; /* Resource from DT */
95 dw_plat_pcie
= devm_kzalloc(dev
, sizeof(*dw_plat_pcie
), GFP_KERNEL
);
99 pp
= &dw_plat_pcie
->pp
;
102 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
103 pp
->dbi_base
= devm_ioremap_resource(dev
, res
);
104 if (IS_ERR(pp
->dbi_base
))
105 return PTR_ERR(pp
->dbi_base
);
107 ret
= dw_plat_add_pcie_port(pp
, pdev
);
114 static const struct of_device_id dw_plat_pcie_of_match
[] = {
115 { .compatible
= "snps,dw-pcie", },
119 static struct platform_driver dw_plat_pcie_driver
= {
122 .of_match_table
= dw_plat_pcie_of_match
,
124 .probe
= dw_plat_pcie_probe
,
126 builtin_platform_driver(dw_plat_pcie_driver
);