sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / soc / renesas / r8a7790-sysc.c
blob7a567ad0ff73c2c7c68f4dcecb47217ce7e4d8fa
1 /*
2 * Renesas R-Car H2 System Controller
4 * Copyright (C) 2016 Glider bvba
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 */
11 #include <linux/bug.h>
12 #include <linux/kernel.h>
14 #include <dt-bindings/power/r8a7790-sysc.h>
16 #include "rcar-sysc.h"
18 static const struct rcar_sysc_area r8a7790_areas[] __initconst = {
19 { "always-on", 0, 0, R8A7790_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
20 { "ca15-scu", 0x180, 0, R8A7790_PD_CA15_SCU, R8A7790_PD_ALWAYS_ON,
21 PD_SCU },
22 { "ca15-cpu0", 0x40, 0, R8A7790_PD_CA15_CPU0, R8A7790_PD_CA15_SCU,
23 PD_CPU_NOCR },
24 { "ca15-cpu1", 0x40, 1, R8A7790_PD_CA15_CPU1, R8A7790_PD_CA15_SCU,
25 PD_CPU_NOCR },
26 { "ca15-cpu2", 0x40, 2, R8A7790_PD_CA15_CPU2, R8A7790_PD_CA15_SCU,
27 PD_CPU_NOCR },
28 { "ca15-cpu3", 0x40, 3, R8A7790_PD_CA15_CPU3, R8A7790_PD_CA15_SCU,
29 PD_CPU_NOCR },
30 { "ca7-scu", 0x100, 0, R8A7790_PD_CA7_SCU, R8A7790_PD_ALWAYS_ON,
31 PD_SCU },
32 { "ca7-cpu0", 0x1c0, 0, R8A7790_PD_CA7_CPU0, R8A7790_PD_CA7_SCU,
33 PD_CPU_NOCR },
34 { "ca7-cpu1", 0x1c0, 1, R8A7790_PD_CA7_CPU1, R8A7790_PD_CA7_SCU,
35 PD_CPU_NOCR },
36 { "ca7-cpu2", 0x1c0, 2, R8A7790_PD_CA7_CPU2, R8A7790_PD_CA7_SCU,
37 PD_CPU_NOCR },
38 { "ca7-cpu3", 0x1c0, 3, R8A7790_PD_CA7_CPU3, R8A7790_PD_CA7_SCU,
39 PD_CPU_NOCR },
40 { "sh-4a", 0x80, 0, R8A7790_PD_SH_4A, R8A7790_PD_ALWAYS_ON },
41 { "rgx", 0xc0, 0, R8A7790_PD_RGX, R8A7790_PD_ALWAYS_ON },
42 { "imp", 0x140, 0, R8A7790_PD_IMP, R8A7790_PD_ALWAYS_ON },
45 const struct rcar_sysc_info r8a7790_sysc_info __initconst = {
46 .areas = r8a7790_areas,
47 .num_areas = ARRAY_SIZE(r8a7790_areas),