sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / soc / renesas / r8a7796-sysc.c
blobf700c842b9e1d010b8f2c1e947c62e7c95671de0
1 /*
2 * Renesas R-Car M3-W System Controller
4 * Copyright (C) 2016 Glider bvba
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 */
11 #include <linux/bug.h>
12 #include <linux/kernel.h>
14 #include <dt-bindings/power/r8a7796-sysc.h>
16 #include "rcar-sysc.h"
18 static const struct rcar_sysc_area r8a7796_areas[] __initconst = {
19 { "always-on", 0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
20 { "ca57-scu", 0x1c0, 0, R8A7796_PD_CA57_SCU, R8A7796_PD_ALWAYS_ON,
21 PD_SCU },
22 { "ca57-cpu0", 0x80, 0, R8A7796_PD_CA57_CPU0, R8A7796_PD_CA57_SCU,
23 PD_CPU_NOCR },
24 { "ca57-cpu1", 0x80, 1, R8A7796_PD_CA57_CPU1, R8A7796_PD_CA57_SCU,
25 PD_CPU_NOCR },
26 { "ca53-scu", 0x140, 0, R8A7796_PD_CA53_SCU, R8A7796_PD_ALWAYS_ON,
27 PD_SCU },
28 { "ca53-cpu0", 0x200, 0, R8A7796_PD_CA53_CPU0, R8A7796_PD_CA53_SCU,
29 PD_CPU_NOCR },
30 { "ca53-cpu1", 0x200, 1, R8A7796_PD_CA53_CPU1, R8A7796_PD_CA53_SCU,
31 PD_CPU_NOCR },
32 { "ca53-cpu2", 0x200, 2, R8A7796_PD_CA53_CPU2, R8A7796_PD_CA53_SCU,
33 PD_CPU_NOCR },
34 { "ca53-cpu3", 0x200, 3, R8A7796_PD_CA53_CPU3, R8A7796_PD_CA53_SCU,
35 PD_CPU_NOCR },
36 { "cr7", 0x240, 0, R8A7796_PD_CR7, R8A7796_PD_ALWAYS_ON },
37 { "a3vc", 0x380, 0, R8A7796_PD_A3VC, R8A7796_PD_ALWAYS_ON },
38 { "a2vc0", 0x3c0, 0, R8A7796_PD_A2VC0, R8A7796_PD_A3VC },
39 { "a2vc1", 0x3c0, 1, R8A7796_PD_A2VC1, R8A7796_PD_A3VC },
40 { "3dg-a", 0x100, 0, R8A7796_PD_3DG_A, R8A7796_PD_ALWAYS_ON },
41 { "3dg-b", 0x100, 1, R8A7796_PD_3DG_B, R8A7796_PD_3DG_A },
42 { "a3ir", 0x180, 0, R8A7796_PD_A3IR, R8A7796_PD_ALWAYS_ON },
45 const struct rcar_sysc_info r8a7796_sysc_info __initconst = {
46 .areas = r8a7796_areas,
47 .num_areas = ARRAY_SIZE(r8a7796_areas),