?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / tty / serial / bfin_uart.c
blob293ecbb00684cfc94b03fb231d3e92c7fb718461
1 /*
2 * Blackfin On-Chip Serial Driver
3 *
4 * Copyright 2006-2011 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #define DRIVER_NAME "bfin-uart"
16 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
17
18 #include <linux/module.h>
19 #include <linux/ioport.h>
20 #include <linux/gfp.h>
21 #include <linux/io.h>
22 #include <linux/init.h>
23 #include <linux/console.h>
24 #include <linux/sysrq.h>
25 #include <linux/platform_device.h>
26 #include <linux/tty.h>
27 #include <linux/tty_flip.h>
28 #include <linux/serial_core.h>
29 #include <linux/gpio.h>
30 #include <linux/irq.h>
31 #include <linux/kgdb.h>
32 #include <linux/slab.h>
33 #include <linux/dma-mapping.h>
34
35 #include <asm/portmux.h>
36 #include <asm/cacheflush.h>
37 #include <asm/dma.h>
38 #include <asm/bfin_serial.h>
39
40 #ifdef CONFIG_SERIAL_BFIN_MODULE
41 # undef CONFIG_EARLY_PRINTK
42 #endif
43
44 /* UART name and device definitions */
45 #define BFIN_SERIAL_DEV_NAME "ttyBF"
46 #define BFIN_SERIAL_MAJOR 204
47 #define BFIN_SERIAL_MINOR 64
48
49 static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
50
51 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
52 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
53
54 # ifndef CONFIG_SERIAL_BFIN_PIO
55 # error KGDB only support UART in PIO mode.
56 # endif
57
58 static int kgdboc_port_line;
59 static int kgdboc_break_enabled;
60 #endif
61 /*
62 * Setup for console. Argument comes from the menuconfig
63 */
64 #define DMA_RX_XCOUNT 512
65 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
66
67 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
68
69 #ifdef CONFIG_SERIAL_BFIN_DMA
70 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
71 #else
72 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
73 #endif
74
75 static void bfin_serial_reset_irda(struct uart_port *port);
76
77 #if defined(SERIAL_BFIN_CTSRTS) || \
78 defined(SERIAL_BFIN_HARD_CTSRTS)
79 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
80 {
81 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
82 if (uart->cts_pin < 0)
83 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
84
85 /* CTS PIN is negative assertive. */
86 if (UART_GET_CTS(uart))
87 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
88 else
89 return TIOCM_DSR | TIOCM_CAR;
90 }
91
92 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
93 {
94 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
95 if (uart->rts_pin < 0)
96 return;
97
98 /* RTS PIN is negative assertive. */
99 if (mctrl & TIOCM_RTS)
100 UART_ENABLE_RTS(uart);
101 else
102 UART_DISABLE_RTS(uart);
103 }
104
105 /*
106 * Handle any change of modem status signal.
107 */
108 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
109 {
110 struct bfin_serial_port *uart = dev_id;
111 struct uart_port *uport = &uart->port;
112 unsigned int status = bfin_serial_get_mctrl(uport);
113 #ifdef SERIAL_BFIN_HARD_CTSRTS
114
115 UART_CLEAR_SCTS(uart);
116 if (uport->hw_stopped) {
117 if (status) {
118 uport->hw_stopped = 0;
119 uart_write_wakeup(uport);
120 }
121 } else {
122 if (!status)
123 uport->hw_stopped = 1;
124 }
125 #else
126 uart_handle_cts_change(uport, status & TIOCM_CTS);
127 #endif
128
129 return IRQ_HANDLED;
130 }
131 #else
132 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
133 {
134 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
135 }
136
137 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
138 {
139 }
140 #endif
141
142 /*
143 * interrupts are disabled on entry
144 */
145 static void bfin_serial_stop_tx(struct uart_port *port)
146 {
147 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
148 #ifdef CONFIG_SERIAL_BFIN_DMA
149 struct circ_buf *xmit = &uart->port.state->xmit;
150 #endif
151
152 while (!(UART_GET_LSR(uart) & TEMT))
153 cpu_relax();
154
155 #ifdef CONFIG_SERIAL_BFIN_DMA
156 disable_dma(uart->tx_dma_channel);
157 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
158 uart->port.icount.tx += uart->tx_count;
159 uart->tx_count = 0;
160 uart->tx_done = 1;
161 #else
162 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
163 /* Clear TFI bit */
164 UART_PUT_LSR(uart, TFI);
165 #endif
166 UART_CLEAR_IER(uart, ETBEI);
167 #endif
168 }
169
170 /*
171 * port is locked and interrupts are disabled
172 */
173 static void bfin_serial_start_tx(struct uart_port *port)
174 {
175 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
176 struct tty_struct *tty = uart->port.state->port.tty;
177
178 /*
179 * To avoid losting RX interrupt, we reset IR function
180 * before sending data.
181 */
182 if (tty->termios.c_line == N_IRDA)
183 bfin_serial_reset_irda(port);
184
185 #ifdef CONFIG_SERIAL_BFIN_DMA
186 if (uart->tx_done)
187 bfin_serial_dma_tx_chars(uart);
188 #else
189 UART_SET_IER(uart, ETBEI);
190 bfin_serial_tx_chars(uart);
191 #endif
192 }
193
194 /*
195 * Interrupts are enabled
196 */
197 static void bfin_serial_stop_rx(struct uart_port *port)
198 {
199 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
200
201 UART_CLEAR_IER(uart, ERBFI);
202 }
203
204 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
205 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
206 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
207 #else
208 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
209 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
210 #endif
211
212 #ifdef CONFIG_SERIAL_BFIN_PIO
213 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
214 {
215 unsigned int status, ch, flg;
216 static u64 anomaly_start;
217
218 status = UART_GET_LSR(uart);
219 UART_CLEAR_LSR(uart);
220
221 ch = UART_GET_CHAR(uart);
222 uart->port.icount.rx++;
223
224 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
225 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
226 if (kgdb_connected && kgdboc_port_line == uart->port.line
227 && kgdboc_break_enabled)
228 if (ch == 0x3) {/* Ctrl + C */
229 kgdb_breakpoint();
230 return;
231 }
232
233 if (!uart->port.state)
234 return;
235 #endif
236 if (ANOMALY_05000363) {
237 /* The BF533 (and BF561) family of processors have a nice anomaly
238 * where they continuously generate characters for a "single" break.
239 * We have to basically ignore this flood until the "next" valid
240 * character comes across. Due to the nature of the flood, it is
241 * not possible to reliably catch bytes that are sent too quickly
242 * after this break. So application code talking to the Blackfin
243 * which sends a break signal must allow at least 1.5 character
244 * times after the end of the break for things to stabilize. This
245 * timeout was picked as it must absolutely be larger than 1
246 * character time +/- some percent. So 1.5 sounds good. All other
247 * Blackfin families operate properly. Woo.
248 */
249 if (anomaly_start > 0) {
250 u64 curr, nsecs, threshold_ns;
251
252 if ((~ch & (~ch + 1)) & 0xff)
253 goto known_good_char;
254
255 curr = ktime_get_ns();
256 nsecs = curr - anomaly_start;
257 if (nsecs >> 32)
258 goto known_good_char;
259
260 threshold_ns = UART_GET_ANOMALY_THRESHOLD(uart)
261 * NSEC_PER_USEC;
262 if (nsecs > threshold_ns)
263 goto known_good_char;
264
265 if (ch)
266 anomaly_start = 0;
267 else
268 anomaly_start = curr;
269
270 return;
271
272 known_good_char:
273 status &= ~BI;
274 anomaly_start = 0;
275 }
276 }
277
278 if (status & BI) {
279 if (ANOMALY_05000363)
280 if (bfin_revid() < 5)
281 anomaly_start = ktime_get_ns();
282 uart->port.icount.brk++;
283 if (uart_handle_break(&uart->port))
284 goto ignore_char;
285 status &= ~(PE | FE);
286 }
287 if (status & PE)
288 uart->port.icount.parity++;
289 if (status & OE)
290 uart->port.icount.overrun++;
291 if (status & FE)
292 uart->port.icount.frame++;
293
294 status &= uart->port.read_status_mask;
295
296 if (status & BI)
297 flg = TTY_BREAK;
298 else if (status & PE)
299 flg = TTY_PARITY;
300 else if (status & FE)
301 flg = TTY_FRAME;
302 else
303 flg = TTY_NORMAL;
304
305 if (uart_handle_sysrq_char(&uart->port, ch))
306 goto ignore_char;
307
308 uart_insert_char(&uart->port, status, OE, ch, flg);
309
310 ignore_char:
311 tty_flip_buffer_push(&uart->port.state->port);
312 }
313
314 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
315 {
316 struct circ_buf *xmit = &uart->port.state->xmit;
317
318 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
319 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
320 /* Clear TFI bit */
321 UART_PUT_LSR(uart, TFI);
322 #endif
323 /* Anomaly notes:
324 * 05000215 - we always clear ETBEI within last UART TX
325 * interrupt to end a string. It is always set
326 * when start a new tx.
327 */
328 UART_CLEAR_IER(uart, ETBEI);
329 return;
330 }
331
332 if (uart->port.x_char) {
333 UART_PUT_CHAR(uart, uart->port.x_char);
334 uart->port.icount.tx++;
335 uart->port.x_char = 0;
336 }
337
338 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
339 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
340 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
341 uart->port.icount.tx++;
342 }
343
344 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
345 uart_write_wakeup(&uart->port);
346 }
347
348 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
349 {
350 struct bfin_serial_port *uart = dev_id;
351
352 while (UART_GET_LSR(uart) & DR)
353 bfin_serial_rx_chars(uart);
354
355 return IRQ_HANDLED;
356 }
357
358 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
359 {
360 struct bfin_serial_port *uart = dev_id;
361
362 spin_lock(&uart->port.lock);
363 if (UART_GET_LSR(uart) & THRE)
364 bfin_serial_tx_chars(uart);
365 spin_unlock(&uart->port.lock);
366
367 return IRQ_HANDLED;
368 }
369 #endif
370
371 #ifdef CONFIG_SERIAL_BFIN_DMA
372 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
373 {
374 struct circ_buf *xmit = &uart->port.state->xmit;
375
376 uart->tx_done = 0;
377
378 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
379 uart->tx_count = 0;
380 uart->tx_done = 1;
381 return;
382 }
383
384 if (uart->port.x_char) {
385 UART_PUT_CHAR(uart, uart->port.x_char);
386 uart->port.icount.tx++;
387 uart->port.x_char = 0;
388 }
389
390 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
391 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
392 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
393 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
394 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
395 set_dma_config(uart->tx_dma_channel,
396 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
397 INTR_ON_BUF,
398 DIMENSION_LINEAR,
399 DATA_SIZE_8,
400 DMA_SYNC_RESTART));
401 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
402 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
403 set_dma_x_modify(uart->tx_dma_channel, 1);
404 SSYNC();
405 enable_dma(uart->tx_dma_channel);
406
407 UART_SET_IER(uart, ETBEI);
408 }
409
410 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
411 {
412 int i, flg, status;
413
414 status = UART_GET_LSR(uart);
415 UART_CLEAR_LSR(uart);
416
417 uart->port.icount.rx +=
418 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
419 UART_XMIT_SIZE);
420
421 if (status & BI) {
422 uart->port.icount.brk++;
423 if (uart_handle_break(&uart->port))
424 goto dma_ignore_char;
425 status &= ~(PE | FE);
426 }
427 if (status & PE)
428 uart->port.icount.parity++;
429 if (status & OE)
430 uart->port.icount.overrun++;
431 if (status & FE)
432 uart->port.icount.frame++;
433
434 status &= uart->port.read_status_mask;
435
436 if (status & BI)
437 flg = TTY_BREAK;
438 else if (status & PE)
439 flg = TTY_PARITY;
440 else if (status & FE)
441 flg = TTY_FRAME;
442 else
443 flg = TTY_NORMAL;
444
445 for (i = uart->rx_dma_buf.tail; ; i++) {
446 if (i >= UART_XMIT_SIZE)
447 i = 0;
448 if (i == uart->rx_dma_buf.head)
449 break;
450 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
451 uart_insert_char(&uart->port, status, OE,
452 uart->rx_dma_buf.buf[i], flg);
453 }
454
455 dma_ignore_char:
456 tty_flip_buffer_push(&uart->port.state->port);
457 }
458
459 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
460 {
461 int x_pos, pos;
462 unsigned long flags;
463
464 dma_disable_irq_nosync(uart->rx_dma_channel);
465 spin_lock_irqsave(&uart->rx_lock, flags);
466
467 /* 2D DMA RX buffer ring is used. Because curr_y_count and
468 * curr_x_count can't be read as an atomic operation,
469 * curr_y_count should be read before curr_x_count. When
470 * curr_x_count is read, curr_y_count may already indicate
471 * next buffer line. But, the position calculated here is
472 * still indicate the old line. The wrong position data may
473 * be smaller than current buffer tail, which cause garbages
474 * are received if it is not prohibit.
475 */
476 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
477 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
478 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
479 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
480 uart->rx_dma_nrows = 0;
481 x_pos = DMA_RX_XCOUNT - x_pos;
482 if (x_pos == DMA_RX_XCOUNT)
483 x_pos = 0;
484
485 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
486 /* Ignore receiving data if new position is in the same line of
487 * current buffer tail and small.
488 */
489 if (pos > uart->rx_dma_buf.tail ||
490 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
491 uart->rx_dma_buf.head = pos;
492 bfin_serial_dma_rx_chars(uart);
493 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
494 }
495
496 spin_unlock_irqrestore(&uart->rx_lock, flags);
497 dma_enable_irq(uart->rx_dma_channel);
498
499 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
500 }
501
502 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
503 {
504 struct bfin_serial_port *uart = dev_id;
505 struct circ_buf *xmit = &uart->port.state->xmit;
506
507 spin_lock(&uart->port.lock);
508 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
509 disable_dma(uart->tx_dma_channel);
510 clear_dma_irqstat(uart->tx_dma_channel);
511 /* Anomaly notes:
512 * 05000215 - we always clear ETBEI within last UART TX
513 * interrupt to end a string. It is always set
514 * when start a new tx.
515 */
516 UART_CLEAR_IER(uart, ETBEI);
517 uart->port.icount.tx += uart->tx_count;
518 if (!(xmit->tail == 0 && xmit->head == 0)) {
519 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
520
521 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
522 uart_write_wakeup(&uart->port);
523 }
524
525 bfin_serial_dma_tx_chars(uart);
526 }
527
528 spin_unlock(&uart->port.lock);
529 return IRQ_HANDLED;
530 }
531
532 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
533 {
534 struct bfin_serial_port *uart = dev_id;
535 unsigned int irqstat;
536 int x_pos, pos;
537
538 spin_lock(&uart->rx_lock);
539 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
540 clear_dma_irqstat(uart->rx_dma_channel);
541
542 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
543 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
544 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
545 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
546 uart->rx_dma_nrows = 0;
547
548 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
549 if (pos > uart->rx_dma_buf.tail ||
550 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
551 uart->rx_dma_buf.head = pos;
552 bfin_serial_dma_rx_chars(uart);
553 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
554 }
555
556 spin_unlock(&uart->rx_lock);
557
558 return IRQ_HANDLED;
559 }
560 #endif
561
562 /*
563 * Return TIOCSER_TEMT when transmitter is not busy.
564 */
565 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
566 {
567 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
568 unsigned int lsr;
569
570 lsr = UART_GET_LSR(uart);
571 if (lsr & TEMT)
572 return TIOCSER_TEMT;
573 else
574 return 0;
575 }
576
577 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
578 {
579 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
580 u32 lcr = UART_GET_LCR(uart);
581 if (break_state)
582 lcr |= SB;
583 else
584 lcr &= ~SB;
585 UART_PUT_LCR(uart, lcr);
586 SSYNC();
587 }
588
589 static int bfin_serial_startup(struct uart_port *port)
590 {
591 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
592
593 #ifdef CONFIG_SERIAL_BFIN_DMA
594 dma_addr_t dma_handle;
595
596 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
597 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
598 return -EBUSY;
599 }
600
601 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
602 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
603 free_dma(uart->rx_dma_channel);
604 return -EBUSY;
605 }
606
607 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
608 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
609
610 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
611 uart->rx_dma_buf.head = 0;
612 uart->rx_dma_buf.tail = 0;
613 uart->rx_dma_nrows = 0;
614
615 set_dma_config(uart->rx_dma_channel,
616 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
617 INTR_ON_ROW, DIMENSION_2D,
618 DATA_SIZE_8,
619 DMA_SYNC_RESTART));
620 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
621 set_dma_x_modify(uart->rx_dma_channel, 1);
622 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
623 set_dma_y_modify(uart->rx_dma_channel, 1);
624 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
625 enable_dma(uart->rx_dma_channel);
626
627 uart->rx_dma_timer.data = (unsigned long)(uart);
628 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
629 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
630 add_timer(&(uart->rx_dma_timer));
631 #else
632 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
633 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
634 if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
635 kgdboc_break_enabled = 0;
636 else {
637 # endif
638 if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
639 "BFIN_UART_RX", uart)) {
640 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
641 return -EBUSY;
642 }
643
644 if (request_irq
645 (uart->tx_irq, bfin_serial_tx_int, 0,
646 "BFIN_UART_TX", uart)) {
647 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
648 free_irq(uart->rx_irq, uart);
649 return -EBUSY;
650 }
651
652 # ifdef CONFIG_BF54x
653 {
654 /*
655 * UART2 and UART3 on BF548 share interrupt PINs and DMA
656 * controllers with SPORT2 and SPORT3. UART rx and tx
657 * interrupts are generated in PIO mode only when configure
658 * their peripheral mapping registers properly, which means
659 * request corresponding DMA channels in PIO mode as well.
660 */
661 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
662
663 switch (uart->rx_irq) {
664 case IRQ_UART3_RX:
665 uart_dma_ch_rx = CH_UART3_RX;
666 uart_dma_ch_tx = CH_UART3_TX;
667 break;
668 case IRQ_UART2_RX:
669 uart_dma_ch_rx = CH_UART2_RX;
670 uart_dma_ch_tx = CH_UART2_TX;
671 break;
672 default:
673 uart_dma_ch_rx = uart_dma_ch_tx = 0;
674 break;
675 }
676
677 if (uart_dma_ch_rx &&
678 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
679 printk(KERN_NOTICE"Fail to attach UART interrupt\n");
680 free_irq(uart->rx_irq, uart);
681 free_irq(uart->tx_irq, uart);
682 return -EBUSY;
683 }
684 if (uart_dma_ch_tx &&
685 request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
686 printk(KERN_NOTICE "Fail to attach UART interrupt\n");
687 free_dma(uart_dma_ch_rx);
688 free_irq(uart->rx_irq, uart);
689 free_irq(uart->tx_irq, uart);
690 return -EBUSY;
691 }
692 }
693 # endif
694 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
695 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
696 }
697 # endif
698 #endif
699
700 #ifdef SERIAL_BFIN_CTSRTS
701 if (uart->cts_pin >= 0) {
702 if (request_irq(gpio_to_irq(uart->cts_pin),
703 bfin_serial_mctrl_cts_int,
704 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
705 0, "BFIN_UART_CTS", uart)) {
706 uart->cts_pin = -1;
707 pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
708 }
709 }
710 if (uart->rts_pin >= 0) {
711 if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
712 pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
713 uart->rts_pin = -1;
714 } else
715 gpio_direction_output(uart->rts_pin, 0);
716 }
717 #endif
718 #ifdef SERIAL_BFIN_HARD_CTSRTS
719 if (uart->cts_pin >= 0) {
720 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
721 0, "BFIN_UART_MODEM_STATUS", uart)) {
722 uart->cts_pin = -1;
723 dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
724 }
725
726 /* CTS RTS PINs are negative assertive. */
727 UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS);
728 UART_SET_IER(uart, EDSSI);
729 }
730 #endif
731
732 UART_SET_IER(uart, ERBFI);
733 return 0;
734 }
735
736 static void bfin_serial_shutdown(struct uart_port *port)
737 {
738 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
739
740 #ifdef CONFIG_SERIAL_BFIN_DMA
741 disable_dma(uart->tx_dma_channel);
742 free_dma(uart->tx_dma_channel);
743 disable_dma(uart->rx_dma_channel);
744 free_dma(uart->rx_dma_channel);
745 del_timer(&(uart->rx_dma_timer));
746 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
747 #else
748 #ifdef CONFIG_BF54x
749 switch (uart->port.irq) {
750 case IRQ_UART3_RX:
751 free_dma(CH_UART3_RX);
752 free_dma(CH_UART3_TX);
753 break;
754 case IRQ_UART2_RX:
755 free_dma(CH_UART2_RX);
756 free_dma(CH_UART2_TX);
757 break;
758 default:
759 break;
760 }
761 #endif
762 free_irq(uart->rx_irq, uart);
763 free_irq(uart->tx_irq, uart);
764 #endif
765
766 #ifdef SERIAL_BFIN_CTSRTS
767 if (uart->cts_pin >= 0)
768 free_irq(gpio_to_irq(uart->cts_pin), uart);
769 if (uart->rts_pin >= 0)
770 gpio_free(uart->rts_pin);
771 #endif
772 #ifdef SERIAL_BFIN_HARD_CTSRTS
773 if (uart->cts_pin >= 0)
774 free_irq(uart->status_irq, uart);
775 #endif
776 }
777
778 static void
779 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
780 struct ktermios *old)
781 {
782 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
783 unsigned long flags;
784 unsigned int baud, quot;
785 unsigned int ier, lcr = 0;
786 unsigned long timeout;
787
788 #ifdef SERIAL_BFIN_CTSRTS
789 if (old == NULL && uart->cts_pin != -1)
790 termios->c_cflag |= CRTSCTS;
791 else if (uart->cts_pin == -1)
792 termios->c_cflag &= ~CRTSCTS;
793 #endif
794
795 switch (termios->c_cflag & CSIZE) {
796 case CS8:
797 lcr = WLS(8);
798 break;
799 case CS7:
800 lcr = WLS(7);
801 break;
802 case CS6:
803 lcr = WLS(6);
804 break;
805 case CS5:
806 lcr = WLS(5);
807 break;
808 default:
809 printk(KERN_ERR "%s: word length not supported\n",
810 __func__);
811 }
812
813 /* Anomaly notes:
814 * 05000231 - STOP bit is always set to 1 whatever the user is set.
815 */
816 if (termios->c_cflag & CSTOPB) {
817 if (ANOMALY_05000231)
818 printk(KERN_WARNING "STOP bits other than 1 is not "
819 "supported in case of anomaly 05000231.\n");
820 else
821 lcr |= STB;
822 }
823 if (termios->c_cflag & PARENB)
824 lcr |= PEN;
825 if (!(termios->c_cflag & PARODD))
826 lcr |= EPS;
827 if (termios->c_cflag & CMSPAR)
828 lcr |= STP;
829
830 spin_lock_irqsave(&uart->port.lock, flags);
831
832 port->read_status_mask = OE;
833 if (termios->c_iflag & INPCK)
834 port->read_status_mask |= (FE | PE);
835 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
836 port->read_status_mask |= BI;
837
838 /*
839 * Characters to ignore
840 */
841 port->ignore_status_mask = 0;
842 if (termios->c_iflag & IGNPAR)
843 port->ignore_status_mask |= FE | PE;
844 if (termios->c_iflag & IGNBRK) {
845 port->ignore_status_mask |= BI;
846 /*
847 * If we're ignoring parity and break indicators,
848 * ignore overruns too (for real raw support).
849 */
850 if (termios->c_iflag & IGNPAR)
851 port->ignore_status_mask |= OE;
852 }
853
854 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
855 quot = uart_get_divisor(port, baud);
856
857 /* If discipline is not IRDA, apply ANOMALY_05000230 */
858 if (termios->c_line != N_IRDA)
859 quot -= ANOMALY_05000230;
860
861 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
862
863 /* Wait till the transfer buffer is empty */
864 timeout = jiffies + msecs_to_jiffies(10);
865 while (UART_GET_GCTL(uart) & UCEN && !(UART_GET_LSR(uart) & TEMT))
866 if (time_after(jiffies, timeout)) {
867 dev_warn(port->dev, "timeout waiting for TX buffer empty\n");
868 break;
869 }
870
871 /* Disable UART */
872 ier = UART_GET_IER(uart);
873 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN);
874 UART_DISABLE_INTS(uart);
875
876 /* Set DLAB in LCR to Access CLK */
877 UART_SET_DLAB(uart);
878
879 UART_PUT_CLK(uart, quot);
880 SSYNC();
881
882 /* Clear DLAB in LCR to Access THR RBR IER */
883 UART_CLEAR_DLAB(uart);
884
885 UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr);
886
887 /* Enable UART */
888 UART_ENABLE_INTS(uart, ier);
889 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN);
890
891 /* Port speed changed, update the per-port timeout. */
892 uart_update_timeout(port, termios->c_cflag, baud);
893
894 spin_unlock_irqrestore(&uart->port.lock, flags);
895 }
896
897 static const char *bfin_serial_type(struct uart_port *port)
898 {
899 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
900
901 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
902 }
903
904 /*
905 * Release the memory region(s) being used by 'port'.
906 */
907 static void bfin_serial_release_port(struct uart_port *port)
908 {
909 }
910
911 /*
912 * Request the memory region(s) being used by 'port'.
913 */
914 static int bfin_serial_request_port(struct uart_port *port)
915 {
916 return 0;
917 }
918
919 /*
920 * Configure/autoconfigure the port.
921 */
922 static void bfin_serial_config_port(struct uart_port *port, int flags)
923 {
924 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
925
926 if (flags & UART_CONFIG_TYPE &&
927 bfin_serial_request_port(&uart->port) == 0)
928 uart->port.type = PORT_BFIN;
929 }
930
931 /*
932 * Verify the new serial_struct (for TIOCSSERIAL).
933 * The only change we allow are to the flags and type, and
934 * even then only between PORT_BFIN and PORT_UNKNOWN
935 */
936 static int
937 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
938 {
939 return 0;
940 }
941
942 /*
943 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
944 * In other cases, disable IrDA function.
945 */
946 static void bfin_serial_set_ldisc(struct uart_port *port,
947 struct ktermios *termios)
948 {
949 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
950 unsigned int val;
951
952 switch (termios->c_line) {
953 case N_IRDA:
954 val = UART_GET_GCTL(uart);
955 val |= (UMOD_IRDA | RPOLC);
956 UART_PUT_GCTL(uart, val);
957 break;
958 default:
959 val = UART_GET_GCTL(uart);
960 val &= ~(UMOD_MASK | RPOLC);
961 UART_PUT_GCTL(uart, val);
962 }
963 }
964
965 static void bfin_serial_reset_irda(struct uart_port *port)
966 {
967 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
968 unsigned int val;
969
970 val = UART_GET_GCTL(uart);
971 val &= ~(UMOD_MASK | RPOLC);
972 UART_PUT_GCTL(uart, val);
973 SSYNC();
974 val |= (UMOD_IRDA | RPOLC);
975 UART_PUT_GCTL(uart, val);
976 SSYNC();
977 }
978
979 #ifdef CONFIG_CONSOLE_POLL
980 /* Anomaly notes:
981 * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
982 * losing other bits of UART_LSR is not a problem here.
983 */
984 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
985 {
986 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
987
988 while (!(UART_GET_LSR(uart) & THRE))
989 cpu_relax();
990
991 UART_CLEAR_DLAB(uart);
992 UART_PUT_CHAR(uart, (unsigned char)chr);
993 }
994
995 static int bfin_serial_poll_get_char(struct uart_port *port)
996 {
997 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
998 unsigned char chr;
999
1000 while (!(UART_GET_LSR(uart) & DR))
1001 cpu_relax();
1002
1003 UART_CLEAR_DLAB(uart);
1004 chr = UART_GET_CHAR(uart);
1005
1006 return chr;
1007 }
1008 #endif
1009
1010 static struct uart_ops bfin_serial_pops = {
1011 .tx_empty = bfin_serial_tx_empty,
1012 .set_mctrl = bfin_serial_set_mctrl,
1013 .get_mctrl = bfin_serial_get_mctrl,
1014 .stop_tx = bfin_serial_stop_tx,
1015 .start_tx = bfin_serial_start_tx,
1016 .stop_rx = bfin_serial_stop_rx,
1017 .break_ctl = bfin_serial_break_ctl,
1018 .startup = bfin_serial_startup,
1019 .shutdown = bfin_serial_shutdown,
1020 .set_termios = bfin_serial_set_termios,
1021 .set_ldisc = bfin_serial_set_ldisc,
1022 .type = bfin_serial_type,
1023 .release_port = bfin_serial_release_port,
1024 .request_port = bfin_serial_request_port,
1025 .config_port = bfin_serial_config_port,
1026 .verify_port = bfin_serial_verify_port,
1027 #ifdef CONFIG_CONSOLE_POLL
1028 .poll_put_char = bfin_serial_poll_put_char,
1029 .poll_get_char = bfin_serial_poll_get_char,
1030 #endif
1031 };
1032
1033 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1034 /*
1035 * If the port was already initialised (eg, by a boot loader),
1036 * try to determine the current setup.
1037 */
1038 static void __init
1039 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1040 int *parity, int *bits)
1041 {
1042 unsigned int status;
1043
1044 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1045 if (status == (ERBFI | ETBEI)) {
1046 /* ok, the port was enabled */
1047 u32 lcr, clk;
1048
1049 lcr = UART_GET_LCR(uart);
1050
1051 *parity = 'n';
1052 if (lcr & PEN) {
1053 if (lcr & EPS)
1054 *parity = 'e';
1055 else
1056 *parity = 'o';
1057 }
1058 *bits = ((lcr & WLS_MASK) >> WLS_OFFSET) + 5;
1059
1060 /* Set DLAB in LCR to Access CLK */
1061 UART_SET_DLAB(uart);
1062
1063 clk = UART_GET_CLK(uart);
1064
1065 /* Clear DLAB in LCR to Access THR RBR IER */
1066 UART_CLEAR_DLAB(uart);
1067
1068 *baud = get_sclk() / (16*clk);
1069 }
1070 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1071 }
1072
1073 static struct uart_driver bfin_serial_reg;
1074
1075 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1076 {
1077 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1078 while (!(UART_GET_LSR(uart) & THRE))
1079 barrier();
1080 UART_PUT_CHAR(uart, ch);
1081 }
1082
1083 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1084 defined (CONFIG_EARLY_PRINTK) */
1085
1086 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1087 #define CLASS_BFIN_CONSOLE "bfin-console"
1088 /*
1089 * Interrupts are disabled on entering
1090 */
1091 static void
1092 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1093 {
1094 struct bfin_serial_port *uart = bfin_serial_ports[co->index];
1095 unsigned long flags;
1096
1097 spin_lock_irqsave(&uart->port.lock, flags);
1098 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1099 spin_unlock_irqrestore(&uart->port.lock, flags);
1100
1101 }
1102
1103 static int __init
1104 bfin_serial_console_setup(struct console *co, char *options)
1105 {
1106 struct bfin_serial_port *uart;
1107 int baud = 57600;
1108 int bits = 8;
1109 int parity = 'n';
1110 # if defined(SERIAL_BFIN_CTSRTS) || \
1111 defined(SERIAL_BFIN_HARD_CTSRTS)
1112 int flow = 'r';
1113 # else
1114 int flow = 'n';
1115 # endif
1116
1117 /*
1118 * Check whether an invalid uart number has been specified, and
1119 * if so, search for the first available port that does have
1120 * console support.
1121 */
1122 if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
1123 return -ENODEV;
1124
1125 uart = bfin_serial_ports[co->index];
1126 if (!uart)
1127 return -ENODEV;
1128
1129 if (options)
1130 uart_parse_options(options, &baud, &parity, &bits, &flow);
1131 else
1132 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1133
1134 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1135 }
1136
1137 static struct console bfin_serial_console = {
1138 .name = BFIN_SERIAL_DEV_NAME,
1139 .write = bfin_serial_console_write,
1140 .device = uart_console_device,
1141 .setup = bfin_serial_console_setup,
1142 .flags = CON_PRINTBUFFER,
1143 .index = -1,
1144 .data = &bfin_serial_reg,
1145 };
1146 #define BFIN_SERIAL_CONSOLE (&bfin_serial_console)
1147 #else
1148 #define BFIN_SERIAL_CONSOLE NULL
1149 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1150
1151 #ifdef CONFIG_EARLY_PRINTK
1152 static struct bfin_serial_port bfin_earlyprintk_port;
1153 #define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
1154
1155 /*
1156 * Interrupts are disabled on entering
1157 */
1158 static void
1159 bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1160 {
1161 unsigned long flags;
1162
1163 if (bfin_earlyprintk_port.port.line != co->index)
1164 return;
1165
1166 spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
1167 uart_console_write(&bfin_earlyprintk_port.port, s, count,
1168 bfin_serial_console_putchar);
1169 spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1170 }
1171
1172 /*
1173 * This should have a .setup or .early_setup in it, but then things get called
1174 * without the command line options, and the baud rate gets messed up - so
1175 * don't let the common infrastructure play with things. (see calls to setup
1176 * & earlysetup in ./kernel/printk.c:register_console()
1177 */
1178 static struct console bfin_early_serial_console __initdata = {
1179 .name = "early_BFuart",
1180 .write = bfin_earlyprintk_console_write,
1181 .device = uart_console_device,
1182 .flags = CON_PRINTBUFFER,
1183 .index = -1,
1184 .data = &bfin_serial_reg,
1185 };
1186 #endif
1187
1188 static struct uart_driver bfin_serial_reg = {
1189 .owner = THIS_MODULE,
1190 .driver_name = DRIVER_NAME,
1191 .dev_name = BFIN_SERIAL_DEV_NAME,
1192 .major = BFIN_SERIAL_MAJOR,
1193 .minor = BFIN_SERIAL_MINOR,
1194 .nr = BFIN_UART_NR_PORTS,
1195 .cons = BFIN_SERIAL_CONSOLE,
1196 };
1197
1198 static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
1199 {
1200 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1201
1202 return uart_suspend_port(&bfin_serial_reg, &uart->port);
1203 }
1204
1205 static int bfin_serial_resume(struct platform_device *pdev)
1206 {
1207 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1208
1209 return uart_resume_port(&bfin_serial_reg, &uart->port);
1210 }
1211
1212 static int bfin_serial_probe(struct platform_device *pdev)
1213 {
1214 struct resource *res;
1215 struct bfin_serial_port *uart = NULL;
1216 int ret = 0;
1217
1218 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1219 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
1220 return -ENOENT;
1221 }
1222
1223 if (bfin_serial_ports[pdev->id] == NULL) {
1224
1225 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
1226 if (!uart) {
1227 dev_err(&pdev->dev,
1228 "fail to malloc bfin_serial_port\n");
1229 return -ENOMEM;
1230 }
1231 bfin_serial_ports[pdev->id] = uart;
1232
1233 #ifdef CONFIG_EARLY_PRINTK
1234 if (!(bfin_earlyprintk_port.port.membase
1235 && bfin_earlyprintk_port.port.line == pdev->id)) {
1236 /*
1237 * If the peripheral PINs of current port is allocated
1238 * in earlyprintk probe stage, don't do it again.
1239 */
1240 #endif
1241 ret = peripheral_request_list(
1242 dev_get_platdata(&pdev->dev),
1243 DRIVER_NAME);
1244 if (ret) {
1245 dev_err(&pdev->dev,
1246 "fail to request bfin serial peripherals\n");
1247 goto out_error_free_mem;
1248 }
1249 #ifdef CONFIG_EARLY_PRINTK
1250 }
1251 #endif
1252
1253 spin_lock_init(&uart->port.lock);
1254 uart->port.uartclk = get_sclk();
1255 uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1256 uart->port.ops = &bfin_serial_pops;
1257 uart->port.line = pdev->id;
1258 uart->port.iotype = UPIO_MEM;
1259 uart->port.flags = UPF_BOOT_AUTOCONF;
1260
1261 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1262 if (res == NULL) {
1263 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1264 ret = -ENOENT;
1265 goto out_error_free_peripherals;
1266 }
1267
1268 uart->port.membase = ioremap(res->start, resource_size(res));
1269 if (!uart->port.membase) {
1270 dev_err(&pdev->dev, "Cannot map uart IO\n");
1271 ret = -ENXIO;
1272 goto out_error_free_peripherals;
1273 }
1274 uart->port.mapbase = res->start;
1275
1276 uart->tx_irq = platform_get_irq(pdev, 0);
1277 if (uart->tx_irq < 0) {
1278 dev_err(&pdev->dev, "No uart TX IRQ specified\n");
1279 ret = -ENOENT;
1280 goto out_error_unmap;
1281 }
1282
1283 uart->rx_irq = platform_get_irq(pdev, 1);
1284 if (uart->rx_irq < 0) {
1285 dev_err(&pdev->dev, "No uart RX IRQ specified\n");
1286 ret = -ENOENT;
1287 goto out_error_unmap;
1288 }
1289 uart->port.irq = uart->rx_irq;
1290
1291 uart->status_irq = platform_get_irq(pdev, 2);
1292 if (uart->status_irq < 0) {
1293 dev_err(&pdev->dev, "No uart status IRQ specified\n");
1294 ret = -ENOENT;
1295 goto out_error_unmap;
1296 }
1297
1298 #ifdef CONFIG_SERIAL_BFIN_DMA
1299 spin_lock_init(&uart->rx_lock);
1300 uart->tx_done = 1;
1301 uart->tx_count = 0;
1302
1303 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1304 if (res == NULL) {
1305 dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
1306 ret = -ENOENT;
1307 goto out_error_unmap;
1308 }
1309 uart->tx_dma_channel = res->start;
1310
1311 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1312 if (res == NULL) {
1313 dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
1314 ret = -ENOENT;
1315 goto out_error_unmap;
1316 }
1317 uart->rx_dma_channel = res->start;
1318
1319 init_timer(&(uart->rx_dma_timer));
1320 #endif
1321
1322 #if defined(SERIAL_BFIN_CTSRTS) || \
1323 defined(SERIAL_BFIN_HARD_CTSRTS)
1324 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1325 if (res == NULL)
1326 uart->cts_pin = -1;
1327 else
1328 uart->cts_pin = res->start;
1329
1330 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1331 if (res == NULL)
1332 uart->rts_pin = -1;
1333 else
1334 uart->rts_pin = res->start;
1335 #endif
1336 }
1337
1338 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1339 if (!is_early_platform_device(pdev)) {
1340 #endif
1341 uart = bfin_serial_ports[pdev->id];
1342 uart->port.dev = &pdev->dev;
1343 dev_set_drvdata(&pdev->dev, uart);
1344 ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
1345 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1346 }
1347 #endif
1348
1349 if (!ret)
1350 return 0;
1351
1352 if (uart) {
1353 out_error_unmap:
1354 iounmap(uart->port.membase);
1355 out_error_free_peripherals:
1356 peripheral_free_list(dev_get_platdata(&pdev->dev));
1357 out_error_free_mem:
1358 kfree(uart);
1359 bfin_serial_ports[pdev->id] = NULL;
1360 }
1361
1362 return ret;
1363 }
1364
1365 static int bfin_serial_remove(struct platform_device *pdev)
1366 {
1367 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1368
1369 dev_set_drvdata(&pdev->dev, NULL);
1370
1371 if (uart) {
1372 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1373 iounmap(uart->port.membase);
1374 peripheral_free_list(dev_get_platdata(&pdev->dev));
1375 kfree(uart);
1376 bfin_serial_ports[pdev->id] = NULL;
1377 }
1378
1379 return 0;
1380 }
1381
1382 static struct platform_driver bfin_serial_driver = {
1383 .probe = bfin_serial_probe,
1384 .remove = bfin_serial_remove,
1385 .suspend = bfin_serial_suspend,
1386 .resume = bfin_serial_resume,
1387 .driver = {
1388 .name = DRIVER_NAME,
1389 },
1390 };
1391
1392 #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1393 static struct early_platform_driver early_bfin_serial_driver __initdata = {
1394 .class_str = CLASS_BFIN_CONSOLE,
1395 .pdrv = &bfin_serial_driver,
1396 .requested_id = EARLY_PLATFORM_ID_UNSET,
1397 };
1398
1399 static int __init bfin_serial_rs_console_init(void)
1400 {
1401 early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
1402
1403 early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
1404
1405 register_console(&bfin_serial_console);
1406
1407 return 0;
1408 }
1409 console_initcall(bfin_serial_rs_console_init);
1410 #endif
1411
1412 #ifdef CONFIG_EARLY_PRINTK
1413 /*
1414 * Memory can't be allocated dynamically during earlyprink init stage.
1415 * So, do individual probe for earlyprink with a static uart port variable.
1416 */
1417 static int bfin_earlyprintk_probe(struct platform_device *pdev)
1418 {
1419 struct resource *res;
1420 int ret;
1421
1422 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1423 dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
1424 return -ENOENT;
1425 }
1426
1427 ret = peripheral_request_list(dev_get_platdata(&pdev->dev),
1428 DRIVER_NAME);
1429 if (ret) {
1430 dev_err(&pdev->dev,
1431 "fail to request bfin serial peripherals\n");
1432 return ret;
1433 }
1434
1435 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1436 if (res == NULL) {
1437 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1438 ret = -ENOENT;
1439 goto out_error_free_peripherals;
1440 }
1441
1442 bfin_earlyprintk_port.port.membase = ioremap(res->start,
1443 resource_size(res));
1444 if (!bfin_earlyprintk_port.port.membase) {
1445 dev_err(&pdev->dev, "Cannot map uart IO\n");
1446 ret = -ENXIO;
1447 goto out_error_free_peripherals;
1448 }
1449 bfin_earlyprintk_port.port.mapbase = res->start;
1450 bfin_earlyprintk_port.port.line = pdev->id;
1451 bfin_earlyprintk_port.port.uartclk = get_sclk();
1452 bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1453 spin_lock_init(&bfin_earlyprintk_port.port.lock);
1454
1455 return 0;
1456
1457 out_error_free_peripherals:
1458 peripheral_free_list(dev_get_platdata(&pdev->dev));
1459
1460 return ret;
1461 }
1462
1463 static struct platform_driver bfin_earlyprintk_driver = {
1464 .probe = bfin_earlyprintk_probe,
1465 .driver = {
1466 .name = DRIVER_NAME,
1467 .owner = THIS_MODULE,
1468 },
1469 };
1470
1471 static struct early_platform_driver early_bfin_earlyprintk_driver __initdata = {
1472 .class_str = CLASS_BFIN_EARLYPRINTK,
1473 .pdrv = &bfin_earlyprintk_driver,
1474 .requested_id = EARLY_PLATFORM_ID_UNSET,
1475 };
1476
1477 struct console __init *bfin_earlyserial_init(unsigned int port,
1478 unsigned int cflag)
1479 {
1480 struct ktermios t;
1481 char port_name[20];
1482
1483 if (port < 0 || port >= BFIN_UART_NR_PORTS)
1484 return NULL;
1485
1486 /*
1487 * Only probe resource of the given port in earlyprintk boot arg.
1488 * The expected port id should be indicated in port name string.
1489 */
1490 snprintf(port_name, 20, DRIVER_NAME ".%d", port);
1491 early_platform_driver_register(&early_bfin_earlyprintk_driver,
1492 port_name);
1493 early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
1494
1495 if (!bfin_earlyprintk_port.port.membase)
1496 return NULL;
1497
1498 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1499 /*
1500 * If we are using early serial, don't let the normal console rewind
1501 * log buffer, since that causes things to be printed multiple times
1502 */
1503 bfin_serial_console.flags &= ~CON_PRINTBUFFER;
1504 #endif
1505
1506 bfin_early_serial_console.index = port;
1507 t.c_cflag = cflag;
1508 t.c_iflag = 0;
1509 t.c_oflag = 0;
1510 t.c_lflag = ICANON;
1511 t.c_line = port;
1512 bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
1513
1514 return &bfin_early_serial_console;
1515 }
1516 #endif /* CONFIG_EARLY_PRINTK */
1517
1518 static int __init bfin_serial_init(void)
1519 {
1520 int ret;
1521
1522 pr_info("Blackfin serial driver\n");
1523
1524 ret = uart_register_driver(&bfin_serial_reg);
1525 if (ret) {
1526 pr_err("failed to register %s:%d\n",
1527 bfin_serial_reg.driver_name, ret);
1528 }
1529
1530 ret = platform_driver_register(&bfin_serial_driver);
1531 if (ret) {
1532 pr_err("fail to register bfin uart\n");
1533 uart_unregister_driver(&bfin_serial_reg);
1534 }
1535
1536 return ret;
1537 }
1538
1539 static void __exit bfin_serial_exit(void)
1540 {
1541 platform_driver_unregister(&bfin_serial_driver);
1542 uart_unregister_driver(&bfin_serial_reg);
1543 }
1544
1545
1546 module_init(bfin_serial_init);
1547 module_exit(bfin_serial_exit);
1548
1549 MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
1550 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1551 MODULE_LICENSE("GPL");
1552 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1553 MODULE_ALIAS("platform:bfin-uart");
Linux with added FPC-III support