sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / tty / serial / crisv10.h
blob15a52ee5825116adb490857b6d15066977827c3f
1 /*
2 * serial.h: Arch-dep definitions for the Etrax100 serial driver.
4 * Copyright (C) 1998-2007 Axis Communications AB
5 */
7 #ifndef _ETRAX_SERIAL_H
8 #define _ETRAX_SERIAL_H
10 #include <linux/circ_buf.h>
11 #include <asm/termios.h>
12 #include <asm/dma.h>
13 #include <arch/io_interface_mux.h>
15 /* Software state per channel */
17 #ifdef __KERNEL__
19 * This is our internal structure for each serial port's state.
21 * Many fields are paralleled by the structure used by the serial_struct
22 * structure.
24 * For definitions of the flags field, see tty.h
27 #define SERIAL_RECV_DESCRIPTORS 8
29 struct etrax_recv_buffer {
30 struct etrax_recv_buffer *next;
31 unsigned short length;
32 unsigned char error;
33 unsigned char pad;
35 unsigned char buffer[0];
38 struct e100_serial {
39 struct tty_port port;
40 int baud;
41 volatile u8 *ioport; /* R_SERIALx_CTRL */
42 u32 irq; /* bitnr in R_IRQ_MASK2 for dmaX_descr */
44 /* Output registers */
45 volatile u8 *oclrintradr; /* adr to R_DMA_CHx_CLR_INTR */
46 volatile u32 *ofirstadr; /* adr to R_DMA_CHx_FIRST */
47 volatile u8 *ocmdadr; /* adr to R_DMA_CHx_CMD */
48 const volatile u8 *ostatusadr; /* adr to R_DMA_CHx_STATUS */
50 /* Input registers */
51 volatile u8 *iclrintradr; /* adr to R_DMA_CHx_CLR_INTR */
52 volatile u32 *ifirstadr; /* adr to R_DMA_CHx_FIRST */
53 volatile u8 *icmdadr; /* adr to R_DMA_CHx_CMD */
54 volatile u32 *idescradr; /* adr to R_DMA_CHx_DESCR */
56 u8 rx_ctrl; /* shadow for R_SERIALx_REC_CTRL */
57 u8 tx_ctrl; /* shadow for R_SERIALx_TR_CTRL */
58 u8 iseteop; /* bit number for R_SET_EOP for the input dma */
59 int enabled; /* Set to 1 if the port is enabled in HW config */
61 u8 dma_out_enabled; /* Set to 1 if DMA should be used */
62 u8 dma_in_enabled; /* Set to 1 if DMA should be used */
64 /* end of fields defined in rs_table[] in .c-file */
65 int dma_owner;
66 unsigned int dma_in_nbr;
67 unsigned int dma_out_nbr;
68 unsigned int dma_in_irq_nbr;
69 unsigned int dma_out_irq_nbr;
70 unsigned long dma_in_irq_flags;
71 unsigned long dma_out_irq_flags;
72 char *dma_in_irq_description;
73 char *dma_out_irq_description;
75 enum cris_io_interface io_if;
76 char *io_if_description;
78 u8 uses_dma_in; /* Set to 1 if DMA is used */
79 u8 uses_dma_out; /* Set to 1 if DMA is used */
80 u8 forced_eop; /* a fifo eop has been forced */
81 int baud_base; /* For special baudrates */
82 int custom_divisor; /* For special baudrates */
83 struct etrax_dma_descr tr_descr;
84 struct etrax_dma_descr rec_descr[SERIAL_RECV_DESCRIPTORS];
85 int cur_rec_descr;
87 volatile int tr_running; /* 1 if output is running */
89 int x_char; /* xon/xoff character */
90 unsigned long event;
91 int line;
92 int type; /* PORT_ETRAX */
93 struct circ_buf xmit;
94 struct etrax_recv_buffer *first_recv_buffer;
95 struct etrax_recv_buffer *last_recv_buffer;
96 unsigned int recv_cnt;
97 unsigned int max_recv_cnt;
99 struct work_struct work;
100 struct async_icount icount; /* error-statistics etc.*/
102 unsigned long char_time_usec; /* The time for 1 char, in usecs */
103 unsigned long flush_time_usec; /* How often we should flush */
104 unsigned long last_tx_active_usec; /* Last tx usec in the jiffies */
105 unsigned long last_tx_active; /* Last tx time in jiffies */
106 unsigned long last_rx_active_usec; /* Last rx usec in the jiffies */
107 unsigned long last_rx_active; /* Last rx time in jiffies */
109 int break_detected_cnt;
110 int errorcode;
112 #ifdef CONFIG_ETRAX_RS485
113 struct serial_rs485 rs485; /* RS-485 support */
114 #endif
117 /* this PORT is not in the standard serial.h. it's not actually used for
118 * anything since we only have one type of async serial-port anyway in this
119 * system.
122 #define PORT_ETRAX 1
125 * Events are used to schedule things to happen at timer-interrupt
126 * time, instead of at rs interrupt time.
128 #define RS_EVENT_WRITE_WAKEUP 0
130 #endif /* __KERNEL__ */
132 #endif /* !_ETRAX_SERIAL_H */