sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / tty / serial / samsung.h
bloba04acef1cb20f0f80cf18d08be3a6fbba409b946
1 #ifndef __SAMSUNG_H
2 #define __SAMSUNG_H
4 /*
5 * Driver for Samsung SoC onboard UARTs.
7 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/dmaengine.h>
17 struct s3c24xx_uart_info {
18 char *name;
19 unsigned int type;
20 unsigned int fifosize;
21 unsigned long rx_fifomask;
22 unsigned long rx_fifoshift;
23 unsigned long rx_fifofull;
24 unsigned long tx_fifomask;
25 unsigned long tx_fifoshift;
26 unsigned long tx_fifofull;
27 unsigned int def_clk_sel;
28 unsigned long num_clks;
29 unsigned long clksel_mask;
30 unsigned long clksel_shift;
32 /* uart port features */
34 unsigned int has_divslot:1;
36 /* uart controls */
37 int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *);
40 struct s3c24xx_serial_drv_data {
41 struct s3c24xx_uart_info *info;
42 struct s3c2410_uartcfg *def_cfg;
43 unsigned int fifosize[CONFIG_SERIAL_SAMSUNG_UARTS];
46 struct s3c24xx_uart_dma {
47 dma_filter_fn fn;
48 void *rx_param;
49 void *tx_param;
51 unsigned int rx_chan_id;
52 unsigned int tx_chan_id;
54 struct dma_slave_config rx_conf;
55 struct dma_slave_config tx_conf;
57 struct dma_chan *rx_chan;
58 struct dma_chan *tx_chan;
60 dma_addr_t rx_addr;
61 dma_addr_t tx_addr;
63 dma_cookie_t rx_cookie;
64 dma_cookie_t tx_cookie;
66 char *rx_buf;
68 dma_addr_t tx_transfer_addr;
70 size_t rx_size;
71 size_t tx_size;
73 struct dma_async_tx_descriptor *tx_desc;
74 struct dma_async_tx_descriptor *rx_desc;
76 int tx_bytes_requested;
77 int rx_bytes_requested;
80 struct s3c24xx_uart_port {
81 unsigned char rx_claimed;
82 unsigned char tx_claimed;
83 unsigned int pm_level;
84 unsigned long baudclk_rate;
85 unsigned int min_dma_size;
87 unsigned int rx_irq;
88 unsigned int tx_irq;
90 unsigned int tx_in_progress;
91 unsigned int tx_mode;
92 unsigned int rx_mode;
94 struct s3c24xx_uart_info *info;
95 struct clk *clk;
96 struct clk *baudclk;
97 struct uart_port port;
98 struct s3c24xx_serial_drv_data *drv_data;
100 /* reference to platform data */
101 struct s3c2410_uartcfg *cfg;
103 struct s3c24xx_uart_dma *dma;
105 #ifdef CONFIG_ARM_S3C24XX_CPUFREQ
106 struct notifier_block freq_transition;
107 #endif
110 /* conversion functions */
112 #define s3c24xx_dev_to_port(__dev) dev_get_drvdata(__dev)
114 /* register access controls */
116 #define portaddr(port, reg) ((port)->membase + (reg))
117 #define portaddrl(port, reg) \
118 ((unsigned long *)(unsigned long)((port)->membase + (reg)))
120 #define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg)))
121 #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg)))
123 #define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, reg))
124 #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, reg))
126 /* Byte-order aware bit setting/clearing functions. */
128 static inline void s3c24xx_set_bit(struct uart_port *port, int idx,
129 unsigned int reg)
131 unsigned long flags;
132 u32 val;
134 local_irq_save(flags);
135 val = rd_regl(port, reg);
136 val |= (1 << idx);
137 wr_regl(port, reg, val);
138 local_irq_restore(flags);
141 static inline void s3c24xx_clear_bit(struct uart_port *port, int idx,
142 unsigned int reg)
144 unsigned long flags;
145 u32 val;
147 local_irq_save(flags);
148 val = rd_regl(port, reg);
149 val &= ~(1 << idx);
150 wr_regl(port, reg, val);
151 local_irq_restore(flags);
154 #endif