drivers/tty/serial/timbuart.c

   1 /*
   2  * timbuart.c timberdale FPGA UART driver
   3  * Copyright (c) 2009 Intel Corporation
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 /* Supports:
  20  * Timberdale FPGA UART
  21  */
  22
  23 #include <linux/pci.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/serial_core.h>
  26 #include <linux/tty.h>
  27 #include <linux/tty_flip.h>
  28 #include <linux/kernel.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/ioport.h>
  31 #include <linux/slab.h>
  32 #include <linux/module.h>
  33
  34 #include "timbuart.h"
  35
  36 struct timbuart_port {
  37         struct uart_port        port;
  38         struct tasklet_struct   tasklet;
  39         int                     usedma;
  40         u32                     last_ier;
  41         struct platform_device  *dev;
  42 };
  43
  44 static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
  45         921600, 1843200, 3250000};
  46
  47 static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);
  48
  49 static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
  50
  51 static void timbuart_stop_rx(struct uart_port *port)
  52 {
  53         /* spin lock held by upper layer, disable all RX interrupts */
  54         u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
  55         iowrite32(ier, port->membase + TIMBUART_IER);
  56 }
  57
  58 static void timbuart_stop_tx(struct uart_port *port)
  59 {
  60         /* spinlock held by upper layer, disable TX interrupt */
  61         u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
  62         iowrite32(ier, port->membase + TIMBUART_IER);
  63 }
  64
  65 static void timbuart_start_tx(struct uart_port *port)
  66 {
  67         struct timbuart_port *uart =
  68                 container_of(port, struct timbuart_port, port);
  69
  70         /* do not transfer anything here -> fire off the tasklet */
  71         tasklet_schedule(&uart->tasklet);
  72 }
  73
  74 static unsigned int timbuart_tx_empty(struct uart_port *port)
  75 {
  76         u32 isr = ioread32(port->membase + TIMBUART_ISR);
  77
  78         return (isr & TXBE) ? TIOCSER_TEMT : 0;
  79 }
  80
  81 static void timbuart_flush_buffer(struct uart_port *port)
  82 {
  83         if (!timbuart_tx_empty(port)) {
  84                 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
  85                         TIMBUART_CTRL_FLSHTX;
  86
  87                 iowrite8(ctl, port->membase + TIMBUART_CTRL);
  88                 iowrite32(TXBF, port->membase + TIMBUART_ISR);
  89         }
  90 }
  91
  92 static void timbuart_rx_chars(struct uart_port *port)
  93 {
  94         struct tty_port *tport = &port->state->port;
  95
  96         while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
  97                 u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
  98                 port->icount.rx++;
  99                 tty_insert_flip_char(tport, ch, TTY_NORMAL);
 100         }
 101
 102         spin_unlock(&port->lock);
 103         tty_flip_buffer_push(tport);
 104         spin_lock(&port->lock);
 105
 106         dev_dbg(port->dev, "%s - total read %d bytes\n",
 107                 __func__, port->icount.rx);
 108 }
 109
 110 static void timbuart_tx_chars(struct uart_port *port)
 111 {
 112         struct circ_buf *xmit = &port->state->xmit;
 113
 114         while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
 115                 !uart_circ_empty(xmit)) {
 116                 iowrite8(xmit->buf[xmit->tail],
 117                         port->membase + TIMBUART_TXFIFO);
 118                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 119                 port->icount.tx++;
 120         }
 121
 122         dev_dbg(port->dev,
 123                 "%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
 124                  __func__,
 125                 port->icount.tx,
 126                 ioread8(port->membase + TIMBUART_CTRL),
 127                 port->mctrl & TIOCM_RTS,
 128                 ioread8(port->membase + TIMBUART_BAUDRATE));
 129 }
 130
 131 static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
 132 {
 133         struct timbuart_port *uart =
 134                 container_of(port, struct timbuart_port, port);
 135         struct circ_buf *xmit = &port->state->xmit;
 136
 137         if (uart_circ_empty(xmit) || uart_tx_stopped(port))
 138                 return;
 139
 140         if (port->x_char)
 141                 return;
 142
 143         if (isr & TXFLAGS) {
 144                 timbuart_tx_chars(port);
 145                 /* clear all TX interrupts */
 146                 iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
 147
 148                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 149                         uart_write_wakeup(port);
 150         } else
 151                 /* Re-enable any tx interrupt */
 152                 *ier |= uart->last_ier & TXFLAGS;
 153
 154         /* enable interrupts if there are chars in the transmit buffer,
 155          * Or if we delivered some bytes and want the almost empty interrupt
 156          * we wake up the upper layer later when we got the interrupt
 157          * to give it some time to go out...
 158          */
 159         if (!uart_circ_empty(xmit))
 160                 *ier |= TXBAE;
 161
 162         dev_dbg(port->dev, "%s - leaving\n", __func__);
 163 }
 164
 165 static void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
 166 {
 167         if (isr & RXFLAGS) {
 168                 /* Some RX status is set */
 169                 if (isr & RXBF) {
 170                         u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
 171                                 TIMBUART_CTRL_FLSHRX;
 172                         iowrite8(ctl, port->membase + TIMBUART_CTRL);
 173                         port->icount.overrun++;
 174                 } else if (isr & (RXDP))
 175                         timbuart_rx_chars(port);
 176
 177                 /* ack all RX interrupts */
 178                 iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
 179         }
 180
 181         /* always have the RX interrupts enabled */
 182         *ier |= RXBAF | RXBF | RXTT;
 183
 184         dev_dbg(port->dev, "%s - leaving\n", __func__);
 185 }
 186
 187 static void timbuart_tasklet(unsigned long arg)
 188 {
 189         struct timbuart_port *uart = (struct timbuart_port *)arg;
 190         u32 isr, ier = 0;
 191
 192         spin_lock(&uart->port.lock);
 193
 194         isr = ioread32(uart->port.membase + TIMBUART_ISR);
 195         dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
 196
 197         if (!uart->usedma)
 198                 timbuart_handle_tx_port(&uart->port, isr, &ier);
 199
 200         timbuart_mctrl_check(&uart->port, isr, &ier);
 201
 202         if (!uart->usedma)
 203                 timbuart_handle_rx_port(&uart->port, isr, &ier);
 204
 205         iowrite32(ier, uart->port.membase + TIMBUART_IER);
 206
 207         spin_unlock(&uart->port.lock);
 208         dev_dbg(uart->port.dev, "%s leaving\n", __func__);
 209 }
 210
 211 static unsigned int timbuart_get_mctrl(struct uart_port *port)
 212 {
 213         u8 cts = ioread8(port->membase + TIMBUART_CTRL);
 214         dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);
 215
 216         if (cts & TIMBUART_CTRL_CTS)
 217                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 218         else
 219                 return TIOCM_DSR | TIOCM_CAR;
 220 }
 221
 222 static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 223 {
 224         dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);
 225
 226         if (mctrl & TIOCM_RTS)
 227                 iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
 228         else
 229                 iowrite8(0, port->membase + TIMBUART_CTRL);
 230 }
 231
 232 static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
 233 {
 234         unsigned int cts;
 235
 236         if (isr & CTS_DELTA) {
 237                 /* ack */
 238                 iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
 239                 cts = timbuart_get_mctrl(port);
 240                 uart_handle_cts_change(port, cts & TIOCM_CTS);
 241                 wake_up_interruptible(&port->state->port.delta_msr_wait);
 242         }
 243
 244         *ier |= CTS_DELTA;
 245 }
 246
 247 static void timbuart_break_ctl(struct uart_port *port, int ctl)
 248 {
 249         /* N/A */
 250 }
 251
 252 static int timbuart_startup(struct uart_port *port)
 253 {
 254         struct timbuart_port *uart =
 255                 container_of(port, struct timbuart_port, port);
 256
 257         dev_dbg(port->dev, "%s\n", __func__);
 258
 259         iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
 260         iowrite32(0x1ff, port->membase + TIMBUART_ISR);
 261         /* Enable all but TX interrupts */
 262         iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
 263                 port->membase + TIMBUART_IER);
 264
 265         return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
 266                 "timb-uart", uart);
 267 }
 268
 269 static void timbuart_shutdown(struct uart_port *port)
 270 {
 271         struct timbuart_port *uart =
 272                 container_of(port, struct timbuart_port, port);
 273         dev_dbg(port->dev, "%s\n", __func__);
 274         free_irq(port->irq, uart);
 275         iowrite32(0, port->membase + TIMBUART_IER);
 276
 277         timbuart_flush_buffer(port);
 278 }
 279
 280 static int get_bindex(int baud)
 281 {
 282         int i;
 283
 284         for (i = 0; i < ARRAY_SIZE(baudrates); i++)
 285                 if (baud <= baudrates[i])
 286                         return i;
 287
 288         return -1;
 289 }
 290
 291 static void timbuart_set_termios(struct uart_port *port,
 292         struct ktermios *termios,
 293         struct ktermios *old)
 294 {
 295         unsigned int baud;
 296         short bindex;
 297         unsigned long flags;
 298
 299         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 300         bindex = get_bindex(baud);
 301         dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);
 302
 303         if (bindex < 0)
 304                 bindex = 0;
 305         baud = baudrates[bindex];
 306
 307         /* The serial layer calls into this once with old = NULL when setting
 308            up initially */
 309         if (old)
 310                 tty_termios_copy_hw(termios, old);
 311         tty_termios_encode_baud_rate(termios, baud, baud);
 312
 313         spin_lock_irqsave(&port->lock, flags);
 314         iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
 315         uart_update_timeout(port, termios->c_cflag, baud);
 316         spin_unlock_irqrestore(&port->lock, flags);
 317 }
 318
 319 static const char *timbuart_type(struct uart_port *port)
 320 {
 321         return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
 322 }
 323
 324 /* We do not request/release mappings of the registers here,
 325  * currently it's done in the proble function.
 326  */
 327 static void timbuart_release_port(struct uart_port *port)
 328 {
 329         struct platform_device *pdev = to_platform_device(port->dev);
 330         int size =
 331                 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
 332
 333         if (port->flags & UPF_IOREMAP) {
 334                 iounmap(port->membase);
 335                 port->membase = NULL;
 336         }
 337
 338         release_mem_region(port->mapbase, size);
 339 }
 340
 341 static int timbuart_request_port(struct uart_port *port)
 342 {
 343         struct platform_device *pdev = to_platform_device(port->dev);
 344         int size =
 345                 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
 346
 347         if (!request_mem_region(port->mapbase, size, "timb-uart"))
 348                 return -EBUSY;
 349
 350         if (port->flags & UPF_IOREMAP) {
 351                 port->membase = ioremap(port->mapbase, size);
 352                 if (port->membase == NULL) {
 353                         release_mem_region(port->mapbase, size);
 354                         return -ENOMEM;
 355                 }
 356         }
 357
 358         return 0;
 359 }
 360
 361 static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
 362 {
 363         struct timbuart_port *uart = (struct timbuart_port *)devid;
 364
 365         if (ioread8(uart->port.membase + TIMBUART_IPR)) {
 366                 uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
 367
 368                 /* disable interrupts, the tasklet enables them again */
 369                 iowrite32(0, uart->port.membase + TIMBUART_IER);
 370
 371                 /* fire off bottom half */
 372                 tasklet_schedule(&uart->tasklet);
 373
 374                 return IRQ_HANDLED;
 375         } else
 376                 return IRQ_NONE;
 377 }
 378
 379 /*
 380  * Configure/autoconfigure the port.
 381  */
 382 static void timbuart_config_port(struct uart_port *port, int flags)
 383 {
 384         if (flags & UART_CONFIG_TYPE) {
 385                 port->type = PORT_TIMBUART;
 386                 timbuart_request_port(port);
 387         }
 388 }
 389
 390 static int timbuart_verify_port(struct uart_port *port,
 391         struct serial_struct *ser)
 392 {
 393         /* we don't want the core code to modify any port params */
 394         return -EINVAL;
 395 }
 396
 397 static const struct uart_ops timbuart_ops = {
 398         .tx_empty = timbuart_tx_empty,
 399         .set_mctrl = timbuart_set_mctrl,
 400         .get_mctrl = timbuart_get_mctrl,
 401         .stop_tx = timbuart_stop_tx,
 402         .start_tx = timbuart_start_tx,
 403         .flush_buffer = timbuart_flush_buffer,
 404         .stop_rx = timbuart_stop_rx,
 405         .break_ctl = timbuart_break_ctl,
 406         .startup = timbuart_startup,
 407         .shutdown = timbuart_shutdown,
 408         .set_termios = timbuart_set_termios,
 409         .type = timbuart_type,
 410         .release_port = timbuart_release_port,
 411         .request_port = timbuart_request_port,
 412         .config_port = timbuart_config_port,
 413         .verify_port = timbuart_verify_port
 414 };
 415
 416 static struct uart_driver timbuart_driver = {
 417         .owner = THIS_MODULE,
 418         .driver_name = "timberdale_uart",
 419         .dev_name = "ttyTU",
 420         .major = TIMBUART_MAJOR,
 421         .minor = TIMBUART_MINOR,
 422         .nr = 1
 423 };
 424
 425 static int timbuart_probe(struct platform_device *dev)
 426 {
 427         int err, irq;
 428         struct timbuart_port *uart;
 429         struct resource *iomem;
 430
 431         dev_dbg(&dev->dev, "%s\n", __func__);
 432
 433         uart = kzalloc(sizeof(*uart), GFP_KERNEL);
 434         if (!uart) {
 435                 err = -EINVAL;
 436                 goto err_mem;
 437         }
 438
 439         uart->usedma = 0;
 440
 441         uart->port.uartclk = 3250000 * 16;
 442         uart->port.fifosize  = TIMBUART_FIFO_SIZE;
 443         uart->port.regshift  = 2;
 444         uart->port.iotype  = UPIO_MEM;
 445         uart->port.ops = &timbuart_ops;
 446         uart->port.irq = 0;
 447         uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
 448         uart->port.line  = 0;
 449         uart->port.dev  = &dev->dev;
 450
 451         iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
 452         if (!iomem) {
 453                 err = -ENOMEM;
 454                 goto err_register;
 455         }
 456         uart->port.mapbase = iomem->start;
 457         uart->port.membase = NULL;
 458
 459         irq = platform_get_irq(dev, 0);
 460         if (irq < 0) {
 461                 err = -EINVAL;
 462                 goto err_register;
 463         }
 464         uart->port.irq = irq;
 465
 466         tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);
 467
 468         err = uart_register_driver(&timbuart_driver);
 469         if (err)
 470                 goto err_register;
 471
 472         err = uart_add_one_port(&timbuart_driver, &uart->port);
 473         if (err)
 474                 goto err_add_port;
 475
 476         platform_set_drvdata(dev, uart);
 477
 478         return 0;
 479
 480 err_add_port:
 481         uart_unregister_driver(&timbuart_driver);
 482 err_register:
 483         kfree(uart);
 484 err_mem:
 485         printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
 486                 err);
 487
 488         return err;
 489 }
 490
 491 static int timbuart_remove(struct platform_device *dev)
 492 {
 493         struct timbuart_port *uart = platform_get_drvdata(dev);
 494
 495         tasklet_kill(&uart->tasklet);
 496         uart_remove_one_port(&timbuart_driver, &uart->port);
 497         uart_unregister_driver(&timbuart_driver);
 498         kfree(uart);
 499
 500         return 0;
 501 }
 502
 503 static struct platform_driver timbuart_platform_driver = {
 504         .driver = {
 505                 .name   = "timb-uart",
 506         },
 507         .probe          = timbuart_probe,
 508         .remove         = timbuart_remove,
 509 };
 510
 511 module_platform_driver(timbuart_platform_driver);
 512
 513 MODULE_DESCRIPTION("Timberdale UART driver");
 514 MODULE_LICENSE("GPL v2");
 515 MODULE_ALIAS("platform:timb-uart");
 516