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sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / video / fbdev / imxfb.c
blobfe0c4eeff2e4f1f11442272d03e3c784db06d49f
1 /*
2 * Freescale i.MX Frame Buffer device driver
3 *
4 * Copyright (C) 2004 Sascha Hauer, Pengutronix
5 * Based on acornfb.c Copyright (C) Russell King.
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
9 * more details.
10 *
11 * Please direct your questions and comments on this driver to the following
12 * email address:
13 *
14 * linux-arm-kernel@lists.arm.linux.org.uk
15 */
16
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/errno.h>
20 #include <linux/string.h>
21 #include <linux/interrupt.h>
22 #include <linux/slab.h>
23 #include <linux/mm.h>
24 #include <linux/fb.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/ioport.h>
28 #include <linux/cpufreq.h>
29 #include <linux/clk.h>
30 #include <linux/platform_device.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/io.h>
33 #include <linux/lcd.h>
34 #include <linux/math64.h>
35 #include <linux/of.h>
36 #include <linux/of_device.h>
37
38 #include <linux/regulator/consumer.h>
39
40 #include <video/of_display_timing.h>
41 #include <video/of_videomode.h>
42 #include <video/videomode.h>
43
44 #include <linux/platform_data/video-imxfb.h>
45
46 /*
47 * Complain if VAR is out of range.
48 */
49 #define DEBUG_VAR 1
50
51 #define DRIVER_NAME "imx-fb"
52
53 #define LCDC_SSA 0x00
54
55 #define LCDC_SIZE 0x04
56 #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20)
57
58 #define YMAX_MASK_IMX1 0x1ff
59 #define YMAX_MASK_IMX21 0x3ff
60
61 #define LCDC_VPW 0x08
62 #define VPW_VPW(x) ((x) & 0x3ff)
63
64 #define LCDC_CPOS 0x0C
65 #define CPOS_CC1 (1<<31)
66 #define CPOS_CC0 (1<<30)
67 #define CPOS_OP (1<<28)
68 #define CPOS_CXP(x) (((x) & 3ff) << 16)
69
70 #define LCDC_LCWHB 0x10
71 #define LCWHB_BK_EN (1<<31)
72 #define LCWHB_CW(w) (((w) & 0x1f) << 24)
73 #define LCWHB_CH(h) (((h) & 0x1f) << 16)
74 #define LCWHB_BD(x) ((x) & 0xff)
75
76 #define LCDC_LCHCC 0x14
77
78 #define LCDC_PCR 0x18
79
80 #define LCDC_HCR 0x1C
81 #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26)
82 #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8)
83 #define HCR_H_WAIT_2(x) ((x) & 0xff)
84
85 #define LCDC_VCR 0x20
86 #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26)
87 #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8)
88 #define VCR_V_WAIT_2(x) ((x) & 0xff)
89
90 #define LCDC_POS 0x24
91 #define POS_POS(x) ((x) & 1f)
92
93 #define LCDC_LSCR1 0x28
94 /* bit fields in imxfb.h */
95
96 #define LCDC_PWMR 0x2C
97 /* bit fields in imxfb.h */
98
99 #define LCDC_DMACR 0x30
100 /* bit fields in imxfb.h */
101
102 #define LCDC_RMCR 0x34
103
104 #define RMCR_LCDC_EN_MX1 (1<<1)
105
106 #define RMCR_SELF_REF (1<<0)
107
108 #define LCDC_LCDICR 0x38
109 #define LCDICR_INT_SYN (1<<2)
110 #define LCDICR_INT_CON (1)
111
112 #define LCDC_LCDISR 0x40
113 #define LCDISR_UDR_ERR (1<<3)
114 #define LCDISR_ERR_RES (1<<2)
115 #define LCDISR_EOF (1<<1)
116 #define LCDISR_BOF (1<<0)
117
118 #define IMXFB_LSCR1_DEFAULT 0x00120300
119
120 /* Used fb-mode. Can be set on kernel command line, therefore file-static. */
121 static const char *fb_mode;
122
123 /*
124 * These are the bitfields for each
125 * display depth that we support.
126 */
127 struct imxfb_rgb {
128 struct fb_bitfield red;
129 struct fb_bitfield green;
130 struct fb_bitfield blue;
131 struct fb_bitfield transp;
132 };
133
134 enum imxfb_type {
135 IMX1_FB,
136 IMX21_FB,
137 };
138
139 struct imxfb_info {
140 struct platform_device *pdev;
141 void __iomem *regs;
142 struct clk *clk_ipg;
143 struct clk *clk_ahb;
144 struct clk *clk_per;
145 enum imxfb_type devtype;
146 bool enabled;
147
148 /*
149 * These are the addresses we mapped
150 * the framebuffer memory region to.
151 */
152 dma_addr_t map_dma;
153 u_int map_size;
154
155 u_int palette_size;
156
157 dma_addr_t dbar1;
158 dma_addr_t dbar2;
159
160 u_int pcr;
161 u_int pwmr;
162 u_int lscr1;
163 u_int dmacr;
164 bool cmap_inverse;
165 bool cmap_static;
166
167 struct imx_fb_videomode *mode;
168 int num_modes;
169
170 struct regulator *lcd_pwr;
171 };
172
173 static const struct platform_device_id imxfb_devtype[] = {
174 {
175 .name = "imx1-fb",
176 .driver_data = IMX1_FB,
177 }, {
178 .name = "imx21-fb",
179 .driver_data = IMX21_FB,
180 }, {
181 /* sentinel */
182 }
183 };
184 MODULE_DEVICE_TABLE(platform, imxfb_devtype);
185
186 static const struct of_device_id imxfb_of_dev_id[] = {
187 {
188 .compatible = "fsl,imx1-fb",
189 .data = &imxfb_devtype[IMX1_FB],
190 }, {
191 .compatible = "fsl,imx21-fb",
192 .data = &imxfb_devtype[IMX21_FB],
193 }, {
194 /* sentinel */
195 }
196 };
197 MODULE_DEVICE_TABLE(of, imxfb_of_dev_id);
198
199 static inline int is_imx1_fb(struct imxfb_info *fbi)
200 {
201 return fbi->devtype == IMX1_FB;
202 }
203
204 #define IMX_NAME "IMX"
205
206 /*
207 * Minimum X and Y resolutions
208 */
209 #define MIN_XRES 64
210 #define MIN_YRES 64
211
212 /* Actually this really is 18bit support, the lowest 2 bits of each colour
213 * are unused in hardware. We claim to have 24bit support to make software
214 * like X work, which does not support 18bit.
215 */
216 static struct imxfb_rgb def_rgb_18 = {
217 .red = {.offset = 16, .length = 8,},
218 .green = {.offset = 8, .length = 8,},
219 .blue = {.offset = 0, .length = 8,},
220 .transp = {.offset = 0, .length = 0,},
221 };
222
223 static struct imxfb_rgb def_rgb_16_tft = {
224 .red = {.offset = 11, .length = 5,},
225 .green = {.offset = 5, .length = 6,},
226 .blue = {.offset = 0, .length = 5,},
227 .transp = {.offset = 0, .length = 0,},
228 };
229
230 static struct imxfb_rgb def_rgb_16_stn = {
231 .red = {.offset = 8, .length = 4,},
232 .green = {.offset = 4, .length = 4,},
233 .blue = {.offset = 0, .length = 4,},
234 .transp = {.offset = 0, .length = 0,},
235 };
236
237 static struct imxfb_rgb def_rgb_8 = {
238 .red = {.offset = 0, .length = 8,},
239 .green = {.offset = 0, .length = 8,},
240 .blue = {.offset = 0, .length = 8,},
241 .transp = {.offset = 0, .length = 0,},
242 };
243
244 static int imxfb_activate_var(struct fb_var_screeninfo *var,
245 struct fb_info *info);
246
247 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
248 {
249 chan &= 0xffff;
250 chan >>= 16 - bf->length;
251 return chan << bf->offset;
252 }
253
254 static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
255 u_int trans, struct fb_info *info)
256 {
257 struct imxfb_info *fbi = info->par;
258 u_int val, ret = 1;
259
260 #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
261 if (regno < fbi->palette_size) {
262 val = (CNVT_TOHW(red, 4) << 8) |
263 (CNVT_TOHW(green,4) << 4) |
264 CNVT_TOHW(blue, 4);
265
266 writel(val, fbi->regs + 0x800 + (regno << 2));
267 ret = 0;
268 }
269 return ret;
270 }
271
272 static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
273 u_int trans, struct fb_info *info)
274 {
275 struct imxfb_info *fbi = info->par;
276 unsigned int val;
277 int ret = 1;
278
279 /*
280 * If inverse mode was selected, invert all the colours
281 * rather than the register number. The register number
282 * is what you poke into the framebuffer to produce the
283 * colour you requested.
284 */
285 if (fbi->cmap_inverse) {
286 red = 0xffff - red;
287 green = 0xffff - green;
288 blue = 0xffff - blue;
289 }
290
291 /*
292 * If greyscale is true, then we convert the RGB value
293 * to greyscale no mater what visual we are using.
294 */
295 if (info->var.grayscale)
296 red = green = blue = (19595 * red + 38470 * green +
297 7471 * blue) >> 16;
298
299 switch (info->fix.visual) {
300 case FB_VISUAL_TRUECOLOR:
301 /*
302 * 12 or 16-bit True Colour. We encode the RGB value
303 * according to the RGB bitfield information.
304 */
305 if (regno < 16) {
306 u32 *pal = info->pseudo_palette;
307
308 val = chan_to_field(red, &info->var.red);
309 val |= chan_to_field(green, &info->var.green);
310 val |= chan_to_field(blue, &info->var.blue);
311
312 pal[regno] = val;
313 ret = 0;
314 }
315 break;
316
317 case FB_VISUAL_STATIC_PSEUDOCOLOR:
318 case FB_VISUAL_PSEUDOCOLOR:
319 ret = imxfb_setpalettereg(regno, red, green, blue, trans, info);
320 break;
321 }
322
323 return ret;
324 }
325
326 static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi)
327 {
328 struct imx_fb_videomode *m;
329 int i;
330
331 if (!fb_mode)
332 return &fbi->mode[0];
333
334 for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) {
335 if (!strcmp(m->mode.name, fb_mode))
336 return m;
337 }
338 return NULL;
339 }
340
341 /*
342 * imxfb_check_var():
343 * Round up in the following order: bits_per_pixel, xres,
344 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
345 * bitfields, horizontal timing, vertical timing.
346 */
347 static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
348 {
349 struct imxfb_info *fbi = info->par;
350 struct imxfb_rgb *rgb;
351 const struct imx_fb_videomode *imxfb_mode;
352 unsigned long lcd_clk;
353 unsigned long long tmp;
354 u32 pcr = 0;
355
356 if (var->xres < MIN_XRES)
357 var->xres = MIN_XRES;
358 if (var->yres < MIN_YRES)
359 var->yres = MIN_YRES;
360
361 imxfb_mode = imxfb_find_mode(fbi);
362 if (!imxfb_mode)
363 return -EINVAL;
364
365 var->xres = imxfb_mode->mode.xres;
366 var->yres = imxfb_mode->mode.yres;
367 var->bits_per_pixel = imxfb_mode->bpp;
368 var->pixclock = imxfb_mode->mode.pixclock;
369 var->hsync_len = imxfb_mode->mode.hsync_len;
370 var->left_margin = imxfb_mode->mode.left_margin;
371 var->right_margin = imxfb_mode->mode.right_margin;
372 var->vsync_len = imxfb_mode->mode.vsync_len;
373 var->upper_margin = imxfb_mode->mode.upper_margin;
374 var->lower_margin = imxfb_mode->mode.lower_margin;
375 var->sync = imxfb_mode->mode.sync;
376 var->xres_virtual = max(var->xres_virtual, var->xres);
377 var->yres_virtual = max(var->yres_virtual, var->yres);
378
379 pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel);
380
381 lcd_clk = clk_get_rate(fbi->clk_per);
382
383 tmp = var->pixclock * (unsigned long long)lcd_clk;
384
385 do_div(tmp, 1000000);
386
387 if (do_div(tmp, 1000000) > 500000)
388 tmp++;
389
390 pcr = (unsigned int)tmp;
391
392 if (--pcr > 0x3F) {
393 pcr = 0x3F;
394 printk(KERN_WARNING "Must limit pixel clock to %luHz\n",
395 lcd_clk / pcr);
396 }
397
398 switch (var->bits_per_pixel) {
399 case 32:
400 pcr |= PCR_BPIX_18;
401 rgb = &def_rgb_18;
402 break;
403 case 16:
404 default:
405 if (is_imx1_fb(fbi))
406 pcr |= PCR_BPIX_12;
407 else
408 pcr |= PCR_BPIX_16;
409
410 if (imxfb_mode->pcr & PCR_TFT)
411 rgb = &def_rgb_16_tft;
412 else
413 rgb = &def_rgb_16_stn;
414 break;
415 case 8:
416 pcr |= PCR_BPIX_8;
417 rgb = &def_rgb_8;
418 break;
419 }
420
421 /* add sync polarities */
422 pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25));
423
424 fbi->pcr = pcr;
425
426 /*
427 * Copy the RGB parameters for this display
428 * from the machine specific parameters.
429 */
430 var->red = rgb->red;
431 var->green = rgb->green;
432 var->blue = rgb->blue;
433 var->transp = rgb->transp;
434
435 pr_debug("RGBT length = %d:%d:%d:%d\n",
436 var->red.length, var->green.length, var->blue.length,
437 var->transp.length);
438
439 pr_debug("RGBT offset = %d:%d:%d:%d\n",
440 var->red.offset, var->green.offset, var->blue.offset,
441 var->transp.offset);
442
443 return 0;
444 }
445
446 /*
447 * imxfb_set_par():
448 * Set the user defined part of the display for the specified console
449 */
450 static int imxfb_set_par(struct fb_info *info)
451 {
452 struct imxfb_info *fbi = info->par;
453 struct fb_var_screeninfo *var = &info->var;
454
455 if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32)
456 info->fix.visual = FB_VISUAL_TRUECOLOR;
457 else if (!fbi->cmap_static)
458 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
459 else {
460 /*
461 * Some people have weird ideas about wanting static
462 * pseudocolor maps. I suspect their user space
463 * applications are broken.
464 */
465 info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
466 }
467
468 info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
469 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
470
471 imxfb_activate_var(var, info);
472
473 return 0;
474 }
475
476 static int imxfb_enable_controller(struct imxfb_info *fbi)
477 {
478 int ret;
479
480 if (fbi->enabled)
481 return 0;
482
483 pr_debug("Enabling LCD controller\n");
484
485 writel(fbi->map_dma, fbi->regs + LCDC_SSA);
486
487 /* panning offset 0 (0 pixel offset) */
488 writel(0x00000000, fbi->regs + LCDC_POS);
489
490 /* disable hardware cursor */
491 writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
492 fbi->regs + LCDC_CPOS);
493
494 /*
495 * RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt
496 * on other SoCs
497 */
498 writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR);
499
500 ret = clk_prepare_enable(fbi->clk_ipg);
501 if (ret)
502 goto err_enable_ipg;
503
504 ret = clk_prepare_enable(fbi->clk_ahb);
505 if (ret)
506 goto err_enable_ahb;
507
508 ret = clk_prepare_enable(fbi->clk_per);
509 if (ret)
510 goto err_enable_per;
511
512 fbi->enabled = true;
513 return 0;
514
515 err_enable_per:
516 clk_disable_unprepare(fbi->clk_ahb);
517 err_enable_ahb:
518 clk_disable_unprepare(fbi->clk_ipg);
519 err_enable_ipg:
520 writel(0, fbi->regs + LCDC_RMCR);
521
522 return ret;
523 }
524
525 static void imxfb_disable_controller(struct imxfb_info *fbi)
526 {
527 if (!fbi->enabled)
528 return;
529
530 pr_debug("Disabling LCD controller\n");
531
532 clk_disable_unprepare(fbi->clk_per);
533 clk_disable_unprepare(fbi->clk_ahb);
534 clk_disable_unprepare(fbi->clk_ipg);
535 fbi->enabled = false;
536
537 writel(0, fbi->regs + LCDC_RMCR);
538 }
539
540 static int imxfb_blank(int blank, struct fb_info *info)
541 {
542 struct imxfb_info *fbi = info->par;
543
544 pr_debug("imxfb_blank: blank=%d\n", blank);
545
546 switch (blank) {
547 case FB_BLANK_POWERDOWN:
548 case FB_BLANK_VSYNC_SUSPEND:
549 case FB_BLANK_HSYNC_SUSPEND:
550 case FB_BLANK_NORMAL:
551 imxfb_disable_controller(fbi);
552 break;
553
554 case FB_BLANK_UNBLANK:
555 return imxfb_enable_controller(fbi);
556 }
557 return 0;
558 }
559
560 static struct fb_ops imxfb_ops = {
561 .owner = THIS_MODULE,
562 .fb_check_var = imxfb_check_var,
563 .fb_set_par = imxfb_set_par,
564 .fb_setcolreg = imxfb_setcolreg,
565 .fb_fillrect = cfb_fillrect,
566 .fb_copyarea = cfb_copyarea,
567 .fb_imageblit = cfb_imageblit,
568 .fb_blank = imxfb_blank,
569 };
570
571 /*
572 * imxfb_activate_var():
573 * Configures LCD Controller based on entries in var parameter. Settings are
574 * only written to the controller if changes were made.
575 */
576 static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info)
577 {
578 struct imxfb_info *fbi = info->par;
579 u32 ymax_mask = is_imx1_fb(fbi) ? YMAX_MASK_IMX1 : YMAX_MASK_IMX21;
580
581 pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
582 var->xres, var->hsync_len,
583 var->left_margin, var->right_margin);
584 pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n",
585 var->yres, var->vsync_len,
586 var->upper_margin, var->lower_margin);
587
588 #if DEBUG_VAR
589 if (var->xres < 16 || var->xres > 1024)
590 printk(KERN_ERR "%s: invalid xres %d\n",
591 info->fix.id, var->xres);
592 if (var->hsync_len < 1 || var->hsync_len > 64)
593 printk(KERN_ERR "%s: invalid hsync_len %d\n",
594 info->fix.id, var->hsync_len);
595 if (var->left_margin > 255)
596 printk(KERN_ERR "%s: invalid left_margin %d\n",
597 info->fix.id, var->left_margin);
598 if (var->right_margin > 255)
599 printk(KERN_ERR "%s: invalid right_margin %d\n",
600 info->fix.id, var->right_margin);
601 if (var->yres < 1 || var->yres > ymax_mask)
602 printk(KERN_ERR "%s: invalid yres %d\n",
603 info->fix.id, var->yres);
604 if (var->vsync_len > 100)
605 printk(KERN_ERR "%s: invalid vsync_len %d\n",
606 info->fix.id, var->vsync_len);
607 if (var->upper_margin > 63)
608 printk(KERN_ERR "%s: invalid upper_margin %d\n",
609 info->fix.id, var->upper_margin);
610 if (var->lower_margin > 255)
611 printk(KERN_ERR "%s: invalid lower_margin %d\n",
612 info->fix.id, var->lower_margin);
613 #endif
614
615 /* physical screen start address */
616 writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4),
617 fbi->regs + LCDC_VPW);
618
619 writel(HCR_H_WIDTH(var->hsync_len - 1) |
620 HCR_H_WAIT_1(var->right_margin - 1) |
621 HCR_H_WAIT_2(var->left_margin - 3),
622 fbi->regs + LCDC_HCR);
623
624 writel(VCR_V_WIDTH(var->vsync_len) |
625 VCR_V_WAIT_1(var->lower_margin) |
626 VCR_V_WAIT_2(var->upper_margin),
627 fbi->regs + LCDC_VCR);
628
629 writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask),
630 fbi->regs + LCDC_SIZE);
631
632 writel(fbi->pcr, fbi->regs + LCDC_PCR);
633 if (fbi->pwmr)
634 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
635 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
636
637 /* dmacr = 0 is no valid value, as we need DMA control marks. */
638 if (fbi->dmacr)
639 writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
640
641 return 0;
642 }
643
644 static int imxfb_init_fbinfo(struct platform_device *pdev)
645 {
646 struct imx_fb_platform_data *pdata = dev_get_platdata(&pdev->dev);
647 struct fb_info *info = dev_get_drvdata(&pdev->dev);
648 struct imxfb_info *fbi = info->par;
649 struct device_node *np;
650
651 pr_debug("%s\n",__func__);
652
653 info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
654 if (!info->pseudo_palette)
655 return -ENOMEM;
656
657 memset(fbi, 0, sizeof(struct imxfb_info));
658
659 fbi->devtype = pdev->id_entry->driver_data;
660
661 strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id));
662
663 info->fix.type = FB_TYPE_PACKED_PIXELS;
664 info->fix.type_aux = 0;
665 info->fix.xpanstep = 0;
666 info->fix.ypanstep = 0;
667 info->fix.ywrapstep = 0;
668 info->fix.accel = FB_ACCEL_NONE;
669
670 info->var.nonstd = 0;
671 info->var.activate = FB_ACTIVATE_NOW;
672 info->var.height = -1;
673 info->var.width = -1;
674 info->var.accel_flags = 0;
675 info->var.vmode = FB_VMODE_NONINTERLACED;
676
677 info->fbops = &imxfb_ops;
678 info->flags = FBINFO_FLAG_DEFAULT |
679 FBINFO_READS_FAST;
680 if (pdata) {
681 fbi->lscr1 = pdata->lscr1;
682 fbi->dmacr = pdata->dmacr;
683 fbi->pwmr = pdata->pwmr;
684 } else {
685 np = pdev->dev.of_node;
686 info->var.grayscale = of_property_read_bool(np,
687 "cmap-greyscale");
688 fbi->cmap_inverse = of_property_read_bool(np, "cmap-inverse");
689 fbi->cmap_static = of_property_read_bool(np, "cmap-static");
690
691 fbi->lscr1 = IMXFB_LSCR1_DEFAULT;
692
693 of_property_read_u32(np, "fsl,lpccr", &fbi->pwmr);
694
695 of_property_read_u32(np, "fsl,lscr1", &fbi->lscr1);
696
697 of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr);
698 }
699
700 return 0;
701 }
702
703 static int imxfb_of_read_mode(struct device *dev, struct device_node *np,
704 struct imx_fb_videomode *imxfb_mode)
705 {
706 int ret;
707 struct fb_videomode *of_mode = &imxfb_mode->mode;
708 u32 bpp;
709 u32 pcr;
710
711 ret = of_property_read_string(np, "model", &of_mode->name);
712 if (ret)
713 of_mode->name = NULL;
714
715 ret = of_get_fb_videomode(np, of_mode, OF_USE_NATIVE_MODE);
716 if (ret) {
717 dev_err(dev, "Failed to get videomode from DT\n");
718 return ret;
719 }
720
721 ret = of_property_read_u32(np, "bits-per-pixel", &bpp);
722 ret |= of_property_read_u32(np, "fsl,pcr", &pcr);
723
724 if (ret) {
725 dev_err(dev, "Failed to read bpp and pcr from DT\n");
726 return -EINVAL;
727 }
728
729 if (bpp < 1 || bpp > 255) {
730 dev_err(dev, "Bits per pixel have to be between 1 and 255\n");
731 return -EINVAL;
732 }
733
734 imxfb_mode->bpp = bpp;
735 imxfb_mode->pcr = pcr;
736
737 return 0;
738 }
739
740 static int imxfb_lcd_check_fb(struct lcd_device *lcddev, struct fb_info *fi)
741 {
742 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
743
744 if (!fi || fi->par == fbi)
745 return 1;
746
747 return 0;
748 }
749
750 static int imxfb_lcd_get_contrast(struct lcd_device *lcddev)
751 {
752 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
753
754 return fbi->pwmr & 0xff;
755 }
756
757 static int imxfb_lcd_set_contrast(struct lcd_device *lcddev, int contrast)
758 {
759 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
760
761 if (fbi->pwmr && fbi->enabled) {
762 if (contrast > 255)
763 contrast = 255;
764 else if (contrast < 0)
765 contrast = 0;
766
767 fbi->pwmr &= ~0xff;
768 fbi->pwmr |= contrast;
769
770 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
771 }
772
773 return 0;
774 }
775
776 static int imxfb_lcd_get_power(struct lcd_device *lcddev)
777 {
778 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
779
780 if (!IS_ERR(fbi->lcd_pwr) &&
781 !regulator_is_enabled(fbi->lcd_pwr))
782 return FB_BLANK_POWERDOWN;
783
784 return FB_BLANK_UNBLANK;
785 }
786
787 static int imxfb_lcd_set_power(struct lcd_device *lcddev, int power)
788 {
789 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
790
791 if (!IS_ERR(fbi->lcd_pwr)) {
792 if (power == FB_BLANK_UNBLANK)
793 return regulator_enable(fbi->lcd_pwr);
794 else
795 return regulator_disable(fbi->lcd_pwr);
796 }
797
798 return 0;
799 }
800
801 static struct lcd_ops imxfb_lcd_ops = {
802 .check_fb = imxfb_lcd_check_fb,
803 .get_contrast = imxfb_lcd_get_contrast,
804 .set_contrast = imxfb_lcd_set_contrast,
805 .get_power = imxfb_lcd_get_power,
806 .set_power = imxfb_lcd_set_power,
807 };
808
809 static int imxfb_setup(void)
810 {
811 char *opt, *options = NULL;
812
813 if (fb_get_options("imxfb", &options))
814 return -ENODEV;
815
816 if (!options || !*options)
817 return 0;
818
819 while ((opt = strsep(&options, ",")) != NULL) {
820 if (!*opt)
821 continue;
822 else
823 fb_mode = opt;
824 }
825
826 return 0;
827 }
828
829 static int imxfb_probe(struct platform_device *pdev)
830 {
831 struct imxfb_info *fbi;
832 struct lcd_device *lcd;
833 struct fb_info *info;
834 struct imx_fb_platform_data *pdata;
835 struct resource *res;
836 struct imx_fb_videomode *m;
837 const struct of_device_id *of_id;
838 int ret, i;
839 int bytes_per_pixel;
840
841 dev_info(&pdev->dev, "i.MX Framebuffer driver\n");
842
843 ret = imxfb_setup();
844 if (ret < 0)
845 return ret;
846
847 of_id = of_match_device(imxfb_of_dev_id, &pdev->dev);
848 if (of_id)
849 pdev->id_entry = of_id->data;
850
851 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
852 if (!res)
853 return -ENODEV;
854
855 pdata = dev_get_platdata(&pdev->dev);
856
857 info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev);
858 if (!info)
859 return -ENOMEM;
860
861 fbi = info->par;
862
863 platform_set_drvdata(pdev, info);
864
865 ret = imxfb_init_fbinfo(pdev);
866 if (ret < 0)
867 goto failed_init;
868
869 if (pdata) {
870 if (!fb_mode)
871 fb_mode = pdata->mode[0].mode.name;
872
873 fbi->mode = pdata->mode;
874 fbi->num_modes = pdata->num_modes;
875 } else {
876 struct device_node *display_np;
877 fb_mode = NULL;
878
879 display_np = of_parse_phandle(pdev->dev.of_node, "display", 0);
880 if (!display_np) {
881 dev_err(&pdev->dev, "No display defined in devicetree\n");
882 ret = -EINVAL;
883 goto failed_of_parse;
884 }
885
886 /*
887 * imxfb does not support more modes, we choose only the native
888 * mode.
889 */
890 fbi->num_modes = 1;
891
892 fbi->mode = devm_kzalloc(&pdev->dev,
893 sizeof(struct imx_fb_videomode), GFP_KERNEL);
894 if (!fbi->mode) {
895 ret = -ENOMEM;
896 goto failed_of_parse;
897 }
898
899 ret = imxfb_of_read_mode(&pdev->dev, display_np, fbi->mode);
900 if (ret)
901 goto failed_of_parse;
902 }
903
904 /* Calculate maximum bytes used per pixel. In most cases this should
905 * be the same as m->bpp/8 */
906 m = &fbi->mode[0];
907 bytes_per_pixel = (m->bpp + 7) / 8;
908 for (i = 0; i < fbi->num_modes; i++, m++)
909 info->fix.smem_len = max_t(size_t, info->fix.smem_len,
910 m->mode.xres * m->mode.yres * bytes_per_pixel);
911
912 res = request_mem_region(res->start, resource_size(res),
913 DRIVER_NAME);
914 if (!res) {
915 ret = -EBUSY;
916 goto failed_req;
917 }
918
919 fbi->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
920 if (IS_ERR(fbi->clk_ipg)) {
921 ret = PTR_ERR(fbi->clk_ipg);
922 goto failed_getclock;
923 }
924
925 /*
926 * The LCDC controller does not have an enable bit. The
927 * controller starts directly when the clocks are enabled.
928 * If the clocks are enabled when the controller is not yet
929 * programmed with proper register values (enabled at the
930 * bootloader, for example) then it just goes into some undefined
931 * state.
932 * To avoid this issue, let's enable and disable LCDC IPG clock
933 * so that we force some kind of 'reset' to the LCDC block.
934 */
935 ret = clk_prepare_enable(fbi->clk_ipg);
936 if (ret)
937 goto failed_getclock;
938 clk_disable_unprepare(fbi->clk_ipg);
939
940 fbi->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
941 if (IS_ERR(fbi->clk_ahb)) {
942 ret = PTR_ERR(fbi->clk_ahb);
943 goto failed_getclock;
944 }
945
946 fbi->clk_per = devm_clk_get(&pdev->dev, "per");
947 if (IS_ERR(fbi->clk_per)) {
948 ret = PTR_ERR(fbi->clk_per);
949 goto failed_getclock;
950 }
951
952 fbi->regs = ioremap(res->start, resource_size(res));
953 if (fbi->regs == NULL) {
954 dev_err(&pdev->dev, "Cannot map frame buffer registers\n");
955 ret = -ENOMEM;
956 goto failed_ioremap;
957 }
958
959 fbi->map_size = PAGE_ALIGN(info->fix.smem_len);
960 info->screen_base = dma_alloc_wc(&pdev->dev, fbi->map_size,
961 &fbi->map_dma, GFP_KERNEL);
962
963 if (!info->screen_base) {
964 dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret);
965 ret = -ENOMEM;
966 goto failed_map;
967 }
968
969 info->fix.smem_start = fbi->map_dma;
970
971 if (pdata && pdata->init) {
972 ret = pdata->init(fbi->pdev);
973 if (ret)
974 goto failed_platform_init;
975 }
976
977
978 INIT_LIST_HEAD(&info->modelist);
979 for (i = 0; i < fbi->num_modes; i++)
980 fb_add_videomode(&fbi->mode[i].mode, &info->modelist);
981
982 /*
983 * This makes sure that our colour bitfield
984 * descriptors are correctly initialised.
985 */
986 imxfb_check_var(&info->var, info);
987
988 ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0);
989 if (ret < 0)
990 goto failed_cmap;
991
992 imxfb_set_par(info);
993 ret = register_framebuffer(info);
994 if (ret < 0) {
995 dev_err(&pdev->dev, "failed to register framebuffer\n");
996 goto failed_register;
997 }
998
999 fbi->lcd_pwr = devm_regulator_get(&pdev->dev, "lcd");
1000 if (IS_ERR(fbi->lcd_pwr) && (PTR_ERR(fbi->lcd_pwr) == -EPROBE_DEFER)) {
1001 ret = -EPROBE_DEFER;
1002 goto failed_lcd;
1003 }
1004
1005 lcd = devm_lcd_device_register(&pdev->dev, "imxfb-lcd", &pdev->dev, fbi,
1006 &imxfb_lcd_ops);
1007 if (IS_ERR(lcd)) {
1008 ret = PTR_ERR(lcd);
1009 goto failed_lcd;
1010 }
1011
1012 lcd->props.max_contrast = 0xff;
1013
1014 imxfb_enable_controller(fbi);
1015 fbi->pdev = pdev;
1016
1017 return 0;
1018
1019 failed_lcd:
1020 unregister_framebuffer(info);
1021
1022 failed_register:
1023 fb_dealloc_cmap(&info->cmap);
1024 failed_cmap:
1025 if (pdata && pdata->exit)
1026 pdata->exit(fbi->pdev);
1027 failed_platform_init:
1028 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_base,
1029 fbi->map_dma);
1030 failed_map:
1031 iounmap(fbi->regs);
1032 failed_ioremap:
1033 failed_getclock:
1034 release_mem_region(res->start, resource_size(res));
1035 failed_req:
1036 failed_of_parse:
1037 kfree(info->pseudo_palette);
1038 failed_init:
1039 framebuffer_release(info);
1040 return ret;
1041 }
1042
1043 static int imxfb_remove(struct platform_device *pdev)
1044 {
1045 struct imx_fb_platform_data *pdata;
1046 struct fb_info *info = platform_get_drvdata(pdev);
1047 struct imxfb_info *fbi = info->par;
1048 struct resource *res;
1049
1050 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1051
1052 imxfb_disable_controller(fbi);
1053
1054 unregister_framebuffer(info);
1055
1056 pdata = dev_get_platdata(&pdev->dev);
1057 if (pdata && pdata->exit)
1058 pdata->exit(fbi->pdev);
1059
1060 fb_dealloc_cmap(&info->cmap);
1061 kfree(info->pseudo_palette);
1062 framebuffer_release(info);
1063
1064 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_base,
1065 fbi->map_dma);
1066
1067 iounmap(fbi->regs);
1068 release_mem_region(res->start, resource_size(res));
1069
1070 return 0;
1071 }
1072
1073 static int __maybe_unused imxfb_suspend(struct device *dev)
1074 {
1075 struct fb_info *info = dev_get_drvdata(dev);
1076 struct imxfb_info *fbi = info->par;
1077
1078 imxfb_disable_controller(fbi);
1079
1080 return 0;
1081 }
1082
1083 static int __maybe_unused imxfb_resume(struct device *dev)
1084 {
1085 struct fb_info *info = dev_get_drvdata(dev);
1086 struct imxfb_info *fbi = info->par;
1087
1088 imxfb_enable_controller(fbi);
1089
1090 return 0;
1091 }
1092
1093 static SIMPLE_DEV_PM_OPS(imxfb_pm_ops, imxfb_suspend, imxfb_resume);
1094
1095 static struct platform_driver imxfb_driver = {
1096 .driver = {
1097 .name = DRIVER_NAME,
1098 .of_match_table = imxfb_of_dev_id,
1099 .pm = &imxfb_pm_ops,
1100 },
1101 .probe = imxfb_probe,
1102 .remove = imxfb_remove,
1103 .id_table = imxfb_devtype,
1104 };
1105 module_platform_driver(imxfb_driver);
1106
1107 MODULE_DESCRIPTION("Freescale i.MX framebuffer driver");
1108 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
1109 MODULE_LICENSE("GPL");
Linux with added FPC-III support