sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / sound / soc / adi / axi-i2s.c
blob4c23381727a1ed1c53406b596ff04d9cd2e68577
1 /*
2 * Copyright (C) 2012-2013, Analog Devices Inc.
3 * Author: Lars-Peter Clausen <lars@metafoo.de>
5 * Licensed under the GPL-2.
6 */
8 #include <linux/clk.h>
9 #include <linux/init.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/of.h>
13 #include <linux/platform_device.h>
14 #include <linux/regmap.h>
15 #include <linux/slab.h>
17 #include <sound/core.h>
18 #include <sound/pcm.h>
19 #include <sound/pcm_params.h>
20 #include <sound/soc.h>
21 #include <sound/dmaengine_pcm.h>
23 #define AXI_I2S_REG_RESET 0x00
24 #define AXI_I2S_REG_CTRL 0x04
25 #define AXI_I2S_REG_CLK_CTRL 0x08
26 #define AXI_I2S_REG_STATUS 0x10
28 #define AXI_I2S_REG_RX_FIFO 0x28
29 #define AXI_I2S_REG_TX_FIFO 0x2C
31 #define AXI_I2S_RESET_GLOBAL BIT(0)
32 #define AXI_I2S_RESET_TX_FIFO BIT(1)
33 #define AXI_I2S_RESET_RX_FIFO BIT(2)
35 #define AXI_I2S_CTRL_TX_EN BIT(0)
36 #define AXI_I2S_CTRL_RX_EN BIT(1)
38 /* The frame size is configurable, but for now we always set it 64 bit */
39 #define AXI_I2S_BITS_PER_FRAME 64
41 struct axi_i2s {
42 struct regmap *regmap;
43 struct clk *clk;
44 struct clk *clk_ref;
46 struct snd_soc_dai_driver dai_driver;
48 struct snd_dmaengine_dai_dma_data capture_dma_data;
49 struct snd_dmaengine_dai_dma_data playback_dma_data;
51 struct snd_ratnum ratnum;
52 struct snd_pcm_hw_constraint_ratnums rate_constraints;
55 static int axi_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
56 struct snd_soc_dai *dai)
58 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
59 unsigned int mask, val;
61 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
62 mask = AXI_I2S_CTRL_RX_EN;
63 else
64 mask = AXI_I2S_CTRL_TX_EN;
66 switch (cmd) {
67 case SNDRV_PCM_TRIGGER_START:
68 case SNDRV_PCM_TRIGGER_RESUME:
69 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
70 val = mask;
71 break;
72 case SNDRV_PCM_TRIGGER_STOP:
73 case SNDRV_PCM_TRIGGER_SUSPEND:
74 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
75 val = 0;
76 break;
77 default:
78 return -EINVAL;
81 regmap_update_bits(i2s->regmap, AXI_I2S_REG_CTRL, mask, val);
83 return 0;
86 static int axi_i2s_hw_params(struct snd_pcm_substream *substream,
87 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
89 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
90 unsigned int bclk_div, word_size;
91 unsigned int bclk_rate;
93 bclk_rate = params_rate(params) * AXI_I2S_BITS_PER_FRAME;
95 word_size = AXI_I2S_BITS_PER_FRAME / 2 - 1;
96 bclk_div = DIV_ROUND_UP(clk_get_rate(i2s->clk_ref), bclk_rate) / 2 - 1;
98 regmap_write(i2s->regmap, AXI_I2S_REG_CLK_CTRL, (word_size << 16) |
99 bclk_div);
101 return 0;
104 static int axi_i2s_startup(struct snd_pcm_substream *substream,
105 struct snd_soc_dai *dai)
107 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
108 uint32_t mask;
109 int ret;
111 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
112 mask = AXI_I2S_RESET_RX_FIFO;
113 else
114 mask = AXI_I2S_RESET_TX_FIFO;
116 regmap_write(i2s->regmap, AXI_I2S_REG_RESET, mask);
118 ret = snd_pcm_hw_constraint_ratnums(substream->runtime, 0,
119 SNDRV_PCM_HW_PARAM_RATE,
120 &i2s->rate_constraints);
121 if (ret)
122 return ret;
124 return clk_prepare_enable(i2s->clk_ref);
127 static void axi_i2s_shutdown(struct snd_pcm_substream *substream,
128 struct snd_soc_dai *dai)
130 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
132 clk_disable_unprepare(i2s->clk_ref);
135 static int axi_i2s_dai_probe(struct snd_soc_dai *dai)
137 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
139 snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data,
140 &i2s->capture_dma_data);
142 return 0;
145 static const struct snd_soc_dai_ops axi_i2s_dai_ops = {
146 .startup = axi_i2s_startup,
147 .shutdown = axi_i2s_shutdown,
148 .trigger = axi_i2s_trigger,
149 .hw_params = axi_i2s_hw_params,
152 static struct snd_soc_dai_driver axi_i2s_dai = {
153 .probe = axi_i2s_dai_probe,
154 .playback = {
155 .channels_min = 2,
156 .channels_max = 2,
157 .rates = SNDRV_PCM_RATE_KNOT,
158 .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE,
160 .capture = {
161 .channels_min = 2,
162 .channels_max = 2,
163 .rates = SNDRV_PCM_RATE_KNOT,
164 .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE,
166 .ops = &axi_i2s_dai_ops,
167 .symmetric_rates = 1,
170 static const struct snd_soc_component_driver axi_i2s_component = {
171 .name = "axi-i2s",
174 static const struct regmap_config axi_i2s_regmap_config = {
175 .reg_bits = 32,
176 .reg_stride = 4,
177 .val_bits = 32,
178 .max_register = AXI_I2S_REG_STATUS,
181 static int axi_i2s_probe(struct platform_device *pdev)
183 struct resource *res;
184 struct axi_i2s *i2s;
185 void __iomem *base;
186 int ret;
188 i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL);
189 if (!i2s)
190 return -ENOMEM;
192 platform_set_drvdata(pdev, i2s);
194 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
195 base = devm_ioremap_resource(&pdev->dev, res);
196 if (IS_ERR(base))
197 return PTR_ERR(base);
199 i2s->regmap = devm_regmap_init_mmio(&pdev->dev, base,
200 &axi_i2s_regmap_config);
201 if (IS_ERR(i2s->regmap))
202 return PTR_ERR(i2s->regmap);
204 i2s->clk = devm_clk_get(&pdev->dev, "axi");
205 if (IS_ERR(i2s->clk))
206 return PTR_ERR(i2s->clk);
208 i2s->clk_ref = devm_clk_get(&pdev->dev, "ref");
209 if (IS_ERR(i2s->clk_ref))
210 return PTR_ERR(i2s->clk_ref);
212 ret = clk_prepare_enable(i2s->clk);
213 if (ret)
214 return ret;
216 i2s->playback_dma_data.addr = res->start + AXI_I2S_REG_TX_FIFO;
217 i2s->playback_dma_data.addr_width = 4;
218 i2s->playback_dma_data.maxburst = 1;
220 i2s->capture_dma_data.addr = res->start + AXI_I2S_REG_RX_FIFO;
221 i2s->capture_dma_data.addr_width = 4;
222 i2s->capture_dma_data.maxburst = 1;
224 i2s->ratnum.num = clk_get_rate(i2s->clk_ref) / 2 / AXI_I2S_BITS_PER_FRAME;
225 i2s->ratnum.den_step = 1;
226 i2s->ratnum.den_min = 1;
227 i2s->ratnum.den_max = 64;
229 i2s->rate_constraints.rats = &i2s->ratnum;
230 i2s->rate_constraints.nrats = 1;
232 regmap_write(i2s->regmap, AXI_I2S_REG_RESET, AXI_I2S_RESET_GLOBAL);
234 ret = devm_snd_soc_register_component(&pdev->dev, &axi_i2s_component,
235 &axi_i2s_dai, 1);
236 if (ret)
237 goto err_clk_disable;
239 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
240 if (ret)
241 goto err_clk_disable;
243 return 0;
245 err_clk_disable:
246 clk_disable_unprepare(i2s->clk);
247 return ret;
250 static int axi_i2s_dev_remove(struct platform_device *pdev)
252 struct axi_i2s *i2s = platform_get_drvdata(pdev);
254 clk_disable_unprepare(i2s->clk);
256 return 0;
259 static const struct of_device_id axi_i2s_of_match[] = {
260 { .compatible = "adi,axi-i2s-1.00.a", },
263 MODULE_DEVICE_TABLE(of, axi_i2s_of_match);
265 static struct platform_driver axi_i2s_driver = {
266 .driver = {
267 .name = "axi-i2s",
268 .of_match_table = axi_i2s_of_match,
270 .probe = axi_i2s_probe,
271 .remove = axi_i2s_dev_remove,
273 module_platform_driver(axi_i2s_driver);
275 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
276 MODULE_DESCRIPTION("AXI I2S driver");
277 MODULE_LICENSE("GPL");