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sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / sound / soc / codecs / da7218.c
blobc69e97654fc63e7b9f9a06776daeaba199a8b952
1 /*
2 * da7218.c - DA7218 ALSA SoC Codec Driver
3 *
4 * Copyright (c) 2015 Dialog Semiconductor
5 *
6 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14 #include <linux/clk.h>
15 #include <linux/i2c.h>
16 #include <linux/of_device.h>
17 #include <linux/regmap.h>
18 #include <linux/slab.h>
19 #include <linux/pm.h>
20 #include <linux/module.h>
21 #include <linux/delay.h>
22 #include <linux/regulator/consumer.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/jack.h>
28 #include <sound/initval.h>
29 #include <sound/tlv.h>
30 #include <asm/div64.h>
31
32 #include <sound/da7218.h>
33 #include "da7218.h"
34
35
36 /*
37 * TLVs and Enums
38 */
39
40 /* Input TLVs */
41 static const DECLARE_TLV_DB_SCALE(da7218_mic_gain_tlv, -600, 600, 0);
42 static const DECLARE_TLV_DB_SCALE(da7218_mixin_gain_tlv, -450, 150, 0);
43 static const DECLARE_TLV_DB_SCALE(da7218_in_dig_gain_tlv, -8325, 75, 0);
44 static const DECLARE_TLV_DB_SCALE(da7218_ags_trigger_tlv, -9000, 600, 0);
45 static const DECLARE_TLV_DB_SCALE(da7218_ags_att_max_tlv, 0, 600, 0);
46 static const DECLARE_TLV_DB_SCALE(da7218_alc_threshold_tlv, -9450, 150, 0);
47 static const DECLARE_TLV_DB_SCALE(da7218_alc_gain_tlv, 0, 600, 0);
48 static const DECLARE_TLV_DB_SCALE(da7218_alc_ana_gain_tlv, 0, 600, 0);
49
50 /* Input/Output TLVs */
51 static const DECLARE_TLV_DB_SCALE(da7218_dmix_gain_tlv, -4200, 150, 0);
52
53 /* Output TLVs */
54 static const DECLARE_TLV_DB_SCALE(da7218_dgs_trigger_tlv, -9450, 150, 0);
55 static const DECLARE_TLV_DB_SCALE(da7218_dgs_anticlip_tlv, -4200, 600, 0);
56 static const DECLARE_TLV_DB_SCALE(da7218_dgs_signal_tlv, -9000, 600, 0);
57 static const DECLARE_TLV_DB_SCALE(da7218_out_eq_band_tlv, -1050, 150, 0);
58 static const DECLARE_TLV_DB_SCALE(da7218_out_dig_gain_tlv, -8325, 75, 0);
59 static const DECLARE_TLV_DB_SCALE(da7218_dac_ng_threshold_tlv, -10200, 600, 0);
60 static const DECLARE_TLV_DB_SCALE(da7218_mixout_gain_tlv, -100, 50, 0);
61 static const DECLARE_TLV_DB_SCALE(da7218_hp_gain_tlv, -5700, 150, 0);
62
63 /* Input Enums */
64 static const char * const da7218_alc_attack_rate_txt[] = {
65 "7.33/fs", "14.66/fs", "29.32/fs", "58.64/fs", "117.3/fs", "234.6/fs",
66 "469.1/fs", "938.2/fs", "1876/fs", "3753/fs", "7506/fs", "15012/fs",
67 "30024/fs",
68 };
69
70 static const struct soc_enum da7218_alc_attack_rate =
71 SOC_ENUM_SINGLE(DA7218_ALC_CTRL2, DA7218_ALC_ATTACK_SHIFT,
72 DA7218_ALC_ATTACK_MAX, da7218_alc_attack_rate_txt);
73
74 static const char * const da7218_alc_release_rate_txt[] = {
75 "28.66/fs", "57.33/fs", "114.6/fs", "229.3/fs", "458.6/fs", "917.1/fs",
76 "1834/fs", "3668/fs", "7337/fs", "14674/fs", "29348/fs",
77 };
78
79 static const struct soc_enum da7218_alc_release_rate =
80 SOC_ENUM_SINGLE(DA7218_ALC_CTRL2, DA7218_ALC_RELEASE_SHIFT,
81 DA7218_ALC_RELEASE_MAX, da7218_alc_release_rate_txt);
82
83 static const char * const da7218_alc_hold_time_txt[] = {
84 "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
85 "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
86 "253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
87 };
88
89 static const struct soc_enum da7218_alc_hold_time =
90 SOC_ENUM_SINGLE(DA7218_ALC_CTRL3, DA7218_ALC_HOLD_SHIFT,
91 DA7218_ALC_HOLD_MAX, da7218_alc_hold_time_txt);
92
93 static const char * const da7218_alc_anticlip_step_txt[] = {
94 "0.034dB/fs", "0.068dB/fs", "0.136dB/fs", "0.272dB/fs",
95 };
96
97 static const struct soc_enum da7218_alc_anticlip_step =
98 SOC_ENUM_SINGLE(DA7218_ALC_ANTICLIP_CTRL,
99 DA7218_ALC_ANTICLIP_STEP_SHIFT,
100 DA7218_ALC_ANTICLIP_STEP_MAX,
101 da7218_alc_anticlip_step_txt);
102
103 static const char * const da7218_integ_rate_txt[] = {
104 "1/4", "1/16", "1/256", "1/65536"
105 };
106
107 static const struct soc_enum da7218_integ_attack_rate =
108 SOC_ENUM_SINGLE(DA7218_ENV_TRACK_CTRL, DA7218_INTEG_ATTACK_SHIFT,
109 DA7218_INTEG_MAX, da7218_integ_rate_txt);
110
111 static const struct soc_enum da7218_integ_release_rate =
112 SOC_ENUM_SINGLE(DA7218_ENV_TRACK_CTRL, DA7218_INTEG_RELEASE_SHIFT,
113 DA7218_INTEG_MAX, da7218_integ_rate_txt);
114
115 /* Input/Output Enums */
116 static const char * const da7218_gain_ramp_rate_txt[] = {
117 "Nominal Rate * 8", "Nominal Rate", "Nominal Rate / 8",
118 "Nominal Rate / 16",
119 };
120
121 static const struct soc_enum da7218_gain_ramp_rate =
122 SOC_ENUM_SINGLE(DA7218_GAIN_RAMP_CTRL, DA7218_GAIN_RAMP_RATE_SHIFT,
123 DA7218_GAIN_RAMP_RATE_MAX, da7218_gain_ramp_rate_txt);
124
125 static const char * const da7218_hpf_mode_txt[] = {
126 "Disabled", "Audio", "Voice",
127 };
128
129 static const unsigned int da7218_hpf_mode_val[] = {
130 DA7218_HPF_DISABLED, DA7218_HPF_AUDIO_EN, DA7218_HPF_VOICE_EN,
131 };
132
133 static const struct soc_enum da7218_in1_hpf_mode =
134 SOC_VALUE_ENUM_SINGLE(DA7218_IN_1_HPF_FILTER_CTRL,
135 DA7218_HPF_MODE_SHIFT, DA7218_HPF_MODE_MASK,
136 DA7218_HPF_MODE_MAX, da7218_hpf_mode_txt,
137 da7218_hpf_mode_val);
138
139 static const struct soc_enum da7218_in2_hpf_mode =
140 SOC_VALUE_ENUM_SINGLE(DA7218_IN_2_HPF_FILTER_CTRL,
141 DA7218_HPF_MODE_SHIFT, DA7218_HPF_MODE_MASK,
142 DA7218_HPF_MODE_MAX, da7218_hpf_mode_txt,
143 da7218_hpf_mode_val);
144
145 static const struct soc_enum da7218_out1_hpf_mode =
146 SOC_VALUE_ENUM_SINGLE(DA7218_OUT_1_HPF_FILTER_CTRL,
147 DA7218_HPF_MODE_SHIFT, DA7218_HPF_MODE_MASK,
148 DA7218_HPF_MODE_MAX, da7218_hpf_mode_txt,
149 da7218_hpf_mode_val);
150
151 static const char * const da7218_audio_hpf_corner_txt[] = {
152 "2Hz", "4Hz", "8Hz", "16Hz",
153 };
154
155 static const struct soc_enum da7218_in1_audio_hpf_corner =
156 SOC_ENUM_SINGLE(DA7218_IN_1_HPF_FILTER_CTRL,
157 DA7218_IN_1_AUDIO_HPF_CORNER_SHIFT,
158 DA7218_AUDIO_HPF_CORNER_MAX,
159 da7218_audio_hpf_corner_txt);
160
161 static const struct soc_enum da7218_in2_audio_hpf_corner =
162 SOC_ENUM_SINGLE(DA7218_IN_2_HPF_FILTER_CTRL,
163 DA7218_IN_2_AUDIO_HPF_CORNER_SHIFT,
164 DA7218_AUDIO_HPF_CORNER_MAX,
165 da7218_audio_hpf_corner_txt);
166
167 static const struct soc_enum da7218_out1_audio_hpf_corner =
168 SOC_ENUM_SINGLE(DA7218_OUT_1_HPF_FILTER_CTRL,
169 DA7218_OUT_1_AUDIO_HPF_CORNER_SHIFT,
170 DA7218_AUDIO_HPF_CORNER_MAX,
171 da7218_audio_hpf_corner_txt);
172
173 static const char * const da7218_voice_hpf_corner_txt[] = {
174 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz",
175 };
176
177 static const struct soc_enum da7218_in1_voice_hpf_corner =
178 SOC_ENUM_SINGLE(DA7218_IN_1_HPF_FILTER_CTRL,
179 DA7218_IN_1_VOICE_HPF_CORNER_SHIFT,
180 DA7218_VOICE_HPF_CORNER_MAX,
181 da7218_voice_hpf_corner_txt);
182
183 static const struct soc_enum da7218_in2_voice_hpf_corner =
184 SOC_ENUM_SINGLE(DA7218_IN_2_HPF_FILTER_CTRL,
185 DA7218_IN_2_VOICE_HPF_CORNER_SHIFT,
186 DA7218_VOICE_HPF_CORNER_MAX,
187 da7218_voice_hpf_corner_txt);
188
189 static const struct soc_enum da7218_out1_voice_hpf_corner =
190 SOC_ENUM_SINGLE(DA7218_OUT_1_HPF_FILTER_CTRL,
191 DA7218_OUT_1_VOICE_HPF_CORNER_SHIFT,
192 DA7218_VOICE_HPF_CORNER_MAX,
193 da7218_voice_hpf_corner_txt);
194
195 static const char * const da7218_tonegen_dtmf_key_txt[] = {
196 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "A", "B", "C", "D",
197 "*", "#"
198 };
199
200 static const struct soc_enum da7218_tonegen_dtmf_key =
201 SOC_ENUM_SINGLE(DA7218_TONE_GEN_CFG1, DA7218_DTMF_REG_SHIFT,
202 DA7218_DTMF_REG_MAX, da7218_tonegen_dtmf_key_txt);
203
204 static const char * const da7218_tonegen_swg_sel_txt[] = {
205 "Sum", "SWG1", "SWG2", "SWG1_1-Cos"
206 };
207
208 static const struct soc_enum da7218_tonegen_swg_sel =
209 SOC_ENUM_SINGLE(DA7218_TONE_GEN_CFG2, DA7218_SWG_SEL_SHIFT,
210 DA7218_SWG_SEL_MAX, da7218_tonegen_swg_sel_txt);
211
212 /* Output Enums */
213 static const char * const da7218_dgs_rise_coeff_txt[] = {
214 "1/1", "1/16", "1/64", "1/256", "1/1024", "1/4096", "1/16384",
215 };
216
217 static const struct soc_enum da7218_dgs_rise_coeff =
218 SOC_ENUM_SINGLE(DA7218_DGS_RISE_FALL, DA7218_DGS_RISE_COEFF_SHIFT,
219 DA7218_DGS_RISE_COEFF_MAX, da7218_dgs_rise_coeff_txt);
220
221 static const char * const da7218_dgs_fall_coeff_txt[] = {
222 "1/4", "1/16", "1/64", "1/256", "1/1024", "1/4096", "1/16384", "1/65536",
223 };
224
225 static const struct soc_enum da7218_dgs_fall_coeff =
226 SOC_ENUM_SINGLE(DA7218_DGS_RISE_FALL, DA7218_DGS_FALL_COEFF_SHIFT,
227 DA7218_DGS_FALL_COEFF_MAX, da7218_dgs_fall_coeff_txt);
228
229 static const char * const da7218_dac_ng_setup_time_txt[] = {
230 "256 Samples", "512 Samples", "1024 Samples", "2048 Samples"
231 };
232
233 static const struct soc_enum da7218_dac_ng_setup_time =
234 SOC_ENUM_SINGLE(DA7218_DAC_NG_SETUP_TIME,
235 DA7218_DAC_NG_SETUP_TIME_SHIFT,
236 DA7218_DAC_NG_SETUP_TIME_MAX,
237 da7218_dac_ng_setup_time_txt);
238
239 static const char * const da7218_dac_ng_rampup_txt[] = {
240 "0.22ms/dB", "0.0138ms/dB"
241 };
242
243 static const struct soc_enum da7218_dac_ng_rampup_rate =
244 SOC_ENUM_SINGLE(DA7218_DAC_NG_SETUP_TIME,
245 DA7218_DAC_NG_RAMPUP_RATE_SHIFT,
246 DA7218_DAC_NG_RAMPUP_RATE_MAX,
247 da7218_dac_ng_rampup_txt);
248
249 static const char * const da7218_dac_ng_rampdown_txt[] = {
250 "0.88ms/dB", "14.08ms/dB"
251 };
252
253 static const struct soc_enum da7218_dac_ng_rampdown_rate =
254 SOC_ENUM_SINGLE(DA7218_DAC_NG_SETUP_TIME,
255 DA7218_DAC_NG_RAMPDN_RATE_SHIFT,
256 DA7218_DAC_NG_RAMPDN_RATE_MAX,
257 da7218_dac_ng_rampdown_txt);
258
259 static const char * const da7218_cp_mchange_txt[] = {
260 "Largest Volume", "DAC Volume", "Signal Magnitude"
261 };
262
263 static const unsigned int da7218_cp_mchange_val[] = {
264 DA7218_CP_MCHANGE_LARGEST_VOL, DA7218_CP_MCHANGE_DAC_VOL,
265 DA7218_CP_MCHANGE_SIG_MAG
266 };
267
268 static const struct soc_enum da7218_cp_mchange =
269 SOC_VALUE_ENUM_SINGLE(DA7218_CP_CTRL, DA7218_CP_MCHANGE_SHIFT,
270 DA7218_CP_MCHANGE_REL_MASK, DA7218_CP_MCHANGE_MAX,
271 da7218_cp_mchange_txt, da7218_cp_mchange_val);
272
273 static const char * const da7218_cp_fcontrol_txt[] = {
274 "1MHz", "500KHz", "250KHz", "125KHz", "63KHz", "0KHz"
275 };
276
277 static const struct soc_enum da7218_cp_fcontrol =
278 SOC_ENUM_SINGLE(DA7218_CP_DELAY, DA7218_CP_FCONTROL_SHIFT,
279 DA7218_CP_FCONTROL_MAX, da7218_cp_fcontrol_txt);
280
281 static const char * const da7218_cp_tau_delay_txt[] = {
282 "0ms", "2ms", "4ms", "16ms", "64ms", "128ms", "256ms", "512ms"
283 };
284
285 static const struct soc_enum da7218_cp_tau_delay =
286 SOC_ENUM_SINGLE(DA7218_CP_DELAY, DA7218_CP_TAU_DELAY_SHIFT,
287 DA7218_CP_TAU_DELAY_MAX, da7218_cp_tau_delay_txt);
288
289 /*
290 * Control Functions
291 */
292
293 /* ALC */
294 static void da7218_alc_calib(struct snd_soc_codec *codec)
295 {
296 u8 mic_1_ctrl, mic_2_ctrl;
297 u8 mixin_1_ctrl, mixin_2_ctrl;
298 u8 in_1l_filt_ctrl, in_1r_filt_ctrl, in_2l_filt_ctrl, in_2r_filt_ctrl;
299 u8 in_1_hpf_ctrl, in_2_hpf_ctrl;
300 u8 calib_ctrl;
301 int i = 0;
302 bool calibrated = false;
303
304 /* Save current state of MIC control registers */
305 mic_1_ctrl = snd_soc_read(codec, DA7218_MIC_1_CTRL);
306 mic_2_ctrl = snd_soc_read(codec, DA7218_MIC_2_CTRL);
307
308 /* Save current state of input mixer control registers */
309 mixin_1_ctrl = snd_soc_read(codec, DA7218_MIXIN_1_CTRL);
310 mixin_2_ctrl = snd_soc_read(codec, DA7218_MIXIN_2_CTRL);
311
312 /* Save current state of input filter control registers */
313 in_1l_filt_ctrl = snd_soc_read(codec, DA7218_IN_1L_FILTER_CTRL);
314 in_1r_filt_ctrl = snd_soc_read(codec, DA7218_IN_1R_FILTER_CTRL);
315 in_2l_filt_ctrl = snd_soc_read(codec, DA7218_IN_2L_FILTER_CTRL);
316 in_2r_filt_ctrl = snd_soc_read(codec, DA7218_IN_2R_FILTER_CTRL);
317
318 /* Save current state of input HPF control registers */
319 in_1_hpf_ctrl = snd_soc_read(codec, DA7218_IN_1_HPF_FILTER_CTRL);
320 in_2_hpf_ctrl = snd_soc_read(codec, DA7218_IN_2_HPF_FILTER_CTRL);
321
322 /* Enable then Mute MIC PGAs */
323 snd_soc_update_bits(codec, DA7218_MIC_1_CTRL, DA7218_MIC_1_AMP_EN_MASK,
324 DA7218_MIC_1_AMP_EN_MASK);
325 snd_soc_update_bits(codec, DA7218_MIC_2_CTRL, DA7218_MIC_2_AMP_EN_MASK,
326 DA7218_MIC_2_AMP_EN_MASK);
327 snd_soc_update_bits(codec, DA7218_MIC_1_CTRL,
328 DA7218_MIC_1_AMP_MUTE_EN_MASK,
329 DA7218_MIC_1_AMP_MUTE_EN_MASK);
330 snd_soc_update_bits(codec, DA7218_MIC_2_CTRL,
331 DA7218_MIC_2_AMP_MUTE_EN_MASK,
332 DA7218_MIC_2_AMP_MUTE_EN_MASK);
333
334 /* Enable input mixers unmuted */
335 snd_soc_update_bits(codec, DA7218_MIXIN_1_CTRL,
336 DA7218_MIXIN_1_AMP_EN_MASK |
337 DA7218_MIXIN_1_AMP_MUTE_EN_MASK,
338 DA7218_MIXIN_1_AMP_EN_MASK);
339 snd_soc_update_bits(codec, DA7218_MIXIN_2_CTRL,
340 DA7218_MIXIN_2_AMP_EN_MASK |
341 DA7218_MIXIN_2_AMP_MUTE_EN_MASK,
342 DA7218_MIXIN_2_AMP_EN_MASK);
343
344 /* Enable input filters unmuted */
345 snd_soc_update_bits(codec, DA7218_IN_1L_FILTER_CTRL,
346 DA7218_IN_1L_FILTER_EN_MASK |
347 DA7218_IN_1L_MUTE_EN_MASK,
348 DA7218_IN_1L_FILTER_EN_MASK);
349 snd_soc_update_bits(codec, DA7218_IN_1R_FILTER_CTRL,
350 DA7218_IN_1R_FILTER_EN_MASK |
351 DA7218_IN_1R_MUTE_EN_MASK,
352 DA7218_IN_1R_FILTER_EN_MASK);
353 snd_soc_update_bits(codec, DA7218_IN_2L_FILTER_CTRL,
354 DA7218_IN_2L_FILTER_EN_MASK |
355 DA7218_IN_2L_MUTE_EN_MASK,
356 DA7218_IN_2L_FILTER_EN_MASK);
357 snd_soc_update_bits(codec, DA7218_IN_2R_FILTER_CTRL,
358 DA7218_IN_2R_FILTER_EN_MASK |
359 DA7218_IN_2R_MUTE_EN_MASK,
360 DA7218_IN_2R_FILTER_EN_MASK);
361
362 /*
363 * Make sure input HPFs voice mode is disabled, otherwise for sampling
364 * rates above 32KHz the ADC signals will be stopped and will cause
365 * calibration to lock up.
366 */
367 snd_soc_update_bits(codec, DA7218_IN_1_HPF_FILTER_CTRL,
368 DA7218_IN_1_VOICE_EN_MASK, 0);
369 snd_soc_update_bits(codec, DA7218_IN_2_HPF_FILTER_CTRL,
370 DA7218_IN_2_VOICE_EN_MASK, 0);
371
372 /* Perform auto calibration */
373 snd_soc_update_bits(codec, DA7218_CALIB_CTRL, DA7218_CALIB_AUTO_EN_MASK,
374 DA7218_CALIB_AUTO_EN_MASK);
375 do {
376 calib_ctrl = snd_soc_read(codec, DA7218_CALIB_CTRL);
377 if (calib_ctrl & DA7218_CALIB_AUTO_EN_MASK) {
378 ++i;
379 usleep_range(DA7218_ALC_CALIB_DELAY_MIN,
380 DA7218_ALC_CALIB_DELAY_MAX);
381 } else {
382 calibrated = true;
383 }
384
385 } while ((i < DA7218_ALC_CALIB_MAX_TRIES) && (!calibrated));
386
387 /* If auto calibration fails, disable DC offset, hybrid ALC */
388 if ((!calibrated) || (calib_ctrl & DA7218_CALIB_OVERFLOW_MASK)) {
389 dev_warn(codec->dev,
390 "ALC auto calibration failed - %s\n",
391 (calibrated) ? "overflow" : "timeout");
392 snd_soc_update_bits(codec, DA7218_CALIB_CTRL,
393 DA7218_CALIB_OFFSET_EN_MASK, 0);
394 snd_soc_update_bits(codec, DA7218_ALC_CTRL1,
395 DA7218_ALC_SYNC_MODE_MASK, 0);
396
397 } else {
398 /* Enable DC offset cancellation */
399 snd_soc_update_bits(codec, DA7218_CALIB_CTRL,
400 DA7218_CALIB_OFFSET_EN_MASK,
401 DA7218_CALIB_OFFSET_EN_MASK);
402
403 /* Enable ALC hybrid mode */
404 snd_soc_update_bits(codec, DA7218_ALC_CTRL1,
405 DA7218_ALC_SYNC_MODE_MASK,
406 DA7218_ALC_SYNC_MODE_CH1 |
407 DA7218_ALC_SYNC_MODE_CH2);
408 }
409
410 /* Restore input HPF control registers to original states */
411 snd_soc_write(codec, DA7218_IN_1_HPF_FILTER_CTRL, in_1_hpf_ctrl);
412 snd_soc_write(codec, DA7218_IN_2_HPF_FILTER_CTRL, in_2_hpf_ctrl);
413
414 /* Restore input filter control registers to original states */
415 snd_soc_write(codec, DA7218_IN_1L_FILTER_CTRL, in_1l_filt_ctrl);
416 snd_soc_write(codec, DA7218_IN_1R_FILTER_CTRL, in_1r_filt_ctrl);
417 snd_soc_write(codec, DA7218_IN_2L_FILTER_CTRL, in_2l_filt_ctrl);
418 snd_soc_write(codec, DA7218_IN_2R_FILTER_CTRL, in_2r_filt_ctrl);
419
420 /* Restore input mixer control registers to original state */
421 snd_soc_write(codec, DA7218_MIXIN_1_CTRL, mixin_1_ctrl);
422 snd_soc_write(codec, DA7218_MIXIN_2_CTRL, mixin_2_ctrl);
423
424 /* Restore MIC control registers to original states */
425 snd_soc_write(codec, DA7218_MIC_1_CTRL, mic_1_ctrl);
426 snd_soc_write(codec, DA7218_MIC_2_CTRL, mic_2_ctrl);
427 }
428
429 static int da7218_mixin_gain_put(struct snd_kcontrol *kcontrol,
430 struct snd_ctl_elem_value *ucontrol)
431 {
432 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
433 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
434 int ret;
435
436 ret = snd_soc_put_volsw(kcontrol, ucontrol);
437
438 /*
439 * If ALC in operation and value of control has been updated,
440 * make sure calibrated offsets are updated.
441 */
442 if ((ret == 1) && (da7218->alc_en))
443 da7218_alc_calib(codec);
444
445 return ret;
446 }
447
448 static int da7218_alc_sw_put(struct snd_kcontrol *kcontrol,
449 struct snd_ctl_elem_value *ucontrol)
450 {
451 struct soc_mixer_control *mc =
452 (struct soc_mixer_control *) kcontrol->private_value;
453 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
454 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
455 unsigned int lvalue = ucontrol->value.integer.value[0];
456 unsigned int rvalue = ucontrol->value.integer.value[1];
457 unsigned int lshift = mc->shift;
458 unsigned int rshift = mc->rshift;
459 unsigned int mask = (mc->max << lshift) | (mc->max << rshift);
460
461 /* Force ALC offset calibration if enabling ALC */
462 if ((lvalue || rvalue) && (!da7218->alc_en))
463 da7218_alc_calib(codec);
464
465 /* Update bits to detail which channels are enabled/disabled */
466 da7218->alc_en &= ~mask;
467 da7218->alc_en |= (lvalue << lshift) | (rvalue << rshift);
468
469 return snd_soc_put_volsw(kcontrol, ucontrol);
470 }
471
472 /* ToneGen */
473 static int da7218_tonegen_freq_get(struct snd_kcontrol *kcontrol,
474 struct snd_ctl_elem_value *ucontrol)
475 {
476 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
477 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
478 struct soc_mixer_control *mixer_ctrl =
479 (struct soc_mixer_control *) kcontrol->private_value;
480 unsigned int reg = mixer_ctrl->reg;
481 u16 val;
482 int ret;
483
484 /*
485 * Frequency value spans two 8-bit registers, lower then upper byte.
486 * Therefore we need to convert to host endianness here.
487 */
488 ret = regmap_raw_read(da7218->regmap, reg, &val, 2);
489 if (ret)
490 return ret;
491
492 ucontrol->value.integer.value[0] = le16_to_cpu(val);
493
494 return 0;
495 }
496
497 static int da7218_tonegen_freq_put(struct snd_kcontrol *kcontrol,
498 struct snd_ctl_elem_value *ucontrol)
499 {
500 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
501 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
502 struct soc_mixer_control *mixer_ctrl =
503 (struct soc_mixer_control *) kcontrol->private_value;
504 unsigned int reg = mixer_ctrl->reg;
505 u16 val;
506
507 /*
508 * Frequency value spans two 8-bit registers, lower then upper byte.
509 * Therefore we need to convert to little endian here to align with
510 * HW registers.
511 */
512 val = cpu_to_le16(ucontrol->value.integer.value[0]);
513
514 return regmap_raw_write(da7218->regmap, reg, &val, 2);
515 }
516
517 static int da7218_mic_lvl_det_sw_put(struct snd_kcontrol *kcontrol,
518 struct snd_ctl_elem_value *ucontrol)
519 {
520 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
521 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
522 struct soc_mixer_control *mixer_ctrl =
523 (struct soc_mixer_control *) kcontrol->private_value;
524 unsigned int lvalue = ucontrol->value.integer.value[0];
525 unsigned int rvalue = ucontrol->value.integer.value[1];
526 unsigned int lshift = mixer_ctrl->shift;
527 unsigned int rshift = mixer_ctrl->rshift;
528 unsigned int mask = (mixer_ctrl->max << lshift) |
529 (mixer_ctrl->max << rshift);
530 da7218->mic_lvl_det_en &= ~mask;
531 da7218->mic_lvl_det_en |= (lvalue << lshift) | (rvalue << rshift);
532
533 /*
534 * Here we only enable the feature on paths which are already
535 * powered. If a channel is enabled here for level detect, but that path
536 * isn't powered, then the channel will actually be enabled when we do
537 * power the path (IN_FILTER widget events). This handling avoids
538 * unwanted level detect events.
539 */
540 return snd_soc_write(codec, mixer_ctrl->reg,
541 (da7218->in_filt_en & da7218->mic_lvl_det_en));
542 }
543
544 static int da7218_mic_lvl_det_sw_get(struct snd_kcontrol *kcontrol,
545 struct snd_ctl_elem_value *ucontrol)
546 {
547 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
548 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
549 struct soc_mixer_control *mixer_ctrl =
550 (struct soc_mixer_control *) kcontrol->private_value;
551 unsigned int lshift = mixer_ctrl->shift;
552 unsigned int rshift = mixer_ctrl->rshift;
553 unsigned int lmask = (mixer_ctrl->max << lshift);
554 unsigned int rmask = (mixer_ctrl->max << rshift);
555
556 ucontrol->value.integer.value[0] =
557 (da7218->mic_lvl_det_en & lmask) >> lshift;
558 ucontrol->value.integer.value[1] =
559 (da7218->mic_lvl_det_en & rmask) >> rshift;
560
561 return 0;
562 }
563
564 static int da7218_biquad_coeff_get(struct snd_kcontrol *kcontrol,
565 struct snd_ctl_elem_value *ucontrol)
566 {
567 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
568 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
569 struct soc_bytes_ext *bytes_ext =
570 (struct soc_bytes_ext *) kcontrol->private_value;
571
572 /* Determine which BiQuads we're setting based on size of config data */
573 switch (bytes_ext->max) {
574 case DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE:
575 memcpy(ucontrol->value.bytes.data, da7218->biq_5stage_coeff,
576 bytes_ext->max);
577 break;
578 case DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE:
579 memcpy(ucontrol->value.bytes.data, da7218->stbiq_3stage_coeff,
580 bytes_ext->max);
581 break;
582 default:
583 return -EINVAL;
584 }
585
586 return 0;
587 }
588
589 static int da7218_biquad_coeff_put(struct snd_kcontrol *kcontrol,
590 struct snd_ctl_elem_value *ucontrol)
591 {
592 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
593 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
594 struct soc_bytes_ext *bytes_ext =
595 (struct soc_bytes_ext *) kcontrol->private_value;
596 u8 reg, out_filt1l;
597 u8 cfg[DA7218_BIQ_CFG_SIZE];
598 int i;
599
600 /*
601 * Determine which BiQuads we're setting based on size of config data,
602 * and stored the data for use by get function.
603 */
604 switch (bytes_ext->max) {
605 case DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE:
606 reg = DA7218_OUT_1_BIQ_5STAGE_DATA;
607 memcpy(da7218->biq_5stage_coeff, ucontrol->value.bytes.data,
608 bytes_ext->max);
609 break;
610 case DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE:
611 reg = DA7218_SIDETONE_BIQ_3STAGE_DATA;
612 memcpy(da7218->stbiq_3stage_coeff, ucontrol->value.bytes.data,
613 bytes_ext->max);
614 break;
615 default:
616 return -EINVAL;
617 }
618
619 /* Make sure at least out filter1 enabled to allow programming */
620 out_filt1l = snd_soc_read(codec, DA7218_OUT_1L_FILTER_CTRL);
621 snd_soc_write(codec, DA7218_OUT_1L_FILTER_CTRL,
622 out_filt1l | DA7218_OUT_1L_FILTER_EN_MASK);
623
624 for (i = 0; i < bytes_ext->max; ++i) {
625 cfg[DA7218_BIQ_CFG_DATA] = ucontrol->value.bytes.data[i];
626 cfg[DA7218_BIQ_CFG_ADDR] = i;
627 regmap_raw_write(da7218->regmap, reg, cfg, DA7218_BIQ_CFG_SIZE);
628 }
629
630 /* Restore filter to previous setting */
631 snd_soc_write(codec, DA7218_OUT_1L_FILTER_CTRL, out_filt1l);
632
633 return 0;
634 }
635
636
637 /*
638 * KControls
639 */
640
641 static const struct snd_kcontrol_new da7218_snd_controls[] = {
642 /* Mics */
643 SOC_SINGLE_TLV("Mic1 Volume", DA7218_MIC_1_GAIN,
644 DA7218_MIC_1_AMP_GAIN_SHIFT, DA7218_MIC_AMP_GAIN_MAX,
645 DA7218_NO_INVERT, da7218_mic_gain_tlv),
646 SOC_SINGLE("Mic1 Switch", DA7218_MIC_1_CTRL,
647 DA7218_MIC_1_AMP_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
648 DA7218_INVERT),
649 SOC_SINGLE_TLV("Mic2 Volume", DA7218_MIC_2_GAIN,
650 DA7218_MIC_2_AMP_GAIN_SHIFT, DA7218_MIC_AMP_GAIN_MAX,
651 DA7218_NO_INVERT, da7218_mic_gain_tlv),
652 SOC_SINGLE("Mic2 Switch", DA7218_MIC_2_CTRL,
653 DA7218_MIC_2_AMP_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
654 DA7218_INVERT),
655
656 /* Mixer Input */
657 SOC_SINGLE_EXT_TLV("Mixin1 Volume", DA7218_MIXIN_1_GAIN,
658 DA7218_MIXIN_1_AMP_GAIN_SHIFT,
659 DA7218_MIXIN_AMP_GAIN_MAX, DA7218_NO_INVERT,
660 snd_soc_get_volsw, da7218_mixin_gain_put,
661 da7218_mixin_gain_tlv),
662 SOC_SINGLE("Mixin1 Switch", DA7218_MIXIN_1_CTRL,
663 DA7218_MIXIN_1_AMP_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
664 DA7218_INVERT),
665 SOC_SINGLE("Mixin1 Gain Ramp Switch", DA7218_MIXIN_1_CTRL,
666 DA7218_MIXIN_1_AMP_RAMP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
667 DA7218_NO_INVERT),
668 SOC_SINGLE("Mixin1 ZC Gain Switch", DA7218_MIXIN_1_CTRL,
669 DA7218_MIXIN_1_AMP_ZC_EN_SHIFT, DA7218_SWITCH_EN_MAX,
670 DA7218_NO_INVERT),
671 SOC_SINGLE_EXT_TLV("Mixin2 Volume", DA7218_MIXIN_2_GAIN,
672 DA7218_MIXIN_2_AMP_GAIN_SHIFT,
673 DA7218_MIXIN_AMP_GAIN_MAX, DA7218_NO_INVERT,
674 snd_soc_get_volsw, da7218_mixin_gain_put,
675 da7218_mixin_gain_tlv),
676 SOC_SINGLE("Mixin2 Switch", DA7218_MIXIN_2_CTRL,
677 DA7218_MIXIN_2_AMP_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
678 DA7218_INVERT),
679 SOC_SINGLE("Mixin2 Gain Ramp Switch", DA7218_MIXIN_2_CTRL,
680 DA7218_MIXIN_2_AMP_RAMP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
681 DA7218_NO_INVERT),
682 SOC_SINGLE("Mixin2 ZC Gain Switch", DA7218_MIXIN_2_CTRL,
683 DA7218_MIXIN_2_AMP_ZC_EN_SHIFT, DA7218_SWITCH_EN_MAX,
684 DA7218_NO_INVERT),
685
686 /* ADCs */
687 SOC_SINGLE("ADC1 AAF Switch", DA7218_ADC_1_CTRL,
688 DA7218_ADC_1_AAF_EN_SHIFT, DA7218_SWITCH_EN_MAX,
689 DA7218_NO_INVERT),
690 SOC_SINGLE("ADC2 AAF Switch", DA7218_ADC_2_CTRL,
691 DA7218_ADC_2_AAF_EN_SHIFT, DA7218_SWITCH_EN_MAX,
692 DA7218_NO_INVERT),
693 SOC_SINGLE("ADC LP Mode Switch", DA7218_ADC_MODE,
694 DA7218_ADC_LP_MODE_SHIFT, DA7218_SWITCH_EN_MAX,
695 DA7218_NO_INVERT),
696
697 /* Input Filters */
698 SOC_SINGLE_TLV("In Filter1L Volume", DA7218_IN_1L_GAIN,
699 DA7218_IN_1L_DIGITAL_GAIN_SHIFT,
700 DA7218_IN_DIGITAL_GAIN_MAX, DA7218_NO_INVERT,
701 da7218_in_dig_gain_tlv),
702 SOC_SINGLE("In Filter1L Switch", DA7218_IN_1L_FILTER_CTRL,
703 DA7218_IN_1L_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
704 DA7218_INVERT),
705 SOC_SINGLE("In Filter1L Gain Ramp Switch", DA7218_IN_1L_FILTER_CTRL,
706 DA7218_IN_1L_RAMP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
707 DA7218_NO_INVERT),
708 SOC_SINGLE_TLV("In Filter1R Volume", DA7218_IN_1R_GAIN,
709 DA7218_IN_1R_DIGITAL_GAIN_SHIFT,
710 DA7218_IN_DIGITAL_GAIN_MAX, DA7218_NO_INVERT,
711 da7218_in_dig_gain_tlv),
712 SOC_SINGLE("In Filter1R Switch", DA7218_IN_1R_FILTER_CTRL,
713 DA7218_IN_1R_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
714 DA7218_INVERT),
715 SOC_SINGLE("In Filter1R Gain Ramp Switch",
716 DA7218_IN_1R_FILTER_CTRL, DA7218_IN_1R_RAMP_EN_SHIFT,
717 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
718 SOC_SINGLE_TLV("In Filter2L Volume", DA7218_IN_2L_GAIN,
719 DA7218_IN_2L_DIGITAL_GAIN_SHIFT,
720 DA7218_IN_DIGITAL_GAIN_MAX, DA7218_NO_INVERT,
721 da7218_in_dig_gain_tlv),
722 SOC_SINGLE("In Filter2L Switch", DA7218_IN_2L_FILTER_CTRL,
723 DA7218_IN_2L_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
724 DA7218_INVERT),
725 SOC_SINGLE("In Filter2L Gain Ramp Switch", DA7218_IN_2L_FILTER_CTRL,
726 DA7218_IN_2L_RAMP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
727 DA7218_NO_INVERT),
728 SOC_SINGLE_TLV("In Filter2R Volume", DA7218_IN_2R_GAIN,
729 DA7218_IN_2R_DIGITAL_GAIN_SHIFT,
730 DA7218_IN_DIGITAL_GAIN_MAX, DA7218_NO_INVERT,
731 da7218_in_dig_gain_tlv),
732 SOC_SINGLE("In Filter2R Switch", DA7218_IN_2R_FILTER_CTRL,
733 DA7218_IN_2R_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
734 DA7218_INVERT),
735 SOC_SINGLE("In Filter2R Gain Ramp Switch",
736 DA7218_IN_2R_FILTER_CTRL, DA7218_IN_2R_RAMP_EN_SHIFT,
737 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
738
739 /* AGS */
740 SOC_SINGLE_TLV("AGS Trigger", DA7218_AGS_TRIGGER,
741 DA7218_AGS_TRIGGER_SHIFT, DA7218_AGS_TRIGGER_MAX,
742 DA7218_INVERT, da7218_ags_trigger_tlv),
743 SOC_SINGLE_TLV("AGS Max Attenuation", DA7218_AGS_ATT_MAX,
744 DA7218_AGS_ATT_MAX_SHIFT, DA7218_AGS_ATT_MAX_MAX,
745 DA7218_NO_INVERT, da7218_ags_att_max_tlv),
746 SOC_SINGLE("AGS Anticlip Switch", DA7218_AGS_ANTICLIP_CTRL,
747 DA7218_AGS_ANTICLIP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
748 DA7218_NO_INVERT),
749 SOC_SINGLE("AGS Channel1 Switch", DA7218_AGS_ENABLE,
750 DA7218_AGS_ENABLE_CHAN1_SHIFT, DA7218_SWITCH_EN_MAX,
751 DA7218_NO_INVERT),
752 SOC_SINGLE("AGS Channel2 Switch", DA7218_AGS_ENABLE,
753 DA7218_AGS_ENABLE_CHAN2_SHIFT, DA7218_SWITCH_EN_MAX,
754 DA7218_NO_INVERT),
755
756 /* ALC */
757 SOC_ENUM("ALC Attack Rate", da7218_alc_attack_rate),
758 SOC_ENUM("ALC Release Rate", da7218_alc_release_rate),
759 SOC_ENUM("ALC Hold Time", da7218_alc_hold_time),
760 SOC_SINGLE_TLV("ALC Noise Threshold", DA7218_ALC_NOISE,
761 DA7218_ALC_NOISE_SHIFT, DA7218_ALC_THRESHOLD_MAX,
762 DA7218_INVERT, da7218_alc_threshold_tlv),
763 SOC_SINGLE_TLV("ALC Min Threshold", DA7218_ALC_TARGET_MIN,
764 DA7218_ALC_THRESHOLD_MIN_SHIFT, DA7218_ALC_THRESHOLD_MAX,
765 DA7218_INVERT, da7218_alc_threshold_tlv),
766 SOC_SINGLE_TLV("ALC Max Threshold", DA7218_ALC_TARGET_MAX,
767 DA7218_ALC_THRESHOLD_MAX_SHIFT, DA7218_ALC_THRESHOLD_MAX,
768 DA7218_INVERT, da7218_alc_threshold_tlv),
769 SOC_SINGLE_TLV("ALC Max Attenuation", DA7218_ALC_GAIN_LIMITS,
770 DA7218_ALC_ATTEN_MAX_SHIFT, DA7218_ALC_ATTEN_GAIN_MAX,
771 DA7218_NO_INVERT, da7218_alc_gain_tlv),
772 SOC_SINGLE_TLV("ALC Max Gain", DA7218_ALC_GAIN_LIMITS,
773 DA7218_ALC_GAIN_MAX_SHIFT, DA7218_ALC_ATTEN_GAIN_MAX,
774 DA7218_NO_INVERT, da7218_alc_gain_tlv),
775 SOC_SINGLE_RANGE_TLV("ALC Min Analog Gain", DA7218_ALC_ANA_GAIN_LIMITS,
776 DA7218_ALC_ANA_GAIN_MIN_SHIFT,
777 DA7218_ALC_ANA_GAIN_MIN, DA7218_ALC_ANA_GAIN_MAX,
778 DA7218_NO_INVERT, da7218_alc_ana_gain_tlv),
779 SOC_SINGLE_RANGE_TLV("ALC Max Analog Gain", DA7218_ALC_ANA_GAIN_LIMITS,
780 DA7218_ALC_ANA_GAIN_MAX_SHIFT,
781 DA7218_ALC_ANA_GAIN_MIN, DA7218_ALC_ANA_GAIN_MAX,
782 DA7218_NO_INVERT, da7218_alc_ana_gain_tlv),
783 SOC_ENUM("ALC Anticlip Step", da7218_alc_anticlip_step),
784 SOC_SINGLE("ALC Anticlip Switch", DA7218_ALC_ANTICLIP_CTRL,
785 DA7218_ALC_ANTICLIP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
786 DA7218_NO_INVERT),
787 SOC_DOUBLE_EXT("ALC Channel1 Switch", DA7218_ALC_CTRL1,
788 DA7218_ALC_CHAN1_L_EN_SHIFT, DA7218_ALC_CHAN1_R_EN_SHIFT,
789 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT,
790 snd_soc_get_volsw, da7218_alc_sw_put),
791 SOC_DOUBLE_EXT("ALC Channel2 Switch", DA7218_ALC_CTRL1,
792 DA7218_ALC_CHAN2_L_EN_SHIFT, DA7218_ALC_CHAN2_R_EN_SHIFT,
793 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT,
794 snd_soc_get_volsw, da7218_alc_sw_put),
795
796 /* Envelope Tracking */
797 SOC_ENUM("Envelope Tracking Attack Rate", da7218_integ_attack_rate),
798 SOC_ENUM("Envelope Tracking Release Rate", da7218_integ_release_rate),
799
800 /* Input High-Pass Filters */
801 SOC_ENUM("In Filter1 HPF Mode", da7218_in1_hpf_mode),
802 SOC_ENUM("In Filter1 HPF Corner Audio", da7218_in1_audio_hpf_corner),
803 SOC_ENUM("In Filter1 HPF Corner Voice", da7218_in1_voice_hpf_corner),
804 SOC_ENUM("In Filter2 HPF Mode", da7218_in2_hpf_mode),
805 SOC_ENUM("In Filter2 HPF Corner Audio", da7218_in2_audio_hpf_corner),
806 SOC_ENUM("In Filter2 HPF Corner Voice", da7218_in2_voice_hpf_corner),
807
808 /* Mic Level Detect */
809 SOC_DOUBLE_EXT("Mic Level Detect Channel1 Switch", DA7218_LVL_DET_CTRL,
810 DA7218_LVL_DET_EN_CHAN1L_SHIFT,
811 DA7218_LVL_DET_EN_CHAN1R_SHIFT, DA7218_SWITCH_EN_MAX,
812 DA7218_NO_INVERT, da7218_mic_lvl_det_sw_get,
813 da7218_mic_lvl_det_sw_put),
814 SOC_DOUBLE_EXT("Mic Level Detect Channel2 Switch", DA7218_LVL_DET_CTRL,
815 DA7218_LVL_DET_EN_CHAN2L_SHIFT,
816 DA7218_LVL_DET_EN_CHAN2R_SHIFT, DA7218_SWITCH_EN_MAX,
817 DA7218_NO_INVERT, da7218_mic_lvl_det_sw_get,
818 da7218_mic_lvl_det_sw_put),
819 SOC_SINGLE("Mic Level Detect Level", DA7218_LVL_DET_LEVEL,
820 DA7218_LVL_DET_LEVEL_SHIFT, DA7218_LVL_DET_LEVEL_MAX,
821 DA7218_NO_INVERT),
822
823 /* Digital Mixer (Input) */
824 SOC_SINGLE_TLV("DMix In Filter1L Out1 DAIL Volume",
825 DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN,
826 DA7218_OUTDAI_1L_INFILT_1L_GAIN_SHIFT,
827 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
828 da7218_dmix_gain_tlv),
829 SOC_SINGLE_TLV("DMix In Filter1L Out1 DAIR Volume",
830 DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN,
831 DA7218_OUTDAI_1R_INFILT_1L_GAIN_SHIFT,
832 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
833 da7218_dmix_gain_tlv),
834 SOC_SINGLE_TLV("DMix In Filter1L Out2 DAIL Volume",
835 DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN,
836 DA7218_OUTDAI_2L_INFILT_1L_GAIN_SHIFT,
837 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
838 da7218_dmix_gain_tlv),
839 SOC_SINGLE_TLV("DMix In Filter1L Out2 DAIR Volume",
840 DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN,
841 DA7218_OUTDAI_2R_INFILT_1L_GAIN_SHIFT,
842 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
843 da7218_dmix_gain_tlv),
844
845 SOC_SINGLE_TLV("DMix In Filter1R Out1 DAIL Volume",
846 DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN,
847 DA7218_OUTDAI_1L_INFILT_1R_GAIN_SHIFT,
848 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
849 da7218_dmix_gain_tlv),
850 SOC_SINGLE_TLV("DMix In Filter1R Out1 DAIR Volume",
851 DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN,
852 DA7218_OUTDAI_1R_INFILT_1R_GAIN_SHIFT,
853 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
854 da7218_dmix_gain_tlv),
855 SOC_SINGLE_TLV("DMix In Filter1R Out2 DAIL Volume",
856 DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN,
857 DA7218_OUTDAI_2L_INFILT_1R_GAIN_SHIFT,
858 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
859 da7218_dmix_gain_tlv),
860 SOC_SINGLE_TLV("DMix In Filter1R Out2 DAIR Volume",
861 DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN,
862 DA7218_OUTDAI_2R_INFILT_1R_GAIN_SHIFT,
863 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
864 da7218_dmix_gain_tlv),
865
866 SOC_SINGLE_TLV("DMix In Filter2L Out1 DAIL Volume",
867 DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN,
868 DA7218_OUTDAI_1L_INFILT_2L_GAIN_SHIFT,
869 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
870 da7218_dmix_gain_tlv),
871 SOC_SINGLE_TLV("DMix In Filter2L Out1 DAIR Volume",
872 DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN,
873 DA7218_OUTDAI_1R_INFILT_2L_GAIN_SHIFT,
874 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
875 da7218_dmix_gain_tlv),
876 SOC_SINGLE_TLV("DMix In Filter2L Out2 DAIL Volume",
877 DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN,
878 DA7218_OUTDAI_2L_INFILT_2L_GAIN_SHIFT,
879 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
880 da7218_dmix_gain_tlv),
881 SOC_SINGLE_TLV("DMix In Filter2L Out2 DAIR Volume",
882 DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN,
883 DA7218_OUTDAI_2R_INFILT_2L_GAIN_SHIFT,
884 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
885 da7218_dmix_gain_tlv),
886
887 SOC_SINGLE_TLV("DMix In Filter2R Out1 DAIL Volume",
888 DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN,
889 DA7218_OUTDAI_1L_INFILT_2R_GAIN_SHIFT,
890 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
891 da7218_dmix_gain_tlv),
892 SOC_SINGLE_TLV("DMix In Filter2R Out1 DAIR Volume",
893 DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN,
894 DA7218_OUTDAI_1R_INFILT_2R_GAIN_SHIFT,
895 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
896 da7218_dmix_gain_tlv),
897 SOC_SINGLE_TLV("DMix In Filter2R Out2 DAIL Volume",
898 DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN,
899 DA7218_OUTDAI_2L_INFILT_2R_GAIN_SHIFT,
900 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
901 da7218_dmix_gain_tlv),
902 SOC_SINGLE_TLV("DMix In Filter2R Out2 DAIR Volume",
903 DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN,
904 DA7218_OUTDAI_2R_INFILT_2R_GAIN_SHIFT,
905 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
906 da7218_dmix_gain_tlv),
907
908 SOC_SINGLE_TLV("DMix ToneGen Out1 DAIL Volume",
909 DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN,
910 DA7218_OUTDAI_1L_TONEGEN_GAIN_SHIFT,
911 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
912 da7218_dmix_gain_tlv),
913 SOC_SINGLE_TLV("DMix ToneGen Out1 DAIR Volume",
914 DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN,
915 DA7218_OUTDAI_1R_TONEGEN_GAIN_SHIFT,
916 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
917 da7218_dmix_gain_tlv),
918 SOC_SINGLE_TLV("DMix ToneGen Out2 DAIL Volume",
919 DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN,
920 DA7218_OUTDAI_2L_TONEGEN_GAIN_SHIFT,
921 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
922 da7218_dmix_gain_tlv),
923 SOC_SINGLE_TLV("DMix ToneGen Out2 DAIR Volume",
924 DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN,
925 DA7218_OUTDAI_2R_TONEGEN_GAIN_SHIFT,
926 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
927 da7218_dmix_gain_tlv),
928
929 SOC_SINGLE_TLV("DMix In DAIL Out1 DAIL Volume",
930 DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN,
931 DA7218_OUTDAI_1L_INDAI_1L_GAIN_SHIFT,
932 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
933 da7218_dmix_gain_tlv),
934 SOC_SINGLE_TLV("DMix In DAIL Out1 DAIR Volume",
935 DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN,
936 DA7218_OUTDAI_1R_INDAI_1L_GAIN_SHIFT,
937 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
938 da7218_dmix_gain_tlv),
939 SOC_SINGLE_TLV("DMix In DAIL Out2 DAIL Volume",
940 DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN,
941 DA7218_OUTDAI_2L_INDAI_1L_GAIN_SHIFT,
942 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
943 da7218_dmix_gain_tlv),
944 SOC_SINGLE_TLV("DMix In DAIL Out2 DAIR Volume",
945 DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN,
946 DA7218_OUTDAI_2R_INDAI_1L_GAIN_SHIFT,
947 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
948 da7218_dmix_gain_tlv),
949
950 SOC_SINGLE_TLV("DMix In DAIR Out1 DAIL Volume",
951 DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN,
952 DA7218_OUTDAI_1L_INDAI_1R_GAIN_SHIFT,
953 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
954 da7218_dmix_gain_tlv),
955 SOC_SINGLE_TLV("DMix In DAIR Out1 DAIR Volume",
956 DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN,
957 DA7218_OUTDAI_1R_INDAI_1R_GAIN_SHIFT,
958 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
959 da7218_dmix_gain_tlv),
960 SOC_SINGLE_TLV("DMix In DAIR Out2 DAIL Volume",
961 DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN,
962 DA7218_OUTDAI_2L_INDAI_1R_GAIN_SHIFT,
963 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
964 da7218_dmix_gain_tlv),
965 SOC_SINGLE_TLV("DMix In DAIR Out2 DAIR Volume",
966 DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN,
967 DA7218_OUTDAI_2R_INDAI_1R_GAIN_SHIFT,
968 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
969 da7218_dmix_gain_tlv),
970
971 /* Digital Mixer (Output) */
972 SOC_SINGLE_TLV("DMix In Filter1L Out FilterL Volume",
973 DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN,
974 DA7218_OUTFILT_1L_INFILT_1L_GAIN_SHIFT,
975 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
976 da7218_dmix_gain_tlv),
977 SOC_SINGLE_TLV("DMix In Filter1L Out FilterR Volume",
978 DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN,
979 DA7218_OUTFILT_1R_INFILT_1L_GAIN_SHIFT,
980 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
981 da7218_dmix_gain_tlv),
982
983 SOC_SINGLE_TLV("DMix In Filter1R Out FilterL Volume",
984 DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN,
985 DA7218_OUTFILT_1L_INFILT_1R_GAIN_SHIFT,
986 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
987 da7218_dmix_gain_tlv),
988 SOC_SINGLE_TLV("DMix In Filter1R Out FilterR Volume",
989 DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN,
990 DA7218_OUTFILT_1R_INFILT_1R_GAIN_SHIFT,
991 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
992 da7218_dmix_gain_tlv),
993
994 SOC_SINGLE_TLV("DMix In Filter2L Out FilterL Volume",
995 DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN,
996 DA7218_OUTFILT_1L_INFILT_2L_GAIN_SHIFT,
997 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
998 da7218_dmix_gain_tlv),
999 SOC_SINGLE_TLV("DMix In Filter2L Out FilterR Volume",
1000 DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN,
1001 DA7218_OUTFILT_1R_INFILT_2L_GAIN_SHIFT,
1002 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1003 da7218_dmix_gain_tlv),
1004
1005 SOC_SINGLE_TLV("DMix In Filter2R Out FilterL Volume",
1006 DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN,
1007 DA7218_OUTFILT_1L_INFILT_2R_GAIN_SHIFT,
1008 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1009 da7218_dmix_gain_tlv),
1010 SOC_SINGLE_TLV("DMix In Filter2R Out FilterR Volume",
1011 DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN,
1012 DA7218_OUTFILT_1R_INFILT_2R_GAIN_SHIFT,
1013 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1014 da7218_dmix_gain_tlv),
1015
1016 SOC_SINGLE_TLV("DMix ToneGen Out FilterL Volume",
1017 DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN,
1018 DA7218_OUTFILT_1L_TONEGEN_GAIN_SHIFT,
1019 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1020 da7218_dmix_gain_tlv),
1021 SOC_SINGLE_TLV("DMix ToneGen Out FilterR Volume",
1022 DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN,
1023 DA7218_OUTFILT_1R_TONEGEN_GAIN_SHIFT,
1024 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1025 da7218_dmix_gain_tlv),
1026
1027 SOC_SINGLE_TLV("DMix In DAIL Out FilterL Volume",
1028 DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN,
1029 DA7218_OUTFILT_1L_INDAI_1L_GAIN_SHIFT,
1030 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1031 da7218_dmix_gain_tlv),
1032 SOC_SINGLE_TLV("DMix In DAIL Out FilterR Volume",
1033 DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN,
1034 DA7218_OUTFILT_1R_INDAI_1L_GAIN_SHIFT,
1035 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1036 da7218_dmix_gain_tlv),
1037
1038 SOC_SINGLE_TLV("DMix In DAIR Out FilterL Volume",
1039 DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN,
1040 DA7218_OUTFILT_1L_INDAI_1R_GAIN_SHIFT,
1041 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1042 da7218_dmix_gain_tlv),
1043 SOC_SINGLE_TLV("DMix In DAIR Out FilterR Volume",
1044 DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN,
1045 DA7218_OUTFILT_1R_INDAI_1R_GAIN_SHIFT,
1046 DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1047 da7218_dmix_gain_tlv),
1048
1049 /* Sidetone Filter */
1050 SND_SOC_BYTES_EXT("Sidetone BiQuad Coefficients",
1051 DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE,
1052 da7218_biquad_coeff_get, da7218_biquad_coeff_put),
1053 SOC_SINGLE_TLV("Sidetone Volume", DA7218_SIDETONE_GAIN,
1054 DA7218_SIDETONE_GAIN_SHIFT, DA7218_DMIX_GAIN_MAX,
1055 DA7218_NO_INVERT, da7218_dmix_gain_tlv),
1056 SOC_SINGLE("Sidetone Switch", DA7218_SIDETONE_CTRL,
1057 DA7218_SIDETONE_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1058 DA7218_INVERT),
1059
1060 /* Tone Generator */
1061 SOC_ENUM("ToneGen DTMF Key", da7218_tonegen_dtmf_key),
1062 SOC_SINGLE("ToneGen DTMF Switch", DA7218_TONE_GEN_CFG1,
1063 DA7218_DTMF_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1064 DA7218_NO_INVERT),
1065 SOC_ENUM("ToneGen Sinewave Gen Type", da7218_tonegen_swg_sel),
1066 SOC_SINGLE_EXT("ToneGen Sinewave1 Freq", DA7218_TONE_GEN_FREQ1_L,
1067 DA7218_FREQ1_L_SHIFT, DA7218_FREQ_MAX, DA7218_NO_INVERT,
1068 da7218_tonegen_freq_get, da7218_tonegen_freq_put),
1069 SOC_SINGLE_EXT("ToneGen Sinewave2 Freq", DA7218_TONE_GEN_FREQ2_L,
1070 DA7218_FREQ2_L_SHIFT, DA7218_FREQ_MAX, DA7218_NO_INVERT,
1071 da7218_tonegen_freq_get, da7218_tonegen_freq_put),
1072 SOC_SINGLE("ToneGen On Time", DA7218_TONE_GEN_ON_PER,
1073 DA7218_BEEP_ON_PER_SHIFT, DA7218_BEEP_ON_OFF_MAX,
1074 DA7218_NO_INVERT),
1075 SOC_SINGLE("ToneGen Off Time", DA7218_TONE_GEN_OFF_PER,
1076 DA7218_BEEP_OFF_PER_SHIFT, DA7218_BEEP_ON_OFF_MAX,
1077 DA7218_NO_INVERT),
1078
1079 /* Gain ramping */
1080 SOC_ENUM("Gain Ramp Rate", da7218_gain_ramp_rate),
1081
1082 /* DGS */
1083 SOC_SINGLE_TLV("DGS Trigger", DA7218_DGS_TRIGGER,
1084 DA7218_DGS_TRIGGER_LVL_SHIFT, DA7218_DGS_TRIGGER_MAX,
1085 DA7218_INVERT, da7218_dgs_trigger_tlv),
1086 SOC_ENUM("DGS Rise Coefficient", da7218_dgs_rise_coeff),
1087 SOC_ENUM("DGS Fall Coefficient", da7218_dgs_fall_coeff),
1088 SOC_SINGLE("DGS Sync Delay", DA7218_DGS_SYNC_DELAY,
1089 DA7218_DGS_SYNC_DELAY_SHIFT, DA7218_DGS_SYNC_DELAY_MAX,
1090 DA7218_NO_INVERT),
1091 SOC_SINGLE("DGS Fast SR Sync Delay", DA7218_DGS_SYNC_DELAY2,
1092 DA7218_DGS_SYNC_DELAY2_SHIFT, DA7218_DGS_SYNC_DELAY_MAX,
1093 DA7218_NO_INVERT),
1094 SOC_SINGLE("DGS Voice Filter Sync Delay", DA7218_DGS_SYNC_DELAY3,
1095 DA7218_DGS_SYNC_DELAY3_SHIFT, DA7218_DGS_SYNC_DELAY3_MAX,
1096 DA7218_NO_INVERT),
1097 SOC_SINGLE_TLV("DGS Anticlip Level", DA7218_DGS_LEVELS,
1098 DA7218_DGS_ANTICLIP_LVL_SHIFT,
1099 DA7218_DGS_ANTICLIP_LVL_MAX, DA7218_INVERT,
1100 da7218_dgs_anticlip_tlv),
1101 SOC_SINGLE_TLV("DGS Signal Level", DA7218_DGS_LEVELS,
1102 DA7218_DGS_SIGNAL_LVL_SHIFT, DA7218_DGS_SIGNAL_LVL_MAX,
1103 DA7218_INVERT, da7218_dgs_signal_tlv),
1104 SOC_SINGLE("DGS Gain Subrange Switch", DA7218_DGS_GAIN_CTRL,
1105 DA7218_DGS_SUBR_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1106 DA7218_NO_INVERT),
1107 SOC_SINGLE("DGS Gain Ramp Switch", DA7218_DGS_GAIN_CTRL,
1108 DA7218_DGS_RAMP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1109 DA7218_NO_INVERT),
1110 SOC_SINGLE("DGS Gain Steps", DA7218_DGS_GAIN_CTRL,
1111 DA7218_DGS_STEPS_SHIFT, DA7218_DGS_STEPS_MAX,
1112 DA7218_NO_INVERT),
1113 SOC_DOUBLE("DGS Switch", DA7218_DGS_ENABLE, DA7218_DGS_ENABLE_L_SHIFT,
1114 DA7218_DGS_ENABLE_R_SHIFT, DA7218_SWITCH_EN_MAX,
1115 DA7218_NO_INVERT),
1116
1117 /* Output High-Pass Filter */
1118 SOC_ENUM("Out Filter HPF Mode", da7218_out1_hpf_mode),
1119 SOC_ENUM("Out Filter HPF Corner Audio", da7218_out1_audio_hpf_corner),
1120 SOC_ENUM("Out Filter HPF Corner Voice", da7218_out1_voice_hpf_corner),
1121
1122 /* 5-Band Equaliser */
1123 SOC_SINGLE_TLV("Out EQ Band1 Volume", DA7218_OUT_1_EQ_12_FILTER_CTRL,
1124 DA7218_OUT_1_EQ_BAND1_SHIFT, DA7218_OUT_EQ_BAND_MAX,
1125 DA7218_NO_INVERT, da7218_out_eq_band_tlv),
1126 SOC_SINGLE_TLV("Out EQ Band2 Volume", DA7218_OUT_1_EQ_12_FILTER_CTRL,
1127 DA7218_OUT_1_EQ_BAND2_SHIFT, DA7218_OUT_EQ_BAND_MAX,
1128 DA7218_NO_INVERT, da7218_out_eq_band_tlv),
1129 SOC_SINGLE_TLV("Out EQ Band3 Volume", DA7218_OUT_1_EQ_34_FILTER_CTRL,
1130 DA7218_OUT_1_EQ_BAND3_SHIFT, DA7218_OUT_EQ_BAND_MAX,
1131 DA7218_NO_INVERT, da7218_out_eq_band_tlv),
1132 SOC_SINGLE_TLV("Out EQ Band4 Volume", DA7218_OUT_1_EQ_34_FILTER_CTRL,
1133 DA7218_OUT_1_EQ_BAND4_SHIFT, DA7218_OUT_EQ_BAND_MAX,
1134 DA7218_NO_INVERT, da7218_out_eq_band_tlv),
1135 SOC_SINGLE_TLV("Out EQ Band5 Volume", DA7218_OUT_1_EQ_5_FILTER_CTRL,
1136 DA7218_OUT_1_EQ_BAND5_SHIFT, DA7218_OUT_EQ_BAND_MAX,
1137 DA7218_NO_INVERT, da7218_out_eq_band_tlv),
1138 SOC_SINGLE("Out EQ Switch", DA7218_OUT_1_EQ_5_FILTER_CTRL,
1139 DA7218_OUT_1_EQ_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1140 DA7218_NO_INVERT),
1141
1142 /* BiQuad Filters */
1143 SND_SOC_BYTES_EXT("BiQuad Coefficients",
1144 DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE,
1145 da7218_biquad_coeff_get, da7218_biquad_coeff_put),
1146 SOC_SINGLE("BiQuad Filter Switch", DA7218_OUT_1_BIQ_5STAGE_CTRL,
1147 DA7218_OUT_1_BIQ_5STAGE_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1148 DA7218_INVERT),
1149
1150 /* Output Filters */
1151 SOC_DOUBLE_R_RANGE_TLV("Out Filter Volume", DA7218_OUT_1L_GAIN,
1152 DA7218_OUT_1R_GAIN,
1153 DA7218_OUT_1L_DIGITAL_GAIN_SHIFT,
1154 DA7218_OUT_DIGITAL_GAIN_MIN,
1155 DA7218_OUT_DIGITAL_GAIN_MAX, DA7218_NO_INVERT,
1156 da7218_out_dig_gain_tlv),
1157 SOC_DOUBLE_R("Out Filter Switch", DA7218_OUT_1L_FILTER_CTRL,
1158 DA7218_OUT_1R_FILTER_CTRL, DA7218_OUT_1L_MUTE_EN_SHIFT,
1159 DA7218_SWITCH_EN_MAX, DA7218_INVERT),
1160 SOC_DOUBLE_R("Out Filter Gain Subrange Switch",
1161 DA7218_OUT_1L_FILTER_CTRL, DA7218_OUT_1R_FILTER_CTRL,
1162 DA7218_OUT_1L_SUBRANGE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1163 DA7218_NO_INVERT),
1164 SOC_DOUBLE_R("Out Filter Gain Ramp Switch", DA7218_OUT_1L_FILTER_CTRL,
1165 DA7218_OUT_1R_FILTER_CTRL, DA7218_OUT_1L_RAMP_EN_SHIFT,
1166 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
1167
1168 /* Mixer Output */
1169 SOC_DOUBLE_R_RANGE_TLV("Mixout Volume", DA7218_MIXOUT_L_GAIN,
1170 DA7218_MIXOUT_R_GAIN,
1171 DA7218_MIXOUT_L_AMP_GAIN_SHIFT,
1172 DA7218_MIXOUT_AMP_GAIN_MIN,
1173 DA7218_MIXOUT_AMP_GAIN_MAX, DA7218_NO_INVERT,
1174 da7218_mixout_gain_tlv),
1175
1176 /* DAC Noise Gate */
1177 SOC_ENUM("DAC NG Setup Time", da7218_dac_ng_setup_time),
1178 SOC_ENUM("DAC NG Rampup Rate", da7218_dac_ng_rampup_rate),
1179 SOC_ENUM("DAC NG Rampdown Rate", da7218_dac_ng_rampdown_rate),
1180 SOC_SINGLE_TLV("DAC NG Off Threshold", DA7218_DAC_NG_OFF_THRESH,
1181 DA7218_DAC_NG_OFF_THRESHOLD_SHIFT,
1182 DA7218_DAC_NG_THRESHOLD_MAX, DA7218_NO_INVERT,
1183 da7218_dac_ng_threshold_tlv),
1184 SOC_SINGLE_TLV("DAC NG On Threshold", DA7218_DAC_NG_ON_THRESH,
1185 DA7218_DAC_NG_ON_THRESHOLD_SHIFT,
1186 DA7218_DAC_NG_THRESHOLD_MAX, DA7218_NO_INVERT,
1187 da7218_dac_ng_threshold_tlv),
1188 SOC_SINGLE("DAC NG Switch", DA7218_DAC_NG_CTRL, DA7218_DAC_NG_EN_SHIFT,
1189 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
1190
1191 /* CP */
1192 SOC_ENUM("Charge Pump Track Mode", da7218_cp_mchange),
1193 SOC_ENUM("Charge Pump Frequency", da7218_cp_fcontrol),
1194 SOC_ENUM("Charge Pump Decay Rate", da7218_cp_tau_delay),
1195 SOC_SINGLE("Charge Pump Threshold", DA7218_CP_VOL_THRESHOLD1,
1196 DA7218_CP_THRESH_VDD2_SHIFT, DA7218_CP_THRESH_VDD2_MAX,
1197 DA7218_NO_INVERT),
1198
1199 /* Headphones */
1200 SOC_DOUBLE_R_RANGE_TLV("Headphone Volume", DA7218_HP_L_GAIN,
1201 DA7218_HP_R_GAIN, DA7218_HP_L_AMP_GAIN_SHIFT,
1202 DA7218_HP_AMP_GAIN_MIN, DA7218_HP_AMP_GAIN_MAX,
1203 DA7218_NO_INVERT, da7218_hp_gain_tlv),
1204 SOC_DOUBLE_R("Headphone Switch", DA7218_HP_L_CTRL, DA7218_HP_R_CTRL,
1205 DA7218_HP_L_AMP_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1206 DA7218_INVERT),
1207 SOC_DOUBLE_R("Headphone Gain Ramp Switch", DA7218_HP_L_CTRL,
1208 DA7218_HP_R_CTRL, DA7218_HP_L_AMP_RAMP_EN_SHIFT,
1209 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
1210 SOC_DOUBLE_R("Headphone ZC Gain Switch", DA7218_HP_L_CTRL,
1211 DA7218_HP_R_CTRL, DA7218_HP_L_AMP_ZC_EN_SHIFT,
1212 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
1213 };
1214
1215
1216 /*
1217 * DAPM Mux Controls
1218 */
1219
1220 static const char * const da7218_mic_sel_text[] = { "Analog", "Digital" };
1221
1222 static const struct soc_enum da7218_mic1_sel =
1223 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(da7218_mic_sel_text),
1224 da7218_mic_sel_text);
1225
1226 static const struct snd_kcontrol_new da7218_mic1_sel_mux =
1227 SOC_DAPM_ENUM("Mic1 Mux", da7218_mic1_sel);
1228
1229 static const struct soc_enum da7218_mic2_sel =
1230 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(da7218_mic_sel_text),
1231 da7218_mic_sel_text);
1232
1233 static const struct snd_kcontrol_new da7218_mic2_sel_mux =
1234 SOC_DAPM_ENUM("Mic2 Mux", da7218_mic2_sel);
1235
1236 static const char * const da7218_sidetone_in_sel_txt[] = {
1237 "In Filter1L", "In Filter1R", "In Filter2L", "In Filter2R"
1238 };
1239
1240 static const struct soc_enum da7218_sidetone_in_sel =
1241 SOC_ENUM_SINGLE(DA7218_SIDETONE_IN_SELECT,
1242 DA7218_SIDETONE_IN_SELECT_SHIFT,
1243 DA7218_SIDETONE_IN_SELECT_MAX,
1244 da7218_sidetone_in_sel_txt);
1245
1246 static const struct snd_kcontrol_new da7218_sidetone_in_sel_mux =
1247 SOC_DAPM_ENUM("Sidetone Mux", da7218_sidetone_in_sel);
1248
1249 static const char * const da7218_out_filt_biq_sel_txt[] = {
1250 "Bypass", "Enabled"
1251 };
1252
1253 static const struct soc_enum da7218_out_filtl_biq_sel =
1254 SOC_ENUM_SINGLE(DA7218_OUT_1L_FILTER_CTRL,
1255 DA7218_OUT_1L_BIQ_5STAGE_SEL_SHIFT,
1256 DA7218_OUT_BIQ_5STAGE_SEL_MAX,
1257 da7218_out_filt_biq_sel_txt);
1258
1259 static const struct snd_kcontrol_new da7218_out_filtl_biq_sel_mux =
1260 SOC_DAPM_ENUM("Out FilterL BiQuad Mux", da7218_out_filtl_biq_sel);
1261
1262 static const struct soc_enum da7218_out_filtr_biq_sel =
1263 SOC_ENUM_SINGLE(DA7218_OUT_1R_FILTER_CTRL,
1264 DA7218_OUT_1R_BIQ_5STAGE_SEL_SHIFT,
1265 DA7218_OUT_BIQ_5STAGE_SEL_MAX,
1266 da7218_out_filt_biq_sel_txt);
1267
1268 static const struct snd_kcontrol_new da7218_out_filtr_biq_sel_mux =
1269 SOC_DAPM_ENUM("Out FilterR BiQuad Mux", da7218_out_filtr_biq_sel);
1270
1271
1272 /*
1273 * DAPM Mixer Controls
1274 */
1275
1276 #define DA7218_DMIX_CTRLS(reg) \
1277 SOC_DAPM_SINGLE("In Filter1L Switch", reg, \
1278 DA7218_DMIX_SRC_INFILT1L, \
1279 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1280 SOC_DAPM_SINGLE("In Filter1R Switch", reg, \
1281 DA7218_DMIX_SRC_INFILT1R, \
1282 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1283 SOC_DAPM_SINGLE("In Filter2L Switch", reg, \
1284 DA7218_DMIX_SRC_INFILT2L, \
1285 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1286 SOC_DAPM_SINGLE("In Filter2R Switch", reg, \
1287 DA7218_DMIX_SRC_INFILT2R, \
1288 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1289 SOC_DAPM_SINGLE("ToneGen Switch", reg, \
1290 DA7218_DMIX_SRC_TONEGEN, \
1291 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1292 SOC_DAPM_SINGLE("DAIL Switch", reg, DA7218_DMIX_SRC_DAIL, \
1293 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1294 SOC_DAPM_SINGLE("DAIR Switch", reg, DA7218_DMIX_SRC_DAIR, \
1295 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT)
1296
1297 static const struct snd_kcontrol_new da7218_out_dai1l_mix_controls[] = {
1298 DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTDAI_1L),
1299 };
1300
1301 static const struct snd_kcontrol_new da7218_out_dai1r_mix_controls[] = {
1302 DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTDAI_1R),
1303 };
1304
1305 static const struct snd_kcontrol_new da7218_out_dai2l_mix_controls[] = {
1306 DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTDAI_2L),
1307 };
1308
1309 static const struct snd_kcontrol_new da7218_out_dai2r_mix_controls[] = {
1310 DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTDAI_2R),
1311 };
1312
1313 static const struct snd_kcontrol_new da7218_out_filtl_mix_controls[] = {
1314 DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTFILT_1L),
1315 };
1316
1317 static const struct snd_kcontrol_new da7218_out_filtr_mix_controls[] = {
1318 DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTFILT_1R),
1319 };
1320
1321 #define DA7218_DMIX_ST_CTRLS(reg) \
1322 SOC_DAPM_SINGLE("Out FilterL Switch", reg, \
1323 DA7218_DMIX_ST_SRC_OUTFILT1L, \
1324 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1325 SOC_DAPM_SINGLE("Out FilterR Switch", reg, \
1326 DA7218_DMIX_ST_SRC_OUTFILT1R, \
1327 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1328 SOC_DAPM_SINGLE("Sidetone Switch", reg, \
1329 DA7218_DMIX_ST_SRC_SIDETONE, \
1330 DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT) \
1331
1332 static const struct snd_kcontrol_new da7218_st_out_filtl_mix_controls[] = {
1333 DA7218_DMIX_ST_CTRLS(DA7218_DROUTING_ST_OUTFILT_1L),
1334 };
1335
1336 static const struct snd_kcontrol_new da7218_st_out_filtr_mix_controls[] = {
1337 DA7218_DMIX_ST_CTRLS(DA7218_DROUTING_ST_OUTFILT_1R),
1338 };
1339
1340
1341 /*
1342 * DAPM Events
1343 */
1344
1345 /*
1346 * We keep track of which input filters are enabled. This is used in the logic
1347 * for controlling the mic level detect feature.
1348 */
1349 static int da7218_in_filter_event(struct snd_soc_dapm_widget *w,
1350 struct snd_kcontrol *kcontrol, int event)
1351 {
1352 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1353 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1354 u8 mask;
1355
1356 switch (w->reg) {
1357 case DA7218_IN_1L_FILTER_CTRL:
1358 mask = (1 << DA7218_LVL_DET_EN_CHAN1L_SHIFT);
1359 break;
1360 case DA7218_IN_1R_FILTER_CTRL:
1361 mask = (1 << DA7218_LVL_DET_EN_CHAN1R_SHIFT);
1362 break;
1363 case DA7218_IN_2L_FILTER_CTRL:
1364 mask = (1 << DA7218_LVL_DET_EN_CHAN2L_SHIFT);
1365 break;
1366 case DA7218_IN_2R_FILTER_CTRL:
1367 mask = (1 << DA7218_LVL_DET_EN_CHAN2R_SHIFT);
1368 break;
1369 default:
1370 return -EINVAL;
1371 }
1372
1373 switch (event) {
1374 case SND_SOC_DAPM_POST_PMU:
1375 da7218->in_filt_en |= mask;
1376 /*
1377 * If we're enabling path for mic level detect, wait for path
1378 * to settle before enabling feature to avoid incorrect and
1379 * unwanted detect events.
1380 */
1381 if (mask & da7218->mic_lvl_det_en)
1382 msleep(DA7218_MIC_LVL_DET_DELAY);
1383 break;
1384 case SND_SOC_DAPM_PRE_PMD:
1385 da7218->in_filt_en &= ~mask;
1386 break;
1387 default:
1388 return -EINVAL;
1389 }
1390
1391 /* Enable configured level detection paths */
1392 snd_soc_write(codec, DA7218_LVL_DET_CTRL,
1393 (da7218->in_filt_en & da7218->mic_lvl_det_en));
1394
1395 return 0;
1396 }
1397
1398 static int da7218_dai_event(struct snd_soc_dapm_widget *w,
1399 struct snd_kcontrol *kcontrol, int event)
1400 {
1401 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1402 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1403 u8 pll_ctrl, pll_status, refosc_cal;
1404 int i;
1405 bool success;
1406
1407 switch (event) {
1408 case SND_SOC_DAPM_POST_PMU:
1409 if (da7218->master)
1410 /* Enable DAI clks for master mode */
1411 snd_soc_update_bits(codec, DA7218_DAI_CLK_MODE,
1412 DA7218_DAI_CLK_EN_MASK,
1413 DA7218_DAI_CLK_EN_MASK);
1414
1415 /* Tune reference oscillator */
1416 snd_soc_write(codec, DA7218_PLL_REFOSC_CAL,
1417 DA7218_PLL_REFOSC_CAL_START_MASK);
1418 snd_soc_write(codec, DA7218_PLL_REFOSC_CAL,
1419 DA7218_PLL_REFOSC_CAL_START_MASK |
1420 DA7218_PLL_REFOSC_CAL_EN_MASK);
1421
1422 /* Check tuning complete */
1423 i = 0;
1424 success = false;
1425 do {
1426 refosc_cal = snd_soc_read(codec, DA7218_PLL_REFOSC_CAL);
1427 if (!(refosc_cal & DA7218_PLL_REFOSC_CAL_START_MASK)) {
1428 success = true;
1429 } else {
1430 ++i;
1431 usleep_range(DA7218_REF_OSC_CHECK_DELAY_MIN,
1432 DA7218_REF_OSC_CHECK_DELAY_MAX);
1433 }
1434 } while ((i < DA7218_REF_OSC_CHECK_TRIES) && (!success));
1435
1436 if (!success)
1437 dev_warn(codec->dev,
1438 "Reference oscillator failed calibration\n");
1439
1440 /* PC synchronised to DAI */
1441 snd_soc_write(codec, DA7218_PC_COUNT,
1442 DA7218_PC_RESYNC_AUTO_MASK);
1443
1444 /* If SRM not enabled, we don't need to check status */
1445 pll_ctrl = snd_soc_read(codec, DA7218_PLL_CTRL);
1446 if ((pll_ctrl & DA7218_PLL_MODE_MASK) != DA7218_PLL_MODE_SRM)
1447 return 0;
1448
1449 /* Check SRM has locked */
1450 i = 0;
1451 success = false;
1452 do {
1453 pll_status = snd_soc_read(codec, DA7218_PLL_STATUS);
1454 if (pll_status & DA7218_PLL_SRM_STATUS_SRM_LOCK) {
1455 success = true;
1456 } else {
1457 ++i;
1458 msleep(DA7218_SRM_CHECK_DELAY);
1459 }
1460 } while ((i < DA7218_SRM_CHECK_TRIES) & (!success));
1461
1462 if (!success)
1463 dev_warn(codec->dev, "SRM failed to lock\n");
1464
1465 return 0;
1466 case SND_SOC_DAPM_POST_PMD:
1467 /* PC free-running */
1468 snd_soc_write(codec, DA7218_PC_COUNT, DA7218_PC_FREERUN_MASK);
1469
1470 if (da7218->master)
1471 /* Disable DAI clks for master mode */
1472 snd_soc_update_bits(codec, DA7218_DAI_CLK_MODE,
1473 DA7218_DAI_CLK_EN_MASK, 0);
1474
1475 return 0;
1476 default:
1477 return -EINVAL;
1478 }
1479 }
1480
1481 static int da7218_cp_event(struct snd_soc_dapm_widget *w,
1482 struct snd_kcontrol *kcontrol, int event)
1483 {
1484 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1485 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1486
1487 /*
1488 * If this is DA7217 and we're using single supply for differential
1489 * output, we really don't want to touch the charge pump.
1490 */
1491 if (da7218->hp_single_supply)
1492 return 0;
1493
1494 switch (event) {
1495 case SND_SOC_DAPM_PRE_PMU:
1496 snd_soc_update_bits(codec, DA7218_CP_CTRL, DA7218_CP_EN_MASK,
1497 DA7218_CP_EN_MASK);
1498 return 0;
1499 case SND_SOC_DAPM_PRE_PMD:
1500 snd_soc_update_bits(codec, DA7218_CP_CTRL, DA7218_CP_EN_MASK,
1501 0);
1502 return 0;
1503 default:
1504 return -EINVAL;
1505 }
1506 }
1507
1508 static int da7218_hp_pga_event(struct snd_soc_dapm_widget *w,
1509 struct snd_kcontrol *kcontrol, int event)
1510 {
1511 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1512
1513 switch (event) {
1514 case SND_SOC_DAPM_POST_PMU:
1515 /* Enable headphone output */
1516 snd_soc_update_bits(codec, w->reg, DA7218_HP_AMP_OE_MASK,
1517 DA7218_HP_AMP_OE_MASK);
1518 return 0;
1519 case SND_SOC_DAPM_PRE_PMD:
1520 /* Headphone output high impedance */
1521 snd_soc_update_bits(codec, w->reg, DA7218_HP_AMP_OE_MASK, 0);
1522 return 0;
1523 default:
1524 return -EINVAL;
1525 }
1526 }
1527
1528
1529 /*
1530 * DAPM Widgets
1531 */
1532
1533 static const struct snd_soc_dapm_widget da7218_dapm_widgets[] = {
1534 /* Input Supplies */
1535 SND_SOC_DAPM_SUPPLY("Mic Bias1", DA7218_MICBIAS_EN,
1536 DA7218_MICBIAS_1_EN_SHIFT, DA7218_NO_INVERT,
1537 NULL, 0),
1538 SND_SOC_DAPM_SUPPLY("Mic Bias2", DA7218_MICBIAS_EN,
1539 DA7218_MICBIAS_2_EN_SHIFT, DA7218_NO_INVERT,
1540 NULL, 0),
1541 SND_SOC_DAPM_SUPPLY("DMic1 Left", DA7218_DMIC_1_CTRL,
1542 DA7218_DMIC_1L_EN_SHIFT, DA7218_NO_INVERT,
1543 NULL, 0),
1544 SND_SOC_DAPM_SUPPLY("DMic1 Right", DA7218_DMIC_1_CTRL,
1545 DA7218_DMIC_1R_EN_SHIFT, DA7218_NO_INVERT,
1546 NULL, 0),
1547 SND_SOC_DAPM_SUPPLY("DMic2 Left", DA7218_DMIC_2_CTRL,
1548 DA7218_DMIC_2L_EN_SHIFT, DA7218_NO_INVERT,
1549 NULL, 0),
1550 SND_SOC_DAPM_SUPPLY("DMic2 Right", DA7218_DMIC_2_CTRL,
1551 DA7218_DMIC_2R_EN_SHIFT, DA7218_NO_INVERT,
1552 NULL, 0),
1553
1554 /* Inputs */
1555 SND_SOC_DAPM_INPUT("MIC1"),
1556 SND_SOC_DAPM_INPUT("MIC2"),
1557 SND_SOC_DAPM_INPUT("DMIC1L"),
1558 SND_SOC_DAPM_INPUT("DMIC1R"),
1559 SND_SOC_DAPM_INPUT("DMIC2L"),
1560 SND_SOC_DAPM_INPUT("DMIC2R"),
1561
1562 /* Input Mixer Supplies */
1563 SND_SOC_DAPM_SUPPLY("Mixin1 Supply", DA7218_MIXIN_1_CTRL,
1564 DA7218_MIXIN_1_MIX_SEL_SHIFT, DA7218_NO_INVERT,
1565 NULL, 0),
1566 SND_SOC_DAPM_SUPPLY("Mixin2 Supply", DA7218_MIXIN_2_CTRL,
1567 DA7218_MIXIN_2_MIX_SEL_SHIFT, DA7218_NO_INVERT,
1568 NULL, 0),
1569
1570 /* Input PGAs */
1571 SND_SOC_DAPM_PGA("Mic1 PGA", DA7218_MIC_1_CTRL,
1572 DA7218_MIC_1_AMP_EN_SHIFT, DA7218_NO_INVERT,
1573 NULL, 0),
1574 SND_SOC_DAPM_PGA("Mic2 PGA", DA7218_MIC_2_CTRL,
1575 DA7218_MIC_2_AMP_EN_SHIFT, DA7218_NO_INVERT,
1576 NULL, 0),
1577 SND_SOC_DAPM_PGA("Mixin1 PGA", DA7218_MIXIN_1_CTRL,
1578 DA7218_MIXIN_1_AMP_EN_SHIFT, DA7218_NO_INVERT,
1579 NULL, 0),
1580 SND_SOC_DAPM_PGA("Mixin2 PGA", DA7218_MIXIN_2_CTRL,
1581 DA7218_MIXIN_2_AMP_EN_SHIFT, DA7218_NO_INVERT,
1582 NULL, 0),
1583
1584 /* Mic/DMic Muxes */
1585 SND_SOC_DAPM_MUX("Mic1 Mux", SND_SOC_NOPM, 0, 0, &da7218_mic1_sel_mux),
1586 SND_SOC_DAPM_MUX("Mic2 Mux", SND_SOC_NOPM, 0, 0, &da7218_mic2_sel_mux),
1587
1588 /* Input Filters */
1589 SND_SOC_DAPM_ADC_E("In Filter1L", NULL, DA7218_IN_1L_FILTER_CTRL,
1590 DA7218_IN_1L_FILTER_EN_SHIFT, DA7218_NO_INVERT,
1591 da7218_in_filter_event,
1592 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1593 SND_SOC_DAPM_ADC_E("In Filter1R", NULL, DA7218_IN_1R_FILTER_CTRL,
1594 DA7218_IN_1R_FILTER_EN_SHIFT, DA7218_NO_INVERT,
1595 da7218_in_filter_event,
1596 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1597 SND_SOC_DAPM_ADC_E("In Filter2L", NULL, DA7218_IN_2L_FILTER_CTRL,
1598 DA7218_IN_2L_FILTER_EN_SHIFT, DA7218_NO_INVERT,
1599 da7218_in_filter_event,
1600 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1601 SND_SOC_DAPM_ADC_E("In Filter2R", NULL, DA7218_IN_2R_FILTER_CTRL,
1602 DA7218_IN_2R_FILTER_EN_SHIFT, DA7218_NO_INVERT,
1603 da7218_in_filter_event,
1604 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1605
1606 /* Tone Generator */
1607 SND_SOC_DAPM_SIGGEN("TONE"),
1608 SND_SOC_DAPM_PGA("Tone Generator", DA7218_TONE_GEN_CFG1,
1609 DA7218_START_STOPN_SHIFT, DA7218_NO_INVERT, NULL, 0),
1610
1611 /* Sidetone Input */
1612 SND_SOC_DAPM_MUX("Sidetone Mux", SND_SOC_NOPM, 0, 0,
1613 &da7218_sidetone_in_sel_mux),
1614 SND_SOC_DAPM_ADC("Sidetone Filter", NULL, DA7218_SIDETONE_CTRL,
1615 DA7218_SIDETONE_FILTER_EN_SHIFT, DA7218_NO_INVERT),
1616
1617 /* Input Mixers */
1618 SND_SOC_DAPM_MIXER("Mixer DAI1L", SND_SOC_NOPM, 0, 0,
1619 da7218_out_dai1l_mix_controls,
1620 ARRAY_SIZE(da7218_out_dai1l_mix_controls)),
1621 SND_SOC_DAPM_MIXER("Mixer DAI1R", SND_SOC_NOPM, 0, 0,
1622 da7218_out_dai1r_mix_controls,
1623 ARRAY_SIZE(da7218_out_dai1r_mix_controls)),
1624 SND_SOC_DAPM_MIXER("Mixer DAI2L", SND_SOC_NOPM, 0, 0,
1625 da7218_out_dai2l_mix_controls,
1626 ARRAY_SIZE(da7218_out_dai2l_mix_controls)),
1627 SND_SOC_DAPM_MIXER("Mixer DAI2R", SND_SOC_NOPM, 0, 0,
1628 da7218_out_dai2r_mix_controls,
1629 ARRAY_SIZE(da7218_out_dai2r_mix_controls)),
1630
1631 /* DAI Supply */
1632 SND_SOC_DAPM_SUPPLY("DAI", DA7218_DAI_CTRL, DA7218_DAI_EN_SHIFT,
1633 DA7218_NO_INVERT, da7218_dai_event,
1634 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1635
1636 /* DAI */
1637 SND_SOC_DAPM_AIF_OUT("DAIOUT", "Capture", 0, SND_SOC_NOPM, 0, 0),
1638 SND_SOC_DAPM_AIF_IN("DAIIN", "Playback", 0, SND_SOC_NOPM, 0, 0),
1639
1640 /* Output Mixers */
1641 SND_SOC_DAPM_MIXER("Mixer Out FilterL", SND_SOC_NOPM, 0, 0,
1642 da7218_out_filtl_mix_controls,
1643 ARRAY_SIZE(da7218_out_filtl_mix_controls)),
1644 SND_SOC_DAPM_MIXER("Mixer Out FilterR", SND_SOC_NOPM, 0, 0,
1645 da7218_out_filtr_mix_controls,
1646 ARRAY_SIZE(da7218_out_filtr_mix_controls)),
1647
1648 /* BiQuad Filters */
1649 SND_SOC_DAPM_MUX("Out FilterL BiQuad Mux", SND_SOC_NOPM, 0, 0,
1650 &da7218_out_filtl_biq_sel_mux),
1651 SND_SOC_DAPM_MUX("Out FilterR BiQuad Mux", SND_SOC_NOPM, 0, 0,
1652 &da7218_out_filtr_biq_sel_mux),
1653 SND_SOC_DAPM_DAC("BiQuad Filter", NULL, DA7218_OUT_1_BIQ_5STAGE_CTRL,
1654 DA7218_OUT_1_BIQ_5STAGE_FILTER_EN_SHIFT,
1655 DA7218_NO_INVERT),
1656
1657 /* Sidetone Mixers */
1658 SND_SOC_DAPM_MIXER("ST Mixer Out FilterL", SND_SOC_NOPM, 0, 0,
1659 da7218_st_out_filtl_mix_controls,
1660 ARRAY_SIZE(da7218_st_out_filtl_mix_controls)),
1661 SND_SOC_DAPM_MIXER("ST Mixer Out FilterR", SND_SOC_NOPM, 0, 0,
1662 da7218_st_out_filtr_mix_controls,
1663 ARRAY_SIZE(da7218_st_out_filtr_mix_controls)),
1664
1665 /* Output Filters */
1666 SND_SOC_DAPM_DAC("Out FilterL", NULL, DA7218_OUT_1L_FILTER_CTRL,
1667 DA7218_OUT_1L_FILTER_EN_SHIFT, DA7218_NO_INVERT),
1668 SND_SOC_DAPM_DAC("Out FilterR", NULL, DA7218_OUT_1R_FILTER_CTRL,
1669 DA7218_IN_1R_FILTER_EN_SHIFT, DA7218_NO_INVERT),
1670
1671 /* Output PGAs */
1672 SND_SOC_DAPM_PGA("Mixout Left PGA", DA7218_MIXOUT_L_CTRL,
1673 DA7218_MIXOUT_L_AMP_EN_SHIFT, DA7218_NO_INVERT,
1674 NULL, 0),
1675 SND_SOC_DAPM_PGA("Mixout Right PGA", DA7218_MIXOUT_R_CTRL,
1676 DA7218_MIXOUT_R_AMP_EN_SHIFT, DA7218_NO_INVERT,
1677 NULL, 0),
1678 SND_SOC_DAPM_PGA_E("Headphone Left PGA", DA7218_HP_L_CTRL,
1679 DA7218_HP_L_AMP_EN_SHIFT, DA7218_NO_INVERT, NULL, 0,
1680 da7218_hp_pga_event,
1681 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1682 SND_SOC_DAPM_PGA_E("Headphone Right PGA", DA7218_HP_R_CTRL,
1683 DA7218_HP_R_AMP_EN_SHIFT, DA7218_NO_INVERT, NULL, 0,
1684 da7218_hp_pga_event,
1685 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1686
1687 /* Output Supplies */
1688 SND_SOC_DAPM_SUPPLY("Charge Pump", SND_SOC_NOPM, 0, 0, da7218_cp_event,
1689 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
1690
1691 /* Outputs */
1692 SND_SOC_DAPM_OUTPUT("HPL"),
1693 SND_SOC_DAPM_OUTPUT("HPR"),
1694 };
1695
1696
1697 /*
1698 * DAPM Mixer Routes
1699 */
1700
1701 #define DA7218_DMIX_ROUTES(name) \
1702 {name, "In Filter1L Switch", "In Filter1L"}, \
1703 {name, "In Filter1R Switch", "In Filter1R"}, \
1704 {name, "In Filter2L Switch", "In Filter2L"}, \
1705 {name, "In Filter2R Switch", "In Filter2R"}, \
1706 {name, "ToneGen Switch", "Tone Generator"}, \
1707 {name, "DAIL Switch", "DAIIN"}, \
1708 {name, "DAIR Switch", "DAIIN"}
1709
1710 #define DA7218_DMIX_ST_ROUTES(name) \
1711 {name, "Out FilterL Switch", "Out FilterL BiQuad Mux"}, \
1712 {name, "Out FilterR Switch", "Out FilterR BiQuad Mux"}, \
1713 {name, "Sidetone Switch", "Sidetone Filter"}
1714
1715
1716 /*
1717 * DAPM audio route definition
1718 */
1719
1720 static const struct snd_soc_dapm_route da7218_audio_map[] = {
1721 /* Input paths */
1722 {"MIC1", NULL, "Mic Bias1"},
1723 {"MIC2", NULL, "Mic Bias2"},
1724 {"DMIC1L", NULL, "Mic Bias1"},
1725 {"DMIC1L", NULL, "DMic1 Left"},
1726 {"DMIC1R", NULL, "Mic Bias1"},
1727 {"DMIC1R", NULL, "DMic1 Right"},
1728 {"DMIC2L", NULL, "Mic Bias2"},
1729 {"DMIC2L", NULL, "DMic2 Left"},
1730 {"DMIC2R", NULL, "Mic Bias2"},
1731 {"DMIC2R", NULL, "DMic2 Right"},
1732
1733 {"Mic1 PGA", NULL, "MIC1"},
1734 {"Mic2 PGA", NULL, "MIC2"},
1735
1736 {"Mixin1 PGA", NULL, "Mixin1 Supply"},
1737 {"Mixin2 PGA", NULL, "Mixin2 Supply"},
1738
1739 {"Mixin1 PGA", NULL, "Mic1 PGA"},
1740 {"Mixin2 PGA", NULL, "Mic2 PGA"},
1741
1742 {"Mic1 Mux", "Analog", "Mixin1 PGA"},
1743 {"Mic1 Mux", "Digital", "DMIC1L"},
1744 {"Mic1 Mux", "Digital", "DMIC1R"},
1745 {"Mic2 Mux", "Analog", "Mixin2 PGA"},
1746 {"Mic2 Mux", "Digital", "DMIC2L"},
1747 {"Mic2 Mux", "Digital", "DMIC2R"},
1748
1749 {"In Filter1L", NULL, "Mic1 Mux"},
1750 {"In Filter1R", NULL, "Mic1 Mux"},
1751 {"In Filter2L", NULL, "Mic2 Mux"},
1752 {"In Filter2R", NULL, "Mic2 Mux"},
1753
1754 {"Tone Generator", NULL, "TONE"},
1755
1756 {"Sidetone Mux", "In Filter1L", "In Filter1L"},
1757 {"Sidetone Mux", "In Filter1R", "In Filter1R"},
1758 {"Sidetone Mux", "In Filter2L", "In Filter2L"},
1759 {"Sidetone Mux", "In Filter2R", "In Filter2R"},
1760 {"Sidetone Filter", NULL, "Sidetone Mux"},
1761
1762 DA7218_DMIX_ROUTES("Mixer DAI1L"),
1763 DA7218_DMIX_ROUTES("Mixer DAI1R"),
1764 DA7218_DMIX_ROUTES("Mixer DAI2L"),
1765 DA7218_DMIX_ROUTES("Mixer DAI2R"),
1766
1767 {"DAIOUT", NULL, "Mixer DAI1L"},
1768 {"DAIOUT", NULL, "Mixer DAI1R"},
1769 {"DAIOUT", NULL, "Mixer DAI2L"},
1770 {"DAIOUT", NULL, "Mixer DAI2R"},
1771
1772 {"DAIOUT", NULL, "DAI"},
1773
1774 /* Output paths */
1775 {"DAIIN", NULL, "DAI"},
1776
1777 DA7218_DMIX_ROUTES("Mixer Out FilterL"),
1778 DA7218_DMIX_ROUTES("Mixer Out FilterR"),
1779
1780 {"BiQuad Filter", NULL, "Mixer Out FilterL"},
1781 {"BiQuad Filter", NULL, "Mixer Out FilterR"},
1782
1783 {"Out FilterL BiQuad Mux", "Bypass", "Mixer Out FilterL"},
1784 {"Out FilterL BiQuad Mux", "Enabled", "BiQuad Filter"},
1785 {"Out FilterR BiQuad Mux", "Bypass", "Mixer Out FilterR"},
1786 {"Out FilterR BiQuad Mux", "Enabled", "BiQuad Filter"},
1787
1788 DA7218_DMIX_ST_ROUTES("ST Mixer Out FilterL"),
1789 DA7218_DMIX_ST_ROUTES("ST Mixer Out FilterR"),
1790
1791 {"Out FilterL", NULL, "ST Mixer Out FilterL"},
1792 {"Out FilterR", NULL, "ST Mixer Out FilterR"},
1793
1794 {"Mixout Left PGA", NULL, "Out FilterL"},
1795 {"Mixout Right PGA", NULL, "Out FilterR"},
1796
1797 {"Headphone Left PGA", NULL, "Mixout Left PGA"},
1798 {"Headphone Right PGA", NULL, "Mixout Right PGA"},
1799
1800 {"HPL", NULL, "Headphone Left PGA"},
1801 {"HPR", NULL, "Headphone Right PGA"},
1802
1803 {"HPL", NULL, "Charge Pump"},
1804 {"HPR", NULL, "Charge Pump"},
1805 };
1806
1807
1808 /*
1809 * DAI operations
1810 */
1811
1812 static int da7218_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1813 int clk_id, unsigned int freq, int dir)
1814 {
1815 struct snd_soc_codec *codec = codec_dai->codec;
1816 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1817 int ret;
1818
1819 if (da7218->mclk_rate == freq)
1820 return 0;
1821
1822 if ((freq < 2000000) || (freq > 54000000)) {
1823 dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
1824 freq);
1825 return -EINVAL;
1826 }
1827
1828 switch (clk_id) {
1829 case DA7218_CLKSRC_MCLK_SQR:
1830 snd_soc_update_bits(codec, DA7218_PLL_CTRL,
1831 DA7218_PLL_MCLK_SQR_EN_MASK,
1832 DA7218_PLL_MCLK_SQR_EN_MASK);
1833 break;
1834 case DA7218_CLKSRC_MCLK:
1835 snd_soc_update_bits(codec, DA7218_PLL_CTRL,
1836 DA7218_PLL_MCLK_SQR_EN_MASK, 0);
1837 break;
1838 default:
1839 dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
1840 return -EINVAL;
1841 }
1842
1843 if (da7218->mclk) {
1844 freq = clk_round_rate(da7218->mclk, freq);
1845 ret = clk_set_rate(da7218->mclk, freq);
1846 if (ret) {
1847 dev_err(codec_dai->dev, "Failed to set clock rate %d\n",
1848 freq);
1849 return ret;
1850 }
1851 }
1852
1853 da7218->mclk_rate = freq;
1854
1855 return 0;
1856 }
1857
1858 static int da7218_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1859 int source, unsigned int fref, unsigned int fout)
1860 {
1861 struct snd_soc_codec *codec = codec_dai->codec;
1862 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1863
1864 u8 pll_ctrl, indiv_bits, indiv;
1865 u8 pll_frac_top, pll_frac_bot, pll_integer;
1866 u32 freq_ref;
1867 u64 frac_div;
1868
1869 /* Verify 2MHz - 54MHz MCLK provided, and set input divider */
1870 if (da7218->mclk_rate < 2000000) {
1871 dev_err(codec->dev, "PLL input clock %d below valid range\n",
1872 da7218->mclk_rate);
1873 return -EINVAL;
1874 } else if (da7218->mclk_rate <= 4500000) {
1875 indiv_bits = DA7218_PLL_INDIV_2_TO_4_5_MHZ;
1876 indiv = DA7218_PLL_INDIV_2_TO_4_5_MHZ_VAL;
1877 } else if (da7218->mclk_rate <= 9000000) {
1878 indiv_bits = DA7218_PLL_INDIV_4_5_TO_9_MHZ;
1879 indiv = DA7218_PLL_INDIV_4_5_TO_9_MHZ_VAL;
1880 } else if (da7218->mclk_rate <= 18000000) {
1881 indiv_bits = DA7218_PLL_INDIV_9_TO_18_MHZ;
1882 indiv = DA7218_PLL_INDIV_9_TO_18_MHZ_VAL;
1883 } else if (da7218->mclk_rate <= 36000000) {
1884 indiv_bits = DA7218_PLL_INDIV_18_TO_36_MHZ;
1885 indiv = DA7218_PLL_INDIV_18_TO_36_MHZ_VAL;
1886 } else if (da7218->mclk_rate <= 54000000) {
1887 indiv_bits = DA7218_PLL_INDIV_36_TO_54_MHZ;
1888 indiv = DA7218_PLL_INDIV_36_TO_54_MHZ_VAL;
1889 } else {
1890 dev_err(codec->dev, "PLL input clock %d above valid range\n",
1891 da7218->mclk_rate);
1892 return -EINVAL;
1893 }
1894 freq_ref = (da7218->mclk_rate / indiv);
1895 pll_ctrl = indiv_bits;
1896
1897 /* Configure PLL */
1898 switch (source) {
1899 case DA7218_SYSCLK_MCLK:
1900 pll_ctrl |= DA7218_PLL_MODE_BYPASS;
1901 snd_soc_update_bits(codec, DA7218_PLL_CTRL,
1902 DA7218_PLL_INDIV_MASK |
1903 DA7218_PLL_MODE_MASK, pll_ctrl);
1904 return 0;
1905 case DA7218_SYSCLK_PLL:
1906 pll_ctrl |= DA7218_PLL_MODE_NORMAL;
1907 break;
1908 case DA7218_SYSCLK_PLL_SRM:
1909 pll_ctrl |= DA7218_PLL_MODE_SRM;
1910 break;
1911 default:
1912 dev_err(codec->dev, "Invalid PLL config\n");
1913 return -EINVAL;
1914 }
1915
1916 /* Calculate dividers for PLL */
1917 pll_integer = fout / freq_ref;
1918 frac_div = (u64)(fout % freq_ref) * 8192ULL;
1919 do_div(frac_div, freq_ref);
1920 pll_frac_top = (frac_div >> DA7218_BYTE_SHIFT) & DA7218_BYTE_MASK;
1921 pll_frac_bot = (frac_div) & DA7218_BYTE_MASK;
1922
1923 /* Write PLL config & dividers */
1924 snd_soc_write(codec, DA7218_PLL_FRAC_TOP, pll_frac_top);
1925 snd_soc_write(codec, DA7218_PLL_FRAC_BOT, pll_frac_bot);
1926 snd_soc_write(codec, DA7218_PLL_INTEGER, pll_integer);
1927 snd_soc_update_bits(codec, DA7218_PLL_CTRL,
1928 DA7218_PLL_MODE_MASK | DA7218_PLL_INDIV_MASK,
1929 pll_ctrl);
1930
1931 return 0;
1932 }
1933
1934 static int da7218_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1935 {
1936 struct snd_soc_codec *codec = codec_dai->codec;
1937 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1938 u8 dai_clk_mode = 0, dai_ctrl = 0;
1939
1940 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1941 case SND_SOC_DAIFMT_CBM_CFM:
1942 da7218->master = true;
1943 break;
1944 case SND_SOC_DAIFMT_CBS_CFS:
1945 da7218->master = false;
1946 break;
1947 default:
1948 return -EINVAL;
1949 }
1950
1951 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1952 case SND_SOC_DAIFMT_I2S:
1953 case SND_SOC_DAIFMT_LEFT_J:
1954 case SND_SOC_DAIFMT_RIGHT_J:
1955 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1956 case SND_SOC_DAIFMT_NB_NF:
1957 break;
1958 case SND_SOC_DAIFMT_NB_IF:
1959 dai_clk_mode |= DA7218_DAI_WCLK_POL_INV;
1960 break;
1961 case SND_SOC_DAIFMT_IB_NF:
1962 dai_clk_mode |= DA7218_DAI_CLK_POL_INV;
1963 break;
1964 case SND_SOC_DAIFMT_IB_IF:
1965 dai_clk_mode |= DA7218_DAI_WCLK_POL_INV |
1966 DA7218_DAI_CLK_POL_INV;
1967 break;
1968 default:
1969 return -EINVAL;
1970 }
1971 break;
1972 case SND_SOC_DAIFMT_DSP_B:
1973 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1974 case SND_SOC_DAIFMT_NB_NF:
1975 dai_clk_mode |= DA7218_DAI_CLK_POL_INV;
1976 break;
1977 case SND_SOC_DAIFMT_NB_IF:
1978 dai_clk_mode |= DA7218_DAI_WCLK_POL_INV |
1979 DA7218_DAI_CLK_POL_INV;
1980 break;
1981 case SND_SOC_DAIFMT_IB_NF:
1982 break;
1983 case SND_SOC_DAIFMT_IB_IF:
1984 dai_clk_mode |= DA7218_DAI_WCLK_POL_INV;
1985 break;
1986 default:
1987 return -EINVAL;
1988 }
1989 break;
1990 default:
1991 return -EINVAL;
1992 }
1993
1994 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1995 case SND_SOC_DAIFMT_I2S:
1996 dai_ctrl |= DA7218_DAI_FORMAT_I2S;
1997 break;
1998 case SND_SOC_DAIFMT_LEFT_J:
1999 dai_ctrl |= DA7218_DAI_FORMAT_LEFT_J;
2000 break;
2001 case SND_SOC_DAIFMT_RIGHT_J:
2002 dai_ctrl |= DA7218_DAI_FORMAT_RIGHT_J;
2003 break;
2004 case SND_SOC_DAIFMT_DSP_B:
2005 dai_ctrl |= DA7218_DAI_FORMAT_DSP;
2006 break;
2007 default:
2008 return -EINVAL;
2009 }
2010
2011 /* By default 64 BCLKs per WCLK is supported */
2012 dai_clk_mode |= DA7218_DAI_BCLKS_PER_WCLK_64;
2013
2014 snd_soc_write(codec, DA7218_DAI_CLK_MODE, dai_clk_mode);
2015 snd_soc_update_bits(codec, DA7218_DAI_CTRL, DA7218_DAI_FORMAT_MASK,
2016 dai_ctrl);
2017
2018 return 0;
2019 }
2020
2021 static int da7218_set_dai_tdm_slot(struct snd_soc_dai *dai,
2022 unsigned int tx_mask, unsigned int rx_mask,
2023 int slots, int slot_width)
2024 {
2025 struct snd_soc_codec *codec = dai->codec;
2026 u8 dai_bclks_per_wclk;
2027 u32 frame_size;
2028
2029 /* No channels enabled so disable TDM, revert to 64-bit frames */
2030 if (!tx_mask) {
2031 snd_soc_update_bits(codec, DA7218_DAI_TDM_CTRL,
2032 DA7218_DAI_TDM_CH_EN_MASK |
2033 DA7218_DAI_TDM_MODE_EN_MASK, 0);
2034 snd_soc_update_bits(codec, DA7218_DAI_CLK_MODE,
2035 DA7218_DAI_BCLKS_PER_WCLK_MASK,
2036 DA7218_DAI_BCLKS_PER_WCLK_64);
2037 return 0;
2038 }
2039
2040 /* Check we have valid slots */
2041 if (fls(tx_mask) > DA7218_DAI_TDM_MAX_SLOTS) {
2042 dev_err(codec->dev, "Invalid number of slots, max = %d\n",
2043 DA7218_DAI_TDM_MAX_SLOTS);
2044 return -EINVAL;
2045 }
2046
2047 /* Check we have a valid offset given (first 2 bytes of rx_mask) */
2048 if (rx_mask >> DA7218_2BYTE_SHIFT) {
2049 dev_err(codec->dev, "Invalid slot offset, max = %d\n",
2050 DA7218_2BYTE_MASK);
2051 return -EINVAL;
2052 }
2053
2054 /* Calculate & validate frame size based on slot info provided. */
2055 frame_size = slots * slot_width;
2056 switch (frame_size) {
2057 case 32:
2058 dai_bclks_per_wclk = DA7218_DAI_BCLKS_PER_WCLK_32;
2059 break;
2060 case 64:
2061 dai_bclks_per_wclk = DA7218_DAI_BCLKS_PER_WCLK_64;
2062 break;
2063 case 128:
2064 dai_bclks_per_wclk = DA7218_DAI_BCLKS_PER_WCLK_128;
2065 break;
2066 case 256:
2067 dai_bclks_per_wclk = DA7218_DAI_BCLKS_PER_WCLK_256;
2068 break;
2069 default:
2070 dev_err(codec->dev, "Invalid frame size\n");
2071 return -EINVAL;
2072 }
2073
2074 snd_soc_update_bits(codec, DA7218_DAI_CLK_MODE,
2075 DA7218_DAI_BCLKS_PER_WCLK_MASK,
2076 dai_bclks_per_wclk);
2077 snd_soc_write(codec, DA7218_DAI_OFFSET_LOWER,
2078 (rx_mask & DA7218_BYTE_MASK));
2079 snd_soc_write(codec, DA7218_DAI_OFFSET_UPPER,
2080 ((rx_mask >> DA7218_BYTE_SHIFT) & DA7218_BYTE_MASK));
2081 snd_soc_update_bits(codec, DA7218_DAI_TDM_CTRL,
2082 DA7218_DAI_TDM_CH_EN_MASK |
2083 DA7218_DAI_TDM_MODE_EN_MASK,
2084 (tx_mask << DA7218_DAI_TDM_CH_EN_SHIFT) |
2085 DA7218_DAI_TDM_MODE_EN_MASK);
2086
2087 return 0;
2088 }
2089
2090 static int da7218_hw_params(struct snd_pcm_substream *substream,
2091 struct snd_pcm_hw_params *params,
2092 struct snd_soc_dai *dai)
2093 {
2094 struct snd_soc_codec *codec = dai->codec;
2095 u8 dai_ctrl = 0, fs;
2096 unsigned int channels;
2097
2098 switch (params_width(params)) {
2099 case 16:
2100 dai_ctrl |= DA7218_DAI_WORD_LENGTH_S16_LE;
2101 break;
2102 case 20:
2103 dai_ctrl |= DA7218_DAI_WORD_LENGTH_S20_LE;
2104 break;
2105 case 24:
2106 dai_ctrl |= DA7218_DAI_WORD_LENGTH_S24_LE;
2107 break;
2108 case 32:
2109 dai_ctrl |= DA7218_DAI_WORD_LENGTH_S32_LE;
2110 break;
2111 default:
2112 return -EINVAL;
2113 }
2114
2115 channels = params_channels(params);
2116 if ((channels < 1) || (channels > DA7218_DAI_CH_NUM_MAX)) {
2117 dev_err(codec->dev,
2118 "Invalid number of channels, only 1 to %d supported\n",
2119 DA7218_DAI_CH_NUM_MAX);
2120 return -EINVAL;
2121 }
2122 dai_ctrl |= channels << DA7218_DAI_CH_NUM_SHIFT;
2123
2124 switch (params_rate(params)) {
2125 case 8000:
2126 fs = DA7218_SR_8000;
2127 break;
2128 case 11025:
2129 fs = DA7218_SR_11025;
2130 break;
2131 case 12000:
2132 fs = DA7218_SR_12000;
2133 break;
2134 case 16000:
2135 fs = DA7218_SR_16000;
2136 break;
2137 case 22050:
2138 fs = DA7218_SR_22050;
2139 break;
2140 case 24000:
2141 fs = DA7218_SR_24000;
2142 break;
2143 case 32000:
2144 fs = DA7218_SR_32000;
2145 break;
2146 case 44100:
2147 fs = DA7218_SR_44100;
2148 break;
2149 case 48000:
2150 fs = DA7218_SR_48000;
2151 break;
2152 case 88200:
2153 fs = DA7218_SR_88200;
2154 break;
2155 case 96000:
2156 fs = DA7218_SR_96000;
2157 break;
2158 default:
2159 return -EINVAL;
2160 }
2161
2162 snd_soc_update_bits(codec, DA7218_DAI_CTRL,
2163 DA7218_DAI_WORD_LENGTH_MASK | DA7218_DAI_CH_NUM_MASK,
2164 dai_ctrl);
2165 /* SRs tied for ADCs and DACs. */
2166 snd_soc_write(codec, DA7218_SR,
2167 (fs << DA7218_SR_DAC_SHIFT) | (fs << DA7218_SR_ADC_SHIFT));
2168
2169 return 0;
2170 }
2171
2172 static const struct snd_soc_dai_ops da7218_dai_ops = {
2173 .hw_params = da7218_hw_params,
2174 .set_sysclk = da7218_set_dai_sysclk,
2175 .set_pll = da7218_set_dai_pll,
2176 .set_fmt = da7218_set_dai_fmt,
2177 .set_tdm_slot = da7218_set_dai_tdm_slot,
2178 };
2179
2180 #define DA7218_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
2181 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
2182
2183 static struct snd_soc_dai_driver da7218_dai = {
2184 .name = "da7218-hifi",
2185 .playback = {
2186 .stream_name = "Playback",
2187 .channels_min = 1,
2188 .channels_max = 4, /* Only 2 channels of data */
2189 .rates = SNDRV_PCM_RATE_8000_96000,
2190 .formats = DA7218_FORMATS,
2191 },
2192 .capture = {
2193 .stream_name = "Capture",
2194 .channels_min = 1,
2195 .channels_max = 4,
2196 .rates = SNDRV_PCM_RATE_8000_96000,
2197 .formats = DA7218_FORMATS,
2198 },
2199 .ops = &da7218_dai_ops,
2200 .symmetric_rates = 1,
2201 .symmetric_channels = 1,
2202 .symmetric_samplebits = 1,
2203 };
2204
2205
2206 /*
2207 * HP Detect
2208 */
2209
2210 int da7218_hpldet(struct snd_soc_codec *codec, struct snd_soc_jack *jack)
2211 {
2212 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2213
2214 if (da7218->dev_id == DA7217_DEV_ID)
2215 return -EINVAL;
2216
2217 da7218->jack = jack;
2218 snd_soc_update_bits(codec, DA7218_HPLDET_JACK,
2219 DA7218_HPLDET_JACK_EN_MASK,
2220 jack ? DA7218_HPLDET_JACK_EN_MASK : 0);
2221
2222 return 0;
2223 }
2224 EXPORT_SYMBOL_GPL(da7218_hpldet);
2225
2226 static void da7218_micldet_irq(struct snd_soc_codec *codec)
2227 {
2228 char *envp[] = {
2229 "EVENT=MIC_LEVEL_DETECT",
2230 NULL,
2231 };
2232
2233 kobject_uevent_env(&codec->dev->kobj, KOBJ_CHANGE, envp);
2234 }
2235
2236 static void da7218_hpldet_irq(struct snd_soc_codec *codec)
2237 {
2238 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2239 u8 jack_status;
2240 int report;
2241
2242 jack_status = snd_soc_read(codec, DA7218_EVENT_STATUS);
2243
2244 if (jack_status & DA7218_HPLDET_JACK_STS_MASK)
2245 report = SND_JACK_HEADPHONE;
2246 else
2247 report = 0;
2248
2249 snd_soc_jack_report(da7218->jack, report, SND_JACK_HEADPHONE);
2250 }
2251
2252 /*
2253 * IRQ
2254 */
2255
2256 static irqreturn_t da7218_irq_thread(int irq, void *data)
2257 {
2258 struct snd_soc_codec *codec = data;
2259 u8 status;
2260
2261 /* Read IRQ status reg */
2262 status = snd_soc_read(codec, DA7218_EVENT);
2263 if (!status)
2264 return IRQ_NONE;
2265
2266 /* Mic level detect */
2267 if (status & DA7218_LVL_DET_EVENT_MASK)
2268 da7218_micldet_irq(codec);
2269
2270 /* HP detect */
2271 if (status & DA7218_HPLDET_JACK_EVENT_MASK)
2272 da7218_hpldet_irq(codec);
2273
2274 /* Clear interrupts */
2275 snd_soc_write(codec, DA7218_EVENT, status);
2276
2277 return IRQ_HANDLED;
2278 }
2279
2280 /*
2281 * DT
2282 */
2283
2284 static const struct of_device_id da7218_of_match[] = {
2285 { .compatible = "dlg,da7217", .data = (void *) DA7217_DEV_ID },
2286 { .compatible = "dlg,da7218", .data = (void *) DA7218_DEV_ID },
2287 { }
2288 };
2289 MODULE_DEVICE_TABLE(of, da7218_of_match);
2290
2291 static inline int da7218_of_get_id(struct device *dev)
2292 {
2293 const struct of_device_id *id = of_match_device(da7218_of_match, dev);
2294
2295 if (id)
2296 return (uintptr_t)id->data;
2297 else
2298 return -EINVAL;
2299 }
2300
2301 static enum da7218_micbias_voltage
2302 da7218_of_micbias_lvl(struct snd_soc_codec *codec, u32 val)
2303 {
2304 switch (val) {
2305 case 1200:
2306 return DA7218_MICBIAS_1_2V;
2307 case 1600:
2308 return DA7218_MICBIAS_1_6V;
2309 case 1800:
2310 return DA7218_MICBIAS_1_8V;
2311 case 2000:
2312 return DA7218_MICBIAS_2_0V;
2313 case 2200:
2314 return DA7218_MICBIAS_2_2V;
2315 case 2400:
2316 return DA7218_MICBIAS_2_4V;
2317 case 2600:
2318 return DA7218_MICBIAS_2_6V;
2319 case 2800:
2320 return DA7218_MICBIAS_2_8V;
2321 case 3000:
2322 return DA7218_MICBIAS_3_0V;
2323 default:
2324 dev_warn(codec->dev, "Invalid micbias level");
2325 return DA7218_MICBIAS_1_6V;
2326 }
2327 }
2328
2329 static enum da7218_mic_amp_in_sel
2330 da7218_of_mic_amp_in_sel(struct snd_soc_codec *codec, const char *str)
2331 {
2332 if (!strcmp(str, "diff")) {
2333 return DA7218_MIC_AMP_IN_SEL_DIFF;
2334 } else if (!strcmp(str, "se_p")) {
2335 return DA7218_MIC_AMP_IN_SEL_SE_P;
2336 } else if (!strcmp(str, "se_n")) {
2337 return DA7218_MIC_AMP_IN_SEL_SE_N;
2338 } else {
2339 dev_warn(codec->dev, "Invalid mic input type selection");
2340 return DA7218_MIC_AMP_IN_SEL_DIFF;
2341 }
2342 }
2343
2344 static enum da7218_dmic_data_sel
2345 da7218_of_dmic_data_sel(struct snd_soc_codec *codec, const char *str)
2346 {
2347 if (!strcmp(str, "lrise_rfall")) {
2348 return DA7218_DMIC_DATA_LRISE_RFALL;
2349 } else if (!strcmp(str, "lfall_rrise")) {
2350 return DA7218_DMIC_DATA_LFALL_RRISE;
2351 } else {
2352 dev_warn(codec->dev, "Invalid DMIC data type selection");
2353 return DA7218_DMIC_DATA_LRISE_RFALL;
2354 }
2355 }
2356
2357 static enum da7218_dmic_samplephase
2358 da7218_of_dmic_samplephase(struct snd_soc_codec *codec, const char *str)
2359 {
2360 if (!strcmp(str, "on_clkedge")) {
2361 return DA7218_DMIC_SAMPLE_ON_CLKEDGE;
2362 } else if (!strcmp(str, "between_clkedge")) {
2363 return DA7218_DMIC_SAMPLE_BETWEEN_CLKEDGE;
2364 } else {
2365 dev_warn(codec->dev, "Invalid DMIC sample phase");
2366 return DA7218_DMIC_SAMPLE_ON_CLKEDGE;
2367 }
2368 }
2369
2370 static enum da7218_dmic_clk_rate
2371 da7218_of_dmic_clkrate(struct snd_soc_codec *codec, u32 val)
2372 {
2373 switch (val) {
2374 case 1500000:
2375 return DA7218_DMIC_CLK_1_5MHZ;
2376 case 3000000:
2377 return DA7218_DMIC_CLK_3_0MHZ;
2378 default:
2379 dev_warn(codec->dev, "Invalid DMIC clock rate");
2380 return DA7218_DMIC_CLK_3_0MHZ;
2381 }
2382 }
2383
2384 static enum da7218_hpldet_jack_rate
2385 da7218_of_jack_rate(struct snd_soc_codec *codec, u32 val)
2386 {
2387 switch (val) {
2388 case 5:
2389 return DA7218_HPLDET_JACK_RATE_5US;
2390 case 10:
2391 return DA7218_HPLDET_JACK_RATE_10US;
2392 case 20:
2393 return DA7218_HPLDET_JACK_RATE_20US;
2394 case 40:
2395 return DA7218_HPLDET_JACK_RATE_40US;
2396 case 80:
2397 return DA7218_HPLDET_JACK_RATE_80US;
2398 case 160:
2399 return DA7218_HPLDET_JACK_RATE_160US;
2400 case 320:
2401 return DA7218_HPLDET_JACK_RATE_320US;
2402 case 640:
2403 return DA7218_HPLDET_JACK_RATE_640US;
2404 default:
2405 dev_warn(codec->dev, "Invalid jack detect rate");
2406 return DA7218_HPLDET_JACK_RATE_40US;
2407 }
2408 }
2409
2410 static enum da7218_hpldet_jack_debounce
2411 da7218_of_jack_debounce(struct snd_soc_codec *codec, u32 val)
2412 {
2413 switch (val) {
2414 case 0:
2415 return DA7218_HPLDET_JACK_DEBOUNCE_OFF;
2416 case 2:
2417 return DA7218_HPLDET_JACK_DEBOUNCE_2;
2418 case 3:
2419 return DA7218_HPLDET_JACK_DEBOUNCE_3;
2420 case 4:
2421 return DA7218_HPLDET_JACK_DEBOUNCE_4;
2422 default:
2423 dev_warn(codec->dev, "Invalid jack debounce");
2424 return DA7218_HPLDET_JACK_DEBOUNCE_2;
2425 }
2426 }
2427
2428 static enum da7218_hpldet_jack_thr
2429 da7218_of_jack_thr(struct snd_soc_codec *codec, u32 val)
2430 {
2431 switch (val) {
2432 case 84:
2433 return DA7218_HPLDET_JACK_THR_84PCT;
2434 case 88:
2435 return DA7218_HPLDET_JACK_THR_88PCT;
2436 case 92:
2437 return DA7218_HPLDET_JACK_THR_92PCT;
2438 case 96:
2439 return DA7218_HPLDET_JACK_THR_96PCT;
2440 default:
2441 dev_warn(codec->dev, "Invalid jack threshold level");
2442 return DA7218_HPLDET_JACK_THR_84PCT;
2443 }
2444 }
2445
2446 static struct da7218_pdata *da7218_of_to_pdata(struct snd_soc_codec *codec)
2447 {
2448 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2449 struct device_node *np = codec->dev->of_node;
2450 struct device_node *hpldet_np;
2451 struct da7218_pdata *pdata;
2452 struct da7218_hpldet_pdata *hpldet_pdata;
2453 const char *of_str;
2454 u32 of_val32;
2455
2456 pdata = devm_kzalloc(codec->dev, sizeof(*pdata), GFP_KERNEL);
2457 if (!pdata) {
2458 dev_warn(codec->dev, "Failed to allocate memory for pdata\n");
2459 return NULL;
2460 }
2461
2462 if (of_property_read_u32(np, "dlg,micbias1-lvl-millivolt", &of_val32) >= 0)
2463 pdata->micbias1_lvl = da7218_of_micbias_lvl(codec, of_val32);
2464 else
2465 pdata->micbias1_lvl = DA7218_MICBIAS_1_6V;
2466
2467 if (of_property_read_u32(np, "dlg,micbias2-lvl-millivolt", &of_val32) >= 0)
2468 pdata->micbias2_lvl = da7218_of_micbias_lvl(codec, of_val32);
2469 else
2470 pdata->micbias2_lvl = DA7218_MICBIAS_1_6V;
2471
2472 if (!of_property_read_string(np, "dlg,mic1-amp-in-sel", &of_str))
2473 pdata->mic1_amp_in_sel =
2474 da7218_of_mic_amp_in_sel(codec, of_str);
2475 else
2476 pdata->mic1_amp_in_sel = DA7218_MIC_AMP_IN_SEL_DIFF;
2477
2478 if (!of_property_read_string(np, "dlg,mic2-amp-in-sel", &of_str))
2479 pdata->mic2_amp_in_sel =
2480 da7218_of_mic_amp_in_sel(codec, of_str);
2481 else
2482 pdata->mic2_amp_in_sel = DA7218_MIC_AMP_IN_SEL_DIFF;
2483
2484 if (!of_property_read_string(np, "dlg,dmic1-data-sel", &of_str))
2485 pdata->dmic1_data_sel = da7218_of_dmic_data_sel(codec, of_str);
2486 else
2487 pdata->dmic1_data_sel = DA7218_DMIC_DATA_LRISE_RFALL;
2488
2489 if (!of_property_read_string(np, "dlg,dmic1-samplephase", &of_str))
2490 pdata->dmic1_samplephase =
2491 da7218_of_dmic_samplephase(codec, of_str);
2492 else
2493 pdata->dmic1_samplephase = DA7218_DMIC_SAMPLE_ON_CLKEDGE;
2494
2495 if (of_property_read_u32(np, "dlg,dmic1-clkrate-hz", &of_val32) >= 0)
2496 pdata->dmic1_clk_rate = da7218_of_dmic_clkrate(codec, of_val32);
2497 else
2498 pdata->dmic1_clk_rate = DA7218_DMIC_CLK_3_0MHZ;
2499
2500 if (!of_property_read_string(np, "dlg,dmic2-data-sel", &of_str))
2501 pdata->dmic2_data_sel = da7218_of_dmic_data_sel(codec, of_str);
2502 else
2503 pdata->dmic2_data_sel = DA7218_DMIC_DATA_LRISE_RFALL;
2504
2505 if (!of_property_read_string(np, "dlg,dmic2-samplephase", &of_str))
2506 pdata->dmic2_samplephase =
2507 da7218_of_dmic_samplephase(codec, of_str);
2508 else
2509 pdata->dmic2_samplephase = DA7218_DMIC_SAMPLE_ON_CLKEDGE;
2510
2511 if (of_property_read_u32(np, "dlg,dmic2-clkrate-hz", &of_val32) >= 0)
2512 pdata->dmic2_clk_rate = da7218_of_dmic_clkrate(codec, of_val32);
2513 else
2514 pdata->dmic2_clk_rate = DA7218_DMIC_CLK_3_0MHZ;
2515
2516 if (da7218->dev_id == DA7217_DEV_ID) {
2517 if (of_property_read_bool(np, "dlg,hp-diff-single-supply"))
2518 pdata->hp_diff_single_supply = true;
2519 }
2520
2521 if (da7218->dev_id == DA7218_DEV_ID) {
2522 hpldet_np = of_find_node_by_name(np, "da7218_hpldet");
2523 if (!hpldet_np)
2524 return pdata;
2525
2526 hpldet_pdata = devm_kzalloc(codec->dev, sizeof(*hpldet_pdata),
2527 GFP_KERNEL);
2528 if (!hpldet_pdata) {
2529 dev_warn(codec->dev,
2530 "Failed to allocate memory for hpldet pdata\n");
2531 of_node_put(hpldet_np);
2532 return pdata;
2533 }
2534 pdata->hpldet_pdata = hpldet_pdata;
2535
2536 if (of_property_read_u32(hpldet_np, "dlg,jack-rate-us",
2537 &of_val32) >= 0)
2538 hpldet_pdata->jack_rate =
2539 da7218_of_jack_rate(codec, of_val32);
2540 else
2541 hpldet_pdata->jack_rate = DA7218_HPLDET_JACK_RATE_40US;
2542
2543 if (of_property_read_u32(hpldet_np, "dlg,jack-debounce",
2544 &of_val32) >= 0)
2545 hpldet_pdata->jack_debounce =
2546 da7218_of_jack_debounce(codec, of_val32);
2547 else
2548 hpldet_pdata->jack_debounce =
2549 DA7218_HPLDET_JACK_DEBOUNCE_2;
2550
2551 if (of_property_read_u32(hpldet_np, "dlg,jack-threshold-pct",
2552 &of_val32) >= 0)
2553 hpldet_pdata->jack_thr =
2554 da7218_of_jack_thr(codec, of_val32);
2555 else
2556 hpldet_pdata->jack_thr = DA7218_HPLDET_JACK_THR_84PCT;
2557
2558 if (of_property_read_bool(hpldet_np, "dlg,comp-inv"))
2559 hpldet_pdata->comp_inv = true;
2560
2561 if (of_property_read_bool(hpldet_np, "dlg,hyst"))
2562 hpldet_pdata->hyst = true;
2563
2564 if (of_property_read_bool(hpldet_np, "dlg,discharge"))
2565 hpldet_pdata->discharge = true;
2566
2567 of_node_put(hpldet_np);
2568 }
2569
2570 return pdata;
2571 }
2572
2573
2574 /*
2575 * Codec driver functions
2576 */
2577
2578 static int da7218_set_bias_level(struct snd_soc_codec *codec,
2579 enum snd_soc_bias_level level)
2580 {
2581 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2582 int ret;
2583
2584 switch (level) {
2585 case SND_SOC_BIAS_ON:
2586 break;
2587 case SND_SOC_BIAS_PREPARE:
2588 /* Enable MCLK for transition to ON state */
2589 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_STANDBY) {
2590 if (da7218->mclk) {
2591 ret = clk_prepare_enable(da7218->mclk);
2592 if (ret) {
2593 dev_err(codec->dev, "Failed to enable mclk\n");
2594 return ret;
2595 }
2596 }
2597 }
2598
2599 break;
2600 case SND_SOC_BIAS_STANDBY:
2601 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
2602 /* Master bias */
2603 snd_soc_update_bits(codec, DA7218_REFERENCES,
2604 DA7218_BIAS_EN_MASK,
2605 DA7218_BIAS_EN_MASK);
2606
2607 /* Internal LDO */
2608 snd_soc_update_bits(codec, DA7218_LDO_CTRL,
2609 DA7218_LDO_EN_MASK,
2610 DA7218_LDO_EN_MASK);
2611 } else {
2612 /* Remove MCLK */
2613 if (da7218->mclk)
2614 clk_disable_unprepare(da7218->mclk);
2615 }
2616 break;
2617 case SND_SOC_BIAS_OFF:
2618 /* Only disable if jack detection disabled */
2619 if (!da7218->jack) {
2620 /* Internal LDO */
2621 snd_soc_update_bits(codec, DA7218_LDO_CTRL,
2622 DA7218_LDO_EN_MASK, 0);
2623
2624 /* Master bias */
2625 snd_soc_update_bits(codec, DA7218_REFERENCES,
2626 DA7218_BIAS_EN_MASK, 0);
2627 }
2628 break;
2629 }
2630
2631 return 0;
2632 }
2633
2634 static const char *da7218_supply_names[DA7218_NUM_SUPPLIES] = {
2635 [DA7218_SUPPLY_VDD] = "VDD",
2636 [DA7218_SUPPLY_VDDMIC] = "VDDMIC",
2637 [DA7218_SUPPLY_VDDIO] = "VDDIO",
2638 };
2639
2640 static int da7218_handle_supplies(struct snd_soc_codec *codec)
2641 {
2642 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2643 struct regulator *vddio;
2644 u8 io_voltage_lvl = DA7218_IO_VOLTAGE_LEVEL_2_5V_3_6V;
2645 int i, ret;
2646
2647 /* Get required supplies */
2648 for (i = 0; i < DA7218_NUM_SUPPLIES; ++i)
2649 da7218->supplies[i].supply = da7218_supply_names[i];
2650
2651 ret = devm_regulator_bulk_get(codec->dev, DA7218_NUM_SUPPLIES,
2652 da7218->supplies);
2653 if (ret) {
2654 dev_err(codec->dev, "Failed to get supplies\n");
2655 return ret;
2656 }
2657
2658 /* Determine VDDIO voltage provided */
2659 vddio = da7218->supplies[DA7218_SUPPLY_VDDIO].consumer;
2660 ret = regulator_get_voltage(vddio);
2661 if (ret < 1500000)
2662 dev_warn(codec->dev, "Invalid VDDIO voltage\n");
2663 else if (ret < 2500000)
2664 io_voltage_lvl = DA7218_IO_VOLTAGE_LEVEL_1_5V_2_5V;
2665
2666 /* Enable main supplies */
2667 ret = regulator_bulk_enable(DA7218_NUM_SUPPLIES, da7218->supplies);
2668 if (ret) {
2669 dev_err(codec->dev, "Failed to enable supplies\n");
2670 return ret;
2671 }
2672
2673 /* Ensure device in active mode */
2674 snd_soc_write(codec, DA7218_SYSTEM_ACTIVE, DA7218_SYSTEM_ACTIVE_MASK);
2675
2676 /* Update IO voltage level range */
2677 snd_soc_write(codec, DA7218_IO_CTRL, io_voltage_lvl);
2678
2679 return 0;
2680 }
2681
2682 static void da7218_handle_pdata(struct snd_soc_codec *codec)
2683 {
2684 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2685 struct da7218_pdata *pdata = da7218->pdata;
2686
2687 if (pdata) {
2688 u8 micbias_lvl = 0, dmic_cfg = 0;
2689
2690 /* Mic Bias voltages */
2691 switch (pdata->micbias1_lvl) {
2692 case DA7218_MICBIAS_1_2V:
2693 micbias_lvl |= DA7218_MICBIAS_1_LP_MODE_MASK;
2694 break;
2695 case DA7218_MICBIAS_1_6V:
2696 case DA7218_MICBIAS_1_8V:
2697 case DA7218_MICBIAS_2_0V:
2698 case DA7218_MICBIAS_2_2V:
2699 case DA7218_MICBIAS_2_4V:
2700 case DA7218_MICBIAS_2_6V:
2701 case DA7218_MICBIAS_2_8V:
2702 case DA7218_MICBIAS_3_0V:
2703 micbias_lvl |= (pdata->micbias1_lvl <<
2704 DA7218_MICBIAS_1_LEVEL_SHIFT);
2705 break;
2706 }
2707
2708 switch (pdata->micbias2_lvl) {
2709 case DA7218_MICBIAS_1_2V:
2710 micbias_lvl |= DA7218_MICBIAS_2_LP_MODE_MASK;
2711 break;
2712 case DA7218_MICBIAS_1_6V:
2713 case DA7218_MICBIAS_1_8V:
2714 case DA7218_MICBIAS_2_0V:
2715 case DA7218_MICBIAS_2_2V:
2716 case DA7218_MICBIAS_2_4V:
2717 case DA7218_MICBIAS_2_6V:
2718 case DA7218_MICBIAS_2_8V:
2719 case DA7218_MICBIAS_3_0V:
2720 micbias_lvl |= (pdata->micbias2_lvl <<
2721 DA7218_MICBIAS_2_LEVEL_SHIFT);
2722 break;
2723 }
2724
2725 snd_soc_write(codec, DA7218_MICBIAS_CTRL, micbias_lvl);
2726
2727 /* Mic */
2728 switch (pdata->mic1_amp_in_sel) {
2729 case DA7218_MIC_AMP_IN_SEL_DIFF:
2730 case DA7218_MIC_AMP_IN_SEL_SE_P:
2731 case DA7218_MIC_AMP_IN_SEL_SE_N:
2732 snd_soc_write(codec, DA7218_MIC_1_SELECT,
2733 pdata->mic1_amp_in_sel);
2734 break;
2735 }
2736
2737 switch (pdata->mic2_amp_in_sel) {
2738 case DA7218_MIC_AMP_IN_SEL_DIFF:
2739 case DA7218_MIC_AMP_IN_SEL_SE_P:
2740 case DA7218_MIC_AMP_IN_SEL_SE_N:
2741 snd_soc_write(codec, DA7218_MIC_2_SELECT,
2742 pdata->mic2_amp_in_sel);
2743 break;
2744 }
2745
2746 /* DMic */
2747 switch (pdata->dmic1_data_sel) {
2748 case DA7218_DMIC_DATA_LFALL_RRISE:
2749 case DA7218_DMIC_DATA_LRISE_RFALL:
2750 dmic_cfg |= (pdata->dmic1_data_sel <<
2751 DA7218_DMIC_1_DATA_SEL_SHIFT);
2752 break;
2753 }
2754
2755 switch (pdata->dmic1_samplephase) {
2756 case DA7218_DMIC_SAMPLE_ON_CLKEDGE:
2757 case DA7218_DMIC_SAMPLE_BETWEEN_CLKEDGE:
2758 dmic_cfg |= (pdata->dmic1_samplephase <<
2759 DA7218_DMIC_1_SAMPLEPHASE_SHIFT);
2760 break;
2761 }
2762
2763 switch (pdata->dmic1_clk_rate) {
2764 case DA7218_DMIC_CLK_3_0MHZ:
2765 case DA7218_DMIC_CLK_1_5MHZ:
2766 dmic_cfg |= (pdata->dmic1_clk_rate <<
2767 DA7218_DMIC_1_CLK_RATE_SHIFT);
2768 break;
2769 }
2770
2771 snd_soc_update_bits(codec, DA7218_DMIC_1_CTRL,
2772 DA7218_DMIC_1_DATA_SEL_MASK |
2773 DA7218_DMIC_1_SAMPLEPHASE_MASK |
2774 DA7218_DMIC_1_CLK_RATE_MASK, dmic_cfg);
2775
2776 dmic_cfg = 0;
2777 switch (pdata->dmic2_data_sel) {
2778 case DA7218_DMIC_DATA_LFALL_RRISE:
2779 case DA7218_DMIC_DATA_LRISE_RFALL:
2780 dmic_cfg |= (pdata->dmic2_data_sel <<
2781 DA7218_DMIC_2_DATA_SEL_SHIFT);
2782 break;
2783 }
2784
2785 switch (pdata->dmic2_samplephase) {
2786 case DA7218_DMIC_SAMPLE_ON_CLKEDGE:
2787 case DA7218_DMIC_SAMPLE_BETWEEN_CLKEDGE:
2788 dmic_cfg |= (pdata->dmic2_samplephase <<
2789 DA7218_DMIC_2_SAMPLEPHASE_SHIFT);
2790 break;
2791 }
2792
2793 switch (pdata->dmic2_clk_rate) {
2794 case DA7218_DMIC_CLK_3_0MHZ:
2795 case DA7218_DMIC_CLK_1_5MHZ:
2796 dmic_cfg |= (pdata->dmic2_clk_rate <<
2797 DA7218_DMIC_2_CLK_RATE_SHIFT);
2798 break;
2799 }
2800
2801 snd_soc_update_bits(codec, DA7218_DMIC_2_CTRL,
2802 DA7218_DMIC_2_DATA_SEL_MASK |
2803 DA7218_DMIC_2_SAMPLEPHASE_MASK |
2804 DA7218_DMIC_2_CLK_RATE_MASK, dmic_cfg);
2805
2806 /* DA7217 Specific */
2807 if (da7218->dev_id == DA7217_DEV_ID) {
2808 da7218->hp_single_supply =
2809 pdata->hp_diff_single_supply;
2810
2811 if (da7218->hp_single_supply) {
2812 snd_soc_write(codec, DA7218_HP_DIFF_UNLOCK,
2813 DA7218_HP_DIFF_UNLOCK_VAL);
2814 snd_soc_update_bits(codec, DA7218_HP_DIFF_CTRL,
2815 DA7218_HP_AMP_SINGLE_SUPPLY_EN_MASK,
2816 DA7218_HP_AMP_SINGLE_SUPPLY_EN_MASK);
2817 }
2818 }
2819
2820 /* DA7218 Specific */
2821 if ((da7218->dev_id == DA7218_DEV_ID) &&
2822 (pdata->hpldet_pdata)) {
2823 struct da7218_hpldet_pdata *hpldet_pdata =
2824 pdata->hpldet_pdata;
2825 u8 hpldet_cfg = 0;
2826
2827 switch (hpldet_pdata->jack_rate) {
2828 case DA7218_HPLDET_JACK_RATE_5US:
2829 case DA7218_HPLDET_JACK_RATE_10US:
2830 case DA7218_HPLDET_JACK_RATE_20US:
2831 case DA7218_HPLDET_JACK_RATE_40US:
2832 case DA7218_HPLDET_JACK_RATE_80US:
2833 case DA7218_HPLDET_JACK_RATE_160US:
2834 case DA7218_HPLDET_JACK_RATE_320US:
2835 case DA7218_HPLDET_JACK_RATE_640US:
2836 hpldet_cfg |=
2837 (hpldet_pdata->jack_rate <<
2838 DA7218_HPLDET_JACK_RATE_SHIFT);
2839 break;
2840 }
2841
2842 switch (hpldet_pdata->jack_debounce) {
2843 case DA7218_HPLDET_JACK_DEBOUNCE_OFF:
2844 case DA7218_HPLDET_JACK_DEBOUNCE_2:
2845 case DA7218_HPLDET_JACK_DEBOUNCE_3:
2846 case DA7218_HPLDET_JACK_DEBOUNCE_4:
2847 hpldet_cfg |=
2848 (hpldet_pdata->jack_debounce <<
2849 DA7218_HPLDET_JACK_DEBOUNCE_SHIFT);
2850 break;
2851 }
2852
2853 switch (hpldet_pdata->jack_thr) {
2854 case DA7218_HPLDET_JACK_THR_84PCT:
2855 case DA7218_HPLDET_JACK_THR_88PCT:
2856 case DA7218_HPLDET_JACK_THR_92PCT:
2857 case DA7218_HPLDET_JACK_THR_96PCT:
2858 hpldet_cfg |=
2859 (hpldet_pdata->jack_thr <<
2860 DA7218_HPLDET_JACK_THR_SHIFT);
2861 break;
2862 }
2863 snd_soc_update_bits(codec, DA7218_HPLDET_JACK,
2864 DA7218_HPLDET_JACK_RATE_MASK |
2865 DA7218_HPLDET_JACK_DEBOUNCE_MASK |
2866 DA7218_HPLDET_JACK_THR_MASK,
2867 hpldet_cfg);
2868
2869 hpldet_cfg = 0;
2870 if (hpldet_pdata->comp_inv)
2871 hpldet_cfg |= DA7218_HPLDET_COMP_INV_MASK;
2872
2873 if (hpldet_pdata->hyst)
2874 hpldet_cfg |= DA7218_HPLDET_HYST_EN_MASK;
2875
2876 if (hpldet_pdata->discharge)
2877 hpldet_cfg |= DA7218_HPLDET_DISCHARGE_EN_MASK;
2878
2879 snd_soc_write(codec, DA7218_HPLDET_CTRL, hpldet_cfg);
2880 }
2881 }
2882 }
2883
2884 static int da7218_probe(struct snd_soc_codec *codec)
2885 {
2886 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2887 int ret;
2888
2889 /* Regulator configuration */
2890 ret = da7218_handle_supplies(codec);
2891 if (ret)
2892 return ret;
2893
2894 /* Handle DT/Platform data */
2895 if (codec->dev->of_node)
2896 da7218->pdata = da7218_of_to_pdata(codec);
2897 else
2898 da7218->pdata = dev_get_platdata(codec->dev);
2899
2900 da7218_handle_pdata(codec);
2901
2902 /* Check if MCLK provided, if not the clock is NULL */
2903 da7218->mclk = devm_clk_get(codec->dev, "mclk");
2904 if (IS_ERR(da7218->mclk)) {
2905 if (PTR_ERR(da7218->mclk) != -ENOENT) {
2906 ret = PTR_ERR(da7218->mclk);
2907 goto err_disable_reg;
2908 } else {
2909 da7218->mclk = NULL;
2910 }
2911 }
2912
2913 /* Default PC to free-running */
2914 snd_soc_write(codec, DA7218_PC_COUNT, DA7218_PC_FREERUN_MASK);
2915
2916 /*
2917 * Default Output Filter mixers to off otherwise DAPM will power
2918 * Mic to HP passthrough paths by default at startup.
2919 */
2920 snd_soc_write(codec, DA7218_DROUTING_OUTFILT_1L, 0);
2921 snd_soc_write(codec, DA7218_DROUTING_OUTFILT_1R, 0);
2922
2923 /* Default CP to normal load, power mode */
2924 snd_soc_update_bits(codec, DA7218_CP_CTRL,
2925 DA7218_CP_SMALL_SWITCH_FREQ_EN_MASK, 0);
2926
2927 /* Default gain ramping */
2928 snd_soc_update_bits(codec, DA7218_MIXIN_1_CTRL,
2929 DA7218_MIXIN_1_AMP_RAMP_EN_MASK,
2930 DA7218_MIXIN_1_AMP_RAMP_EN_MASK);
2931 snd_soc_update_bits(codec, DA7218_MIXIN_2_CTRL,
2932 DA7218_MIXIN_2_AMP_RAMP_EN_MASK,
2933 DA7218_MIXIN_2_AMP_RAMP_EN_MASK);
2934 snd_soc_update_bits(codec, DA7218_IN_1L_FILTER_CTRL,
2935 DA7218_IN_1L_RAMP_EN_MASK,
2936 DA7218_IN_1L_RAMP_EN_MASK);
2937 snd_soc_update_bits(codec, DA7218_IN_1R_FILTER_CTRL,
2938 DA7218_IN_1R_RAMP_EN_MASK,
2939 DA7218_IN_1R_RAMP_EN_MASK);
2940 snd_soc_update_bits(codec, DA7218_IN_2L_FILTER_CTRL,
2941 DA7218_IN_2L_RAMP_EN_MASK,
2942 DA7218_IN_2L_RAMP_EN_MASK);
2943 snd_soc_update_bits(codec, DA7218_IN_2R_FILTER_CTRL,
2944 DA7218_IN_2R_RAMP_EN_MASK,
2945 DA7218_IN_2R_RAMP_EN_MASK);
2946 snd_soc_update_bits(codec, DA7218_DGS_GAIN_CTRL,
2947 DA7218_DGS_RAMP_EN_MASK, DA7218_DGS_RAMP_EN_MASK);
2948 snd_soc_update_bits(codec, DA7218_OUT_1L_FILTER_CTRL,
2949 DA7218_OUT_1L_RAMP_EN_MASK,
2950 DA7218_OUT_1L_RAMP_EN_MASK);
2951 snd_soc_update_bits(codec, DA7218_OUT_1R_FILTER_CTRL,
2952 DA7218_OUT_1R_RAMP_EN_MASK,
2953 DA7218_OUT_1R_RAMP_EN_MASK);
2954 snd_soc_update_bits(codec, DA7218_HP_L_CTRL,
2955 DA7218_HP_L_AMP_RAMP_EN_MASK,
2956 DA7218_HP_L_AMP_RAMP_EN_MASK);
2957 snd_soc_update_bits(codec, DA7218_HP_R_CTRL,
2958 DA7218_HP_R_AMP_RAMP_EN_MASK,
2959 DA7218_HP_R_AMP_RAMP_EN_MASK);
2960
2961 /* Default infinite tone gen, start/stop by Kcontrol */
2962 snd_soc_write(codec, DA7218_TONE_GEN_CYCLES, DA7218_BEEP_CYCLES_MASK);
2963
2964 /* DA7217 specific config */
2965 if (da7218->dev_id == DA7217_DEV_ID) {
2966 snd_soc_update_bits(codec, DA7218_HP_DIFF_CTRL,
2967 DA7218_HP_AMP_DIFF_MODE_EN_MASK,
2968 DA7218_HP_AMP_DIFF_MODE_EN_MASK);
2969
2970 /* Only DA7218 supports HP detect, mask off for DA7217 */
2971 snd_soc_write(codec, DA7218_EVENT_MASK,
2972 DA7218_HPLDET_JACK_EVENT_IRQ_MSK_MASK);
2973 }
2974
2975 if (da7218->irq) {
2976 ret = devm_request_threaded_irq(codec->dev, da7218->irq, NULL,
2977 da7218_irq_thread,
2978 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
2979 "da7218", codec);
2980 if (ret != 0) {
2981 dev_err(codec->dev, "Failed to request IRQ %d: %d\n",
2982 da7218->irq, ret);
2983 goto err_disable_reg;
2984 }
2985
2986 }
2987
2988 return 0;
2989
2990 err_disable_reg:
2991 regulator_bulk_disable(DA7218_NUM_SUPPLIES, da7218->supplies);
2992
2993 return ret;
2994 }
2995
2996 static int da7218_remove(struct snd_soc_codec *codec)
2997 {
2998 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2999
3000 regulator_bulk_disable(DA7218_NUM_SUPPLIES, da7218->supplies);
3001
3002 return 0;
3003 }
3004
3005 #ifdef CONFIG_PM
3006 static int da7218_suspend(struct snd_soc_codec *codec)
3007 {
3008 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
3009
3010 da7218_set_bias_level(codec, SND_SOC_BIAS_OFF);
3011
3012 /* Put device into standby mode if jack detection disabled */
3013 if (!da7218->jack)
3014 snd_soc_write(codec, DA7218_SYSTEM_ACTIVE, 0);
3015
3016 return 0;
3017 }
3018
3019 static int da7218_resume(struct snd_soc_codec *codec)
3020 {
3021 struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
3022
3023 /* Put device into active mode if previously moved to standby */
3024 if (!da7218->jack)
3025 snd_soc_write(codec, DA7218_SYSTEM_ACTIVE,
3026 DA7218_SYSTEM_ACTIVE_MASK);
3027
3028 da7218_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
3029
3030 return 0;
3031 }
3032 #else
3033 #define da7218_suspend NULL
3034 #define da7218_resume NULL
3035 #endif
3036
3037 static struct snd_soc_codec_driver soc_codec_dev_da7218 = {
3038 .probe = da7218_probe,
3039 .remove = da7218_remove,
3040 .suspend = da7218_suspend,
3041 .resume = da7218_resume,
3042 .set_bias_level = da7218_set_bias_level,
3043
3044 .component_driver = {
3045 .controls = da7218_snd_controls,
3046 .num_controls = ARRAY_SIZE(da7218_snd_controls),
3047 .dapm_widgets = da7218_dapm_widgets,
3048 .num_dapm_widgets = ARRAY_SIZE(da7218_dapm_widgets),
3049 .dapm_routes = da7218_audio_map,
3050 .num_dapm_routes = ARRAY_SIZE(da7218_audio_map),
3051 },
3052 };
3053
3054
3055 /*
3056 * Regmap configs
3057 */
3058
3059 static struct reg_default da7218_reg_defaults[] = {
3060 { DA7218_SYSTEM_ACTIVE, 0x00 },
3061 { DA7218_CIF_CTRL, 0x00 },
3062 { DA7218_SPARE1, 0x00 },
3063 { DA7218_SR, 0xAA },
3064 { DA7218_PC_COUNT, 0x02 },
3065 { DA7218_GAIN_RAMP_CTRL, 0x00 },
3066 { DA7218_CIF_TIMEOUT_CTRL, 0x01 },
3067 { DA7218_SYSTEM_MODES_INPUT, 0x00 },
3068 { DA7218_SYSTEM_MODES_OUTPUT, 0x00 },
3069 { DA7218_IN_1L_FILTER_CTRL, 0x00 },
3070 { DA7218_IN_1R_FILTER_CTRL, 0x00 },
3071 { DA7218_IN_2L_FILTER_CTRL, 0x00 },
3072 { DA7218_IN_2R_FILTER_CTRL, 0x00 },
3073 { DA7218_OUT_1L_FILTER_CTRL, 0x40 },
3074 { DA7218_OUT_1R_FILTER_CTRL, 0x40 },
3075 { DA7218_OUT_1_HPF_FILTER_CTRL, 0x80 },
3076 { DA7218_OUT_1_EQ_12_FILTER_CTRL, 0x77 },
3077 { DA7218_OUT_1_EQ_34_FILTER_CTRL, 0x77 },
3078 { DA7218_OUT_1_EQ_5_FILTER_CTRL, 0x07 },
3079 { DA7218_OUT_1_BIQ_5STAGE_CTRL, 0x40 },
3080 { DA7218_OUT_1_BIQ_5STAGE_DATA, 0x00 },
3081 { DA7218_OUT_1_BIQ_5STAGE_ADDR, 0x00 },
3082 { DA7218_MIXIN_1_CTRL, 0x48 },
3083 { DA7218_MIXIN_1_GAIN, 0x03 },
3084 { DA7218_MIXIN_2_CTRL, 0x48 },
3085 { DA7218_MIXIN_2_GAIN, 0x03 },
3086 { DA7218_ALC_CTRL1, 0x00 },
3087 { DA7218_ALC_CTRL2, 0x00 },
3088 { DA7218_ALC_CTRL3, 0x00 },
3089 { DA7218_ALC_NOISE, 0x3F },
3090 { DA7218_ALC_TARGET_MIN, 0x3F },
3091 { DA7218_ALC_TARGET_MAX, 0x00 },
3092 { DA7218_ALC_GAIN_LIMITS, 0xFF },
3093 { DA7218_ALC_ANA_GAIN_LIMITS, 0x71 },
3094 { DA7218_ALC_ANTICLIP_CTRL, 0x00 },
3095 { DA7218_AGS_ENABLE, 0x00 },
3096 { DA7218_AGS_TRIGGER, 0x09 },
3097 { DA7218_AGS_ATT_MAX, 0x00 },
3098 { DA7218_AGS_TIMEOUT, 0x00 },
3099 { DA7218_AGS_ANTICLIP_CTRL, 0x00 },
3100 { DA7218_ENV_TRACK_CTRL, 0x00 },
3101 { DA7218_LVL_DET_CTRL, 0x00 },
3102 { DA7218_LVL_DET_LEVEL, 0x7F },
3103 { DA7218_DGS_TRIGGER, 0x24 },
3104 { DA7218_DGS_ENABLE, 0x00 },
3105 { DA7218_DGS_RISE_FALL, 0x50 },
3106 { DA7218_DGS_SYNC_DELAY, 0xA3 },
3107 { DA7218_DGS_SYNC_DELAY2, 0x31 },
3108 { DA7218_DGS_SYNC_DELAY3, 0x11 },
3109 { DA7218_DGS_LEVELS, 0x01 },
3110 { DA7218_DGS_GAIN_CTRL, 0x74 },
3111 { DA7218_DROUTING_OUTDAI_1L, 0x01 },
3112 { DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN, 0x1C },
3113 { DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN, 0x1C },
3114 { DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN, 0x1C },
3115 { DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN, 0x1C },
3116 { DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN, 0x1C },
3117 { DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN, 0x1C },
3118 { DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN, 0x1C },
3119 { DA7218_DROUTING_OUTDAI_1R, 0x04 },
3120 { DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN, 0x1C },
3121 { DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN, 0x1C },
3122 { DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN, 0x1C },
3123 { DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN, 0x1C },
3124 { DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN, 0x1C },
3125 { DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN, 0x1C },
3126 { DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN, 0x1C },
3127 { DA7218_DROUTING_OUTFILT_1L, 0x01 },
3128 { DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN, 0x1C },
3129 { DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN, 0x1C },
3130 { DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN, 0x1C },
3131 { DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN, 0x1C },
3132 { DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN, 0x1C },
3133 { DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN, 0x1C },
3134 { DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN, 0x1C },
3135 { DA7218_DROUTING_OUTFILT_1R, 0x04 },
3136 { DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN, 0x1C },
3137 { DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN, 0x1C },
3138 { DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN, 0x1C },
3139 { DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN, 0x1C },
3140 { DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN, 0x1C },
3141 { DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN, 0x1C },
3142 { DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN, 0x1C },
3143 { DA7218_DROUTING_OUTDAI_2L, 0x04 },
3144 { DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN, 0x1C },
3145 { DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN, 0x1C },
3146 { DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN, 0x1C },
3147 { DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN, 0x1C },
3148 { DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN, 0x1C },
3149 { DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN, 0x1C },
3150 { DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN, 0x1C },
3151 { DA7218_DROUTING_OUTDAI_2R, 0x08 },
3152 { DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN, 0x1C },
3153 { DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN, 0x1C },
3154 { DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN, 0x1C },
3155 { DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN, 0x1C },
3156 { DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN, 0x1C },
3157 { DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN, 0x1C },
3158 { DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN, 0x1C },
3159 { DA7218_DAI_CTRL, 0x28 },
3160 { DA7218_DAI_TDM_CTRL, 0x40 },
3161 { DA7218_DAI_OFFSET_LOWER, 0x00 },
3162 { DA7218_DAI_OFFSET_UPPER, 0x00 },
3163 { DA7218_DAI_CLK_MODE, 0x01 },
3164 { DA7218_PLL_CTRL, 0x04 },
3165 { DA7218_PLL_FRAC_TOP, 0x00 },
3166 { DA7218_PLL_FRAC_BOT, 0x00 },
3167 { DA7218_PLL_INTEGER, 0x20 },
3168 { DA7218_DAC_NG_CTRL, 0x00 },
3169 { DA7218_DAC_NG_SETUP_TIME, 0x00 },
3170 { DA7218_DAC_NG_OFF_THRESH, 0x00 },
3171 { DA7218_DAC_NG_ON_THRESH, 0x00 },
3172 { DA7218_TONE_GEN_CFG2, 0x00 },
3173 { DA7218_TONE_GEN_FREQ1_L, 0x55 },
3174 { DA7218_TONE_GEN_FREQ1_U, 0x15 },
3175 { DA7218_TONE_GEN_FREQ2_L, 0x00 },
3176 { DA7218_TONE_GEN_FREQ2_U, 0x40 },
3177 { DA7218_TONE_GEN_CYCLES, 0x00 },
3178 { DA7218_TONE_GEN_ON_PER, 0x02 },
3179 { DA7218_TONE_GEN_OFF_PER, 0x01 },
3180 { DA7218_CP_CTRL, 0x60 },
3181 { DA7218_CP_DELAY, 0x11 },
3182 { DA7218_CP_VOL_THRESHOLD1, 0x0E },
3183 { DA7218_MIC_1_CTRL, 0x40 },
3184 { DA7218_MIC_1_GAIN, 0x01 },
3185 { DA7218_MIC_1_SELECT, 0x00 },
3186 { DA7218_MIC_2_CTRL, 0x40 },
3187 { DA7218_MIC_2_GAIN, 0x01 },
3188 { DA7218_MIC_2_SELECT, 0x00 },
3189 { DA7218_IN_1_HPF_FILTER_CTRL, 0x80 },
3190 { DA7218_IN_2_HPF_FILTER_CTRL, 0x80 },
3191 { DA7218_ADC_1_CTRL, 0x07 },
3192 { DA7218_ADC_2_CTRL, 0x07 },
3193 { DA7218_MIXOUT_L_CTRL, 0x00 },
3194 { DA7218_MIXOUT_L_GAIN, 0x03 },
3195 { DA7218_MIXOUT_R_CTRL, 0x00 },
3196 { DA7218_MIXOUT_R_GAIN, 0x03 },
3197 { DA7218_HP_L_CTRL, 0x40 },
3198 { DA7218_HP_L_GAIN, 0x3B },
3199 { DA7218_HP_R_CTRL, 0x40 },
3200 { DA7218_HP_R_GAIN, 0x3B },
3201 { DA7218_HP_DIFF_CTRL, 0x00 },
3202 { DA7218_HP_DIFF_UNLOCK, 0xC3 },
3203 { DA7218_HPLDET_JACK, 0x0B },
3204 { DA7218_HPLDET_CTRL, 0x00 },
3205 { DA7218_REFERENCES, 0x08 },
3206 { DA7218_IO_CTRL, 0x00 },
3207 { DA7218_LDO_CTRL, 0x00 },
3208 { DA7218_SIDETONE_CTRL, 0x40 },
3209 { DA7218_SIDETONE_IN_SELECT, 0x00 },
3210 { DA7218_SIDETONE_GAIN, 0x1C },
3211 { DA7218_DROUTING_ST_OUTFILT_1L, 0x01 },
3212 { DA7218_DROUTING_ST_OUTFILT_1R, 0x02 },
3213 { DA7218_SIDETONE_BIQ_3STAGE_DATA, 0x00 },
3214 { DA7218_SIDETONE_BIQ_3STAGE_ADDR, 0x00 },
3215 { DA7218_EVENT_MASK, 0x00 },
3216 { DA7218_DMIC_1_CTRL, 0x00 },
3217 { DA7218_DMIC_2_CTRL, 0x00 },
3218 { DA7218_IN_1L_GAIN, 0x6F },
3219 { DA7218_IN_1R_GAIN, 0x6F },
3220 { DA7218_IN_2L_GAIN, 0x6F },
3221 { DA7218_IN_2R_GAIN, 0x6F },
3222 { DA7218_OUT_1L_GAIN, 0x6F },
3223 { DA7218_OUT_1R_GAIN, 0x6F },
3224 { DA7218_MICBIAS_CTRL, 0x00 },
3225 { DA7218_MICBIAS_EN, 0x00 },
3226 };
3227
3228 static bool da7218_volatile_register(struct device *dev, unsigned int reg)
3229 {
3230 switch (reg) {
3231 case DA7218_STATUS1:
3232 case DA7218_SOFT_RESET:
3233 case DA7218_SYSTEM_STATUS:
3234 case DA7218_CALIB_CTRL:
3235 case DA7218_CALIB_OFFSET_AUTO_M_1:
3236 case DA7218_CALIB_OFFSET_AUTO_U_1:
3237 case DA7218_CALIB_OFFSET_AUTO_M_2:
3238 case DA7218_CALIB_OFFSET_AUTO_U_2:
3239 case DA7218_PLL_STATUS:
3240 case DA7218_PLL_REFOSC_CAL:
3241 case DA7218_TONE_GEN_CFG1:
3242 case DA7218_ADC_MODE:
3243 case DA7218_HP_SNGL_CTRL:
3244 case DA7218_HPLDET_TEST:
3245 case DA7218_EVENT_STATUS:
3246 case DA7218_EVENT:
3247 return true;
3248 default:
3249 return false;
3250 }
3251 }
3252
3253 static const struct regmap_config da7218_regmap_config = {
3254 .reg_bits = 8,
3255 .val_bits = 8,
3256
3257 .max_register = DA7218_MICBIAS_EN,
3258 .reg_defaults = da7218_reg_defaults,
3259 .num_reg_defaults = ARRAY_SIZE(da7218_reg_defaults),
3260 .volatile_reg = da7218_volatile_register,
3261 .cache_type = REGCACHE_RBTREE,
3262 };
3263
3264
3265 /*
3266 * I2C layer
3267 */
3268
3269 static int da7218_i2c_probe(struct i2c_client *i2c,
3270 const struct i2c_device_id *id)
3271 {
3272 struct da7218_priv *da7218;
3273 int ret;
3274
3275 da7218 = devm_kzalloc(&i2c->dev, sizeof(struct da7218_priv),
3276 GFP_KERNEL);
3277 if (!da7218)
3278 return -ENOMEM;
3279
3280 i2c_set_clientdata(i2c, da7218);
3281
3282 if (i2c->dev.of_node)
3283 da7218->dev_id = da7218_of_get_id(&i2c->dev);
3284 else
3285 da7218->dev_id = id->driver_data;
3286
3287 if ((da7218->dev_id != DA7217_DEV_ID) &&
3288 (da7218->dev_id != DA7218_DEV_ID)) {
3289 dev_err(&i2c->dev, "Invalid device Id\n");
3290 return -EINVAL;
3291 }
3292
3293 da7218->irq = i2c->irq;
3294
3295 da7218->regmap = devm_regmap_init_i2c(i2c, &da7218_regmap_config);
3296 if (IS_ERR(da7218->regmap)) {
3297 ret = PTR_ERR(da7218->regmap);
3298 dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
3299 return ret;
3300 }
3301
3302 ret = snd_soc_register_codec(&i2c->dev,
3303 &soc_codec_dev_da7218, &da7218_dai, 1);
3304 if (ret < 0) {
3305 dev_err(&i2c->dev, "Failed to register da7218 codec: %d\n",
3306 ret);
3307 }
3308 return ret;
3309 }
3310
3311 static int da7218_i2c_remove(struct i2c_client *client)
3312 {
3313 snd_soc_unregister_codec(&client->dev);
3314 return 0;
3315 }
3316
3317 static const struct i2c_device_id da7218_i2c_id[] = {
3318 { "da7217", DA7217_DEV_ID },
3319 { "da7218", DA7218_DEV_ID },
3320 { }
3321 };
3322 MODULE_DEVICE_TABLE(i2c, da7218_i2c_id);
3323
3324 static struct i2c_driver da7218_i2c_driver = {
3325 .driver = {
3326 .name = "da7218",
3327 .of_match_table = of_match_ptr(da7218_of_match),
3328 },
3329 .probe = da7218_i2c_probe,
3330 .remove = da7218_i2c_remove,
3331 .id_table = da7218_i2c_id,
3332 };
3333
3334 module_i2c_driver(da7218_i2c_driver);
3335
3336 MODULE_DESCRIPTION("ASoC DA7218 Codec driver");
3337 MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
3338 MODULE_LICENSE("GPL");
Linux with added FPC-III support