sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / sound / soc / codecs / isabelle.h
blob96d839a8c9564e01b31ea6378580944ada1cebc0
1 /*
2 * isabelle.h - Low power high fidelity audio codec driver header file
4 * Copyright (c) 2012 Texas Instruments, Inc
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
12 #ifndef _ISABELLE_H
13 #define _ISABELLE_H
15 #include <linux/bitops.h>
17 /* ISABELLE REGISTERS */
19 #define ISABELLE_PWR_CFG_REG 0x01
20 #define ISABELLE_PWR_EN_REG 0x02
21 #define ISABELLE_PS_EN1_REG 0x03
22 #define ISABELLE_INT1_STATUS_REG 0x04
23 #define ISABELLE_INT1_MASK_REG 0x05
24 #define ISABELLE_INT2_STATUS_REG 0x06
25 #define ISABELLE_INT2_MASK_REG 0x07
26 #define ISABELLE_HKCTL1_REG 0x08
27 #define ISABELLE_HKCTL2_REG 0x09
28 #define ISABELLE_HKCTL3_REG 0x0A
29 #define ISABELLE_ACCDET_STATUS_REG 0x0B
30 #define ISABELLE_BUTTON_ID_REG 0x0C
31 #define ISABELLE_PLL_CFG_REG 0x10
32 #define ISABELLE_PLL_EN_REG 0x11
33 #define ISABELLE_FS_RATE_CFG_REG 0x12
34 #define ISABELLE_INTF_CFG_REG 0x13
35 #define ISABELLE_INTF_EN_REG 0x14
36 #define ISABELLE_ULATX12_INTF_CFG_REG 0x15
37 #define ISABELLE_DL12_INTF_CFG_REG 0x16
38 #define ISABELLE_DL34_INTF_CFG_REG 0x17
39 #define ISABELLE_DL56_INTF_CFG_REG 0x18
40 #define ISABELLE_ATX_STPGA1_CFG_REG 0x19
41 #define ISABELLE_ATX_STPGA2_CFG_REG 0x1A
42 #define ISABELLE_VTX_STPGA1_CFG_REG 0x1B
43 #define ISABELLE_VTX2_STPGA2_CFG_REG 0x1C
44 #define ISABELLE_ATX1_DPGA_REG 0x1D
45 #define ISABELLE_ATX2_DPGA_REG 0x1E
46 #define ISABELLE_VTX1_DPGA_REG 0x1F
47 #define ISABELLE_VTX2_DPGA_REG 0x20
48 #define ISABELLE_TX_INPUT_CFG_REG 0x21
49 #define ISABELLE_RX_INPUT_CFG_REG 0x22
50 #define ISABELLE_RX_INPUT_CFG2_REG 0x23
51 #define ISABELLE_VOICE_HPF_CFG_REG 0x24
52 #define ISABELLE_AUDIO_HPF_CFG_REG 0x25
53 #define ISABELLE_RX1_DPGA_REG 0x26
54 #define ISABELLE_RX2_DPGA_REG 0x27
55 #define ISABELLE_RX3_DPGA_REG 0x28
56 #define ISABELLE_RX4_DPGA_REG 0x29
57 #define ISABELLE_RX5_DPGA_REG 0x2A
58 #define ISABELLE_RX6_DPGA_REG 0x2B
59 #define ISABELLE_ALU_TX_EN_REG 0x2C
60 #define ISABELLE_ALU_RX_EN_REG 0x2D
61 #define ISABELLE_IIR_RESYNC_REG 0x2E
62 #define ISABELLE_ABIAS_CFG_REG 0x30
63 #define ISABELLE_DBIAS_CFG_REG 0x31
64 #define ISABELLE_MIC1_GAIN_REG 0x32
65 #define ISABELLE_MIC2_GAIN_REG 0x33
66 #define ISABELLE_AMIC_CFG_REG 0x34
67 #define ISABELLE_DMIC_CFG_REG 0x35
68 #define ISABELLE_APGA_GAIN_REG 0x36
69 #define ISABELLE_APGA_CFG_REG 0x37
70 #define ISABELLE_TX_GAIN_DLY_REG 0x38
71 #define ISABELLE_RX_GAIN_DLY_REG 0x39
72 #define ISABELLE_RX_PWR_CTRL_REG 0x3A
73 #define ISABELLE_DPGA1LR_IN_SEL_REG 0x3B
74 #define ISABELLE_DPGA1L_GAIN_REG 0x3C
75 #define ISABELLE_DPGA1R_GAIN_REG 0x3D
76 #define ISABELLE_DPGA2L_IN_SEL_REG 0x3E
77 #define ISABELLE_DPGA2R_IN_SEL_REG 0x3F
78 #define ISABELLE_DPGA2L_GAIN_REG 0x40
79 #define ISABELLE_DPGA2R_GAIN_REG 0x41
80 #define ISABELLE_DPGA3LR_IN_SEL_REG 0x42
81 #define ISABELLE_DPGA3L_GAIN_REG 0x43
82 #define ISABELLE_DPGA3R_GAIN_REG 0x44
83 #define ISABELLE_DAC1_SOFTRAMP_REG 0x45
84 #define ISABELLE_DAC2_SOFTRAMP_REG 0x46
85 #define ISABELLE_DAC3_SOFTRAMP_REG 0x47
86 #define ISABELLE_DAC_CFG_REG 0x48
87 #define ISABELLE_EARDRV_CFG1_REG 0x49
88 #define ISABELLE_EARDRV_CFG2_REG 0x4A
89 #define ISABELLE_HSDRV_GAIN_REG 0x4B
90 #define ISABELLE_HSDRV_CFG1_REG 0x4C
91 #define ISABELLE_HSDRV_CFG2_REG 0x4D
92 #define ISABELLE_HS_NG_CFG1_REG 0x4E
93 #define ISABELLE_HS_NG_CFG2_REG 0x4F
94 #define ISABELLE_LINEAMP_GAIN_REG 0x50
95 #define ISABELLE_LINEAMP_CFG_REG 0x51
96 #define ISABELLE_HFL_VOL_CTRL_REG 0x52
97 #define ISABELLE_HFL_SFTVOL_CTRL_REG 0x53
98 #define ISABELLE_HFL_LIM_CTRL_1_REG 0x54
99 #define ISABELLE_HFL_LIM_CTRL_2_REG 0x55
100 #define ISABELLE_HFR_VOL_CTRL_REG 0x56
101 #define ISABELLE_HFR_SFTVOL_CTRL_REG 0x57
102 #define ISABELLE_HFR_LIM_CTRL_1_REG 0x58
103 #define ISABELLE_HFR_LIM_CTRL_2_REG 0x59
104 #define ISABELLE_HF_MODE_REG 0x5A
105 #define ISABELLE_HFLPGA_CFG_REG 0x5B
106 #define ISABELLE_HFRPGA_CFG_REG 0x5C
107 #define ISABELLE_HFDRV_CFG_REG 0x5D
108 #define ISABELLE_PDMOUT_CFG1_REG 0x5E
109 #define ISABELLE_PDMOUT_CFG2_REG 0x5F
110 #define ISABELLE_PDMOUT_L_WM_REG 0x60
111 #define ISABELLE_PDMOUT_R_WM_REG 0x61
112 #define ISABELLE_HF_NG_CFG1_REG 0x62
113 #define ISABELLE_HF_NG_CFG2_REG 0x63
115 /* ISABELLE_PWR_EN_REG (0x02h) */
116 #define ISABELLE_CHIP_EN BIT(0)
118 /* ISABELLE DAI FORMATS */
119 #define ISABELLE_AIF_FMT_MASK 0x70
120 #define ISABELLE_I2S_MODE 0x0
121 #define ISABELLE_LEFT_J_MODE 0x1
122 #define ISABELLE_PDM_MODE 0x2
124 #define ISABELLE_AIF_LENGTH_MASK 0x30
125 #define ISABELLE_AIF_LENGTH_20 0x00
126 #define ISABELLE_AIF_LENGTH_32 0x10
128 #define ISABELLE_AIF_MS 0x80
130 #define ISABELLE_FS_RATE_MASK 0xF
131 #define ISABELLE_FS_RATE_8 0x0
132 #define ISABELLE_FS_RATE_11 0x1
133 #define ISABELLE_FS_RATE_12 0x2
134 #define ISABELLE_FS_RATE_16 0x4
135 #define ISABELLE_FS_RATE_22 0x5
136 #define ISABELLE_FS_RATE_24 0x6
137 #define ISABELLE_FS_RATE_32 0x8
138 #define ISABELLE_FS_RATE_44 0x9
139 #define ISABELLE_FS_RATE_48 0xA
141 #define ISABELLE_MAX_REGISTER 0xFF
143 #endif