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sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / sound / soc / codecs / sn95031.c
blobeae54c37cff948fcb38f0665d0a3dfd16e1acba1
1 /*
2 * sn95031.c - TI sn95031 Codec driver
3 *
4 * Copyright (C) 2010 Intel Corp
5 * Author: Vinod Koul <vinod.koul@intel.com>
6 * Author: Harsha Priya <priya.harsha@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 *
22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23 *
24 *
25 */
26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27
28 #include <linux/platform_device.h>
29 #include <linux/delay.h>
30 #include <linux/slab.h>
31 #include <linux/module.h>
32
33 #include <asm/intel_scu_ipc.h>
34 #include <sound/pcm.h>
35 #include <sound/pcm_params.h>
36 #include <sound/soc.h>
37 #include <sound/soc-dapm.h>
38 #include <sound/initval.h>
39 #include <sound/tlv.h>
40 #include <sound/jack.h>
41 #include "sn95031.h"
42
43 #define SN95031_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100)
44 #define SN95031_FORMATS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
45
46 /* adc helper functions */
47
48 /* enables mic bias voltage */
49 static void sn95031_enable_mic_bias(struct snd_soc_codec *codec)
50 {
51 snd_soc_write(codec, SN95031_VAUD, BIT(2)|BIT(1)|BIT(0));
52 snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(2), BIT(2));
53 }
54
55 /* Enable/Disable the ADC depending on the argument */
56 static void configure_adc(struct snd_soc_codec *sn95031_codec, int val)
57 {
58 int value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
59
60 if (val) {
61 /* Enable and start the ADC */
62 value |= (SN95031_ADC_ENBL | SN95031_ADC_START);
63 value &= (~SN95031_ADC_NO_LOOP);
64 } else {
65 /* Just stop the ADC */
66 value &= (~SN95031_ADC_START);
67 }
68 snd_soc_write(sn95031_codec, SN95031_ADC1CNTL1, value);
69 }
70
71 /*
72 * finds an empty channel for conversion
73 * If the ADC is not enabled then start using 0th channel
74 * itself. Otherwise find an empty channel by looking for a
75 * channel in which the stopbit is set to 1. returns the index
76 * of the first free channel if succeeds or an error code.
77 *
78 * Context: can sleep
79 *
80 */
81 static int find_free_channel(struct snd_soc_codec *sn95031_codec)
82 {
83 int i, value;
84
85 /* check whether ADC is enabled */
86 value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
87
88 if ((value & SN95031_ADC_ENBL) == 0)
89 return 0;
90
91 /* ADC is already enabled; Looking for an empty channel */
92 for (i = 0; i < SN95031_ADC_CHANLS_MAX; i++) {
93 value = snd_soc_read(sn95031_codec,
94 SN95031_ADC_CHNL_START_ADDR + i);
95 if (value & SN95031_STOPBIT_MASK)
96 break;
97 }
98 return (i == SN95031_ADC_CHANLS_MAX) ? (-EINVAL) : i;
99 }
100
101 /* Initialize the ADC for reading micbias values. Can sleep. */
102 static int sn95031_initialize_adc(struct snd_soc_codec *sn95031_codec)
103 {
104 int base_addr, chnl_addr;
105 int value;
106 int channel_index;
107
108 /* Index of the first channel in which the stop bit is set */
109 channel_index = find_free_channel(sn95031_codec);
110 if (channel_index < 0) {
111 pr_err("No free ADC channels");
112 return channel_index;
113 }
114
115 base_addr = SN95031_ADC_CHNL_START_ADDR + channel_index;
116
117 if (!(channel_index == 0 || channel_index == SN95031_ADC_LOOP_MAX)) {
118 /* Reset stop bit for channels other than 0 and 12 */
119 value = snd_soc_read(sn95031_codec, base_addr);
120 /* Set the stop bit to zero */
121 snd_soc_write(sn95031_codec, base_addr, value & 0xEF);
122 /* Index of the first free channel */
123 base_addr++;
124 channel_index++;
125 }
126
127 /* Since this is the last channel, set the stop bit
128 to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
129 snd_soc_write(sn95031_codec, base_addr,
130 SN95031_AUDIO_DETECT_CODE | 0x10);
131
132 chnl_addr = SN95031_ADC_DATA_START_ADDR + 2 * channel_index;
133 pr_debug("mid_initialize : %x", chnl_addr);
134 configure_adc(sn95031_codec, 1);
135 return chnl_addr;
136 }
137
138
139 /* reads the ADC registers and gets the mic bias value in mV. */
140 static unsigned int sn95031_get_mic_bias(struct snd_soc_codec *codec)
141 {
142 u16 adc_adr = sn95031_initialize_adc(codec);
143 u16 adc_val1, adc_val2;
144 unsigned int mic_bias;
145
146 sn95031_enable_mic_bias(codec);
147
148 /* Enable the sound card for conversion before reading */
149 snd_soc_write(codec, SN95031_ADC1CNTL3, 0x05);
150 /* Re-toggle the RRDATARD bit */
151 snd_soc_write(codec, SN95031_ADC1CNTL3, 0x04);
152
153 /* Read the higher bits of data */
154 msleep(1000);
155 adc_val1 = snd_soc_read(codec, adc_adr);
156 adc_adr++;
157 adc_val2 = snd_soc_read(codec, adc_adr);
158
159 /* Adding lower two bits to the higher bits */
160 mic_bias = (adc_val1 << 2) + (adc_val2 & 3);
161 mic_bias = (mic_bias * SN95031_ADC_ONE_LSB_MULTIPLIER) / 1000;
162 pr_debug("mic bias = %dmV\n", mic_bias);
163 return mic_bias;
164 }
165 /*end - adc helper functions */
166
167 static int sn95031_read(void *ctx, unsigned int reg, unsigned int *val)
168 {
169 u8 value = 0;
170 int ret;
171
172 ret = intel_scu_ipc_ioread8(reg, &value);
173 if (ret == 0)
174 *val = value;
175
176 return ret;
177 }
178
179 static int sn95031_write(void *ctx, unsigned int reg, unsigned int value)
180 {
181 return intel_scu_ipc_iowrite8(reg, value);
182 }
183
184 static const struct regmap_config sn95031_regmap = {
185 .reg_read = sn95031_read,
186 .reg_write = sn95031_write,
187 };
188
189 static int sn95031_set_vaud_bias(struct snd_soc_codec *codec,
190 enum snd_soc_bias_level level)
191 {
192 switch (level) {
193 case SND_SOC_BIAS_ON:
194 break;
195
196 case SND_SOC_BIAS_PREPARE:
197 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_STANDBY) {
198 pr_debug("vaud_bias powering up pll\n");
199 /* power up the pll */
200 snd_soc_write(codec, SN95031_AUDPLLCTRL, BIT(5));
201 /* enable pcm 2 */
202 snd_soc_update_bits(codec, SN95031_PCM2C2,
203 BIT(0), BIT(0));
204 }
205 break;
206
207 case SND_SOC_BIAS_STANDBY:
208 switch (snd_soc_codec_get_bias_level(codec)) {
209 case SND_SOC_BIAS_OFF:
210 pr_debug("vaud_bias power up rail\n");
211 /* power up the rail */
212 snd_soc_write(codec, SN95031_VAUD,
213 BIT(2)|BIT(1)|BIT(0));
214 msleep(1);
215 break;
216 case SND_SOC_BIAS_PREPARE:
217 /* turn off pcm */
218 pr_debug("vaud_bias power dn pcm\n");
219 snd_soc_update_bits(codec, SN95031_PCM2C2, BIT(0), 0);
220 snd_soc_write(codec, SN95031_AUDPLLCTRL, 0);
221 break;
222 default:
223 break;
224 }
225 break;
226
227
228 case SND_SOC_BIAS_OFF:
229 pr_debug("vaud_bias _OFF doing rail shutdown\n");
230 snd_soc_write(codec, SN95031_VAUD, BIT(3));
231 break;
232 }
233
234 return 0;
235 }
236
237 static int sn95031_vhs_event(struct snd_soc_dapm_widget *w,
238 struct snd_kcontrol *kcontrol, int event)
239 {
240 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
241
242 if (SND_SOC_DAPM_EVENT_ON(event)) {
243 pr_debug("VHS SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
244 /* power up the rail */
245 snd_soc_write(codec, SN95031_VHSP, 0x3D);
246 snd_soc_write(codec, SN95031_VHSN, 0x3F);
247 msleep(1);
248 } else if (SND_SOC_DAPM_EVENT_OFF(event)) {
249 pr_debug("VHS SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
250 snd_soc_write(codec, SN95031_VHSP, 0xC4);
251 snd_soc_write(codec, SN95031_VHSN, 0x04);
252 }
253 return 0;
254 }
255
256 static int sn95031_vihf_event(struct snd_soc_dapm_widget *w,
257 struct snd_kcontrol *kcontrol, int event)
258 {
259 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
260
261 if (SND_SOC_DAPM_EVENT_ON(event)) {
262 pr_debug("VIHF SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
263 /* power up the rail */
264 snd_soc_write(codec, SN95031_VIHF, 0x27);
265 msleep(1);
266 } else if (SND_SOC_DAPM_EVENT_OFF(event)) {
267 pr_debug("VIHF SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
268 snd_soc_write(codec, SN95031_VIHF, 0x24);
269 }
270 return 0;
271 }
272
273 static int sn95031_dmic12_event(struct snd_soc_dapm_widget *w,
274 struct snd_kcontrol *k, int event)
275 {
276 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
277 unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
278
279 if (SND_SOC_DAPM_EVENT_ON(event)) {
280 ldo = BIT(5)|BIT(4);
281 clk_dir = BIT(0);
282 data_dir = BIT(7);
283 }
284 /* program DMIC LDO, clock and set clock */
285 snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
286 snd_soc_update_bits(codec, SN95031_DMICBUF0123, BIT(0), clk_dir);
287 snd_soc_update_bits(codec, SN95031_DMICBUF0123, BIT(7), data_dir);
288 return 0;
289 }
290
291 static int sn95031_dmic34_event(struct snd_soc_dapm_widget *w,
292 struct snd_kcontrol *k, int event)
293 {
294 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
295 unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
296
297 if (SND_SOC_DAPM_EVENT_ON(event)) {
298 ldo = BIT(5)|BIT(4);
299 clk_dir = BIT(2);
300 data_dir = BIT(1);
301 }
302 /* program DMIC LDO, clock and set clock */
303 snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
304 snd_soc_update_bits(codec, SN95031_DMICBUF0123, BIT(2), clk_dir);
305 snd_soc_update_bits(codec, SN95031_DMICBUF45, BIT(1), data_dir);
306 return 0;
307 }
308
309 static int sn95031_dmic56_event(struct snd_soc_dapm_widget *w,
310 struct snd_kcontrol *k, int event)
311 {
312 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
313 unsigned int ldo = 0;
314
315 if (SND_SOC_DAPM_EVENT_ON(event))
316 ldo = BIT(7)|BIT(6);
317
318 /* program DMIC LDO */
319 snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(7)|BIT(6), ldo);
320 return 0;
321 }
322
323 /* mux controls */
324 static const char *sn95031_mic_texts[] = { "AMIC", "LineIn" };
325
326 static SOC_ENUM_SINGLE_DECL(sn95031_micl_enum,
327 SN95031_ADCCONFIG, 1, sn95031_mic_texts);
328
329 static const struct snd_kcontrol_new sn95031_micl_mux_control =
330 SOC_DAPM_ENUM("Route", sn95031_micl_enum);
331
332 static SOC_ENUM_SINGLE_DECL(sn95031_micr_enum,
333 SN95031_ADCCONFIG, 3, sn95031_mic_texts);
334
335 static const struct snd_kcontrol_new sn95031_micr_mux_control =
336 SOC_DAPM_ENUM("Route", sn95031_micr_enum);
337
338 static const char *sn95031_input_texts[] = { "DMIC1", "DMIC2", "DMIC3",
339 "DMIC4", "DMIC5", "DMIC6",
340 "ADC Left", "ADC Right" };
341
342 static SOC_ENUM_SINGLE_DECL(sn95031_input1_enum,
343 SN95031_AUDIOMUX12, 0, sn95031_input_texts);
344
345 static const struct snd_kcontrol_new sn95031_input1_mux_control =
346 SOC_DAPM_ENUM("Route", sn95031_input1_enum);
347
348 static SOC_ENUM_SINGLE_DECL(sn95031_input2_enum,
349 SN95031_AUDIOMUX12, 4, sn95031_input_texts);
350
351 static const struct snd_kcontrol_new sn95031_input2_mux_control =
352 SOC_DAPM_ENUM("Route", sn95031_input2_enum);
353
354 static SOC_ENUM_SINGLE_DECL(sn95031_input3_enum,
355 SN95031_AUDIOMUX34, 0, sn95031_input_texts);
356
357 static const struct snd_kcontrol_new sn95031_input3_mux_control =
358 SOC_DAPM_ENUM("Route", sn95031_input3_enum);
359
360 static SOC_ENUM_SINGLE_DECL(sn95031_input4_enum,
361 SN95031_AUDIOMUX34, 4, sn95031_input_texts);
362
363 static const struct snd_kcontrol_new sn95031_input4_mux_control =
364 SOC_DAPM_ENUM("Route", sn95031_input4_enum);
365
366 /* capture path controls */
367
368 static const char *sn95031_micmode_text[] = {"Single Ended", "Differential"};
369
370 /* 0dB to 30dB in 10dB steps */
371 static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 10, 0);
372
373 static SOC_ENUM_SINGLE_DECL(sn95031_micmode1_enum,
374 SN95031_MICAMP1, 1, sn95031_micmode_text);
375 static SOC_ENUM_SINGLE_DECL(sn95031_micmode2_enum,
376 SN95031_MICAMP2, 1, sn95031_micmode_text);
377
378 static const char *sn95031_dmic_cfg_text[] = {"GPO", "DMIC"};
379
380 static SOC_ENUM_SINGLE_DECL(sn95031_dmic12_cfg_enum,
381 SN95031_DMICMUX, 0, sn95031_dmic_cfg_text);
382 static SOC_ENUM_SINGLE_DECL(sn95031_dmic34_cfg_enum,
383 SN95031_DMICMUX, 1, sn95031_dmic_cfg_text);
384 static SOC_ENUM_SINGLE_DECL(sn95031_dmic56_cfg_enum,
385 SN95031_DMICMUX, 2, sn95031_dmic_cfg_text);
386
387 static const struct snd_kcontrol_new sn95031_snd_controls[] = {
388 SOC_ENUM("Mic1Mode Capture Route", sn95031_micmode1_enum),
389 SOC_ENUM("Mic2Mode Capture Route", sn95031_micmode2_enum),
390 SOC_ENUM("DMIC12 Capture Route", sn95031_dmic12_cfg_enum),
391 SOC_ENUM("DMIC34 Capture Route", sn95031_dmic34_cfg_enum),
392 SOC_ENUM("DMIC56 Capture Route", sn95031_dmic56_cfg_enum),
393 SOC_SINGLE_TLV("Mic1 Capture Volume", SN95031_MICAMP1,
394 2, 4, 0, mic_tlv),
395 SOC_SINGLE_TLV("Mic2 Capture Volume", SN95031_MICAMP2,
396 2, 4, 0, mic_tlv),
397 };
398
399 /* DAPM widgets */
400 static const struct snd_soc_dapm_widget sn95031_dapm_widgets[] = {
401
402 /* all end points mic, hs etc */
403 SND_SOC_DAPM_OUTPUT("HPOUTL"),
404 SND_SOC_DAPM_OUTPUT("HPOUTR"),
405 SND_SOC_DAPM_OUTPUT("EPOUT"),
406 SND_SOC_DAPM_OUTPUT("IHFOUTL"),
407 SND_SOC_DAPM_OUTPUT("IHFOUTR"),
408 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
409 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
410 SND_SOC_DAPM_OUTPUT("VIB1OUT"),
411 SND_SOC_DAPM_OUTPUT("VIB2OUT"),
412
413 SND_SOC_DAPM_INPUT("AMIC1"), /* headset mic */
414 SND_SOC_DAPM_INPUT("AMIC2"),
415 SND_SOC_DAPM_INPUT("DMIC1"),
416 SND_SOC_DAPM_INPUT("DMIC2"),
417 SND_SOC_DAPM_INPUT("DMIC3"),
418 SND_SOC_DAPM_INPUT("DMIC4"),
419 SND_SOC_DAPM_INPUT("DMIC5"),
420 SND_SOC_DAPM_INPUT("DMIC6"),
421 SND_SOC_DAPM_INPUT("LINEINL"),
422 SND_SOC_DAPM_INPUT("LINEINR"),
423
424 SND_SOC_DAPM_MICBIAS("AMIC1Bias", SN95031_MICBIAS, 2, 0),
425 SND_SOC_DAPM_MICBIAS("AMIC2Bias", SN95031_MICBIAS, 3, 0),
426 SND_SOC_DAPM_MICBIAS("DMIC12Bias", SN95031_DMICMUX, 3, 0),
427 SND_SOC_DAPM_MICBIAS("DMIC34Bias", SN95031_DMICMUX, 4, 0),
428 SND_SOC_DAPM_MICBIAS("DMIC56Bias", SN95031_DMICMUX, 5, 0),
429
430 SND_SOC_DAPM_SUPPLY("DMIC12supply", SN95031_DMICLK, 0, 0,
431 sn95031_dmic12_event,
432 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
433 SND_SOC_DAPM_SUPPLY("DMIC34supply", SN95031_DMICLK, 1, 0,
434 sn95031_dmic34_event,
435 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
436 SND_SOC_DAPM_SUPPLY("DMIC56supply", SN95031_DMICLK, 2, 0,
437 sn95031_dmic56_event,
438 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
439
440 SND_SOC_DAPM_AIF_OUT("PCM_Out", "Capture", 0,
441 SND_SOC_NOPM, 0, 0),
442
443 SND_SOC_DAPM_SUPPLY("Headset Rail", SND_SOC_NOPM, 0, 0,
444 sn95031_vhs_event,
445 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
446 SND_SOC_DAPM_SUPPLY("Speaker Rail", SND_SOC_NOPM, 0, 0,
447 sn95031_vihf_event,
448 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
449
450 /* playback path driver enables */
451 SND_SOC_DAPM_PGA("Headset Left Playback",
452 SN95031_DRIVEREN, 0, 0, NULL, 0),
453 SND_SOC_DAPM_PGA("Headset Right Playback",
454 SN95031_DRIVEREN, 1, 0, NULL, 0),
455 SND_SOC_DAPM_PGA("Speaker Left Playback",
456 SN95031_DRIVEREN, 2, 0, NULL, 0),
457 SND_SOC_DAPM_PGA("Speaker Right Playback",
458 SN95031_DRIVEREN, 3, 0, NULL, 0),
459 SND_SOC_DAPM_PGA("Vibra1 Playback",
460 SN95031_DRIVEREN, 4, 0, NULL, 0),
461 SND_SOC_DAPM_PGA("Vibra2 Playback",
462 SN95031_DRIVEREN, 5, 0, NULL, 0),
463 SND_SOC_DAPM_PGA("Earpiece Playback",
464 SN95031_DRIVEREN, 6, 0, NULL, 0),
465 SND_SOC_DAPM_PGA("Lineout Left Playback",
466 SN95031_LOCTL, 0, 0, NULL, 0),
467 SND_SOC_DAPM_PGA("Lineout Right Playback",
468 SN95031_LOCTL, 4, 0, NULL, 0),
469
470 /* playback path filter enable */
471 SND_SOC_DAPM_PGA("Headset Left Filter",
472 SN95031_HSEPRXCTRL, 4, 0, NULL, 0),
473 SND_SOC_DAPM_PGA("Headset Right Filter",
474 SN95031_HSEPRXCTRL, 5, 0, NULL, 0),
475 SND_SOC_DAPM_PGA("Speaker Left Filter",
476 SN95031_IHFRXCTRL, 0, 0, NULL, 0),
477 SND_SOC_DAPM_PGA("Speaker Right Filter",
478 SN95031_IHFRXCTRL, 1, 0, NULL, 0),
479
480 /* DACs */
481 SND_SOC_DAPM_DAC("HSDAC Left", "Headset",
482 SN95031_DACCONFIG, 0, 0),
483 SND_SOC_DAPM_DAC("HSDAC Right", "Headset",
484 SN95031_DACCONFIG, 1, 0),
485 SND_SOC_DAPM_DAC("IHFDAC Left", "Speaker",
486 SN95031_DACCONFIG, 2, 0),
487 SND_SOC_DAPM_DAC("IHFDAC Right", "Speaker",
488 SN95031_DACCONFIG, 3, 0),
489 SND_SOC_DAPM_DAC("Vibra1 DAC", "Vibra1",
490 SN95031_VIB1C5, 1, 0),
491 SND_SOC_DAPM_DAC("Vibra2 DAC", "Vibra2",
492 SN95031_VIB2C5, 1, 0),
493
494 /* capture widgets */
495 SND_SOC_DAPM_PGA("LineIn Enable Left", SN95031_MICAMP1,
496 7, 0, NULL, 0),
497 SND_SOC_DAPM_PGA("LineIn Enable Right", SN95031_MICAMP2,
498 7, 0, NULL, 0),
499
500 SND_SOC_DAPM_PGA("MIC1 Enable", SN95031_MICAMP1, 0, 0, NULL, 0),
501 SND_SOC_DAPM_PGA("MIC2 Enable", SN95031_MICAMP2, 0, 0, NULL, 0),
502 SND_SOC_DAPM_PGA("TX1 Enable", SN95031_AUDIOTXEN, 2, 0, NULL, 0),
503 SND_SOC_DAPM_PGA("TX2 Enable", SN95031_AUDIOTXEN, 3, 0, NULL, 0),
504 SND_SOC_DAPM_PGA("TX3 Enable", SN95031_AUDIOTXEN, 4, 0, NULL, 0),
505 SND_SOC_DAPM_PGA("TX4 Enable", SN95031_AUDIOTXEN, 5, 0, NULL, 0),
506
507 /* ADC have null stream as they will be turned ON by TX path */
508 SND_SOC_DAPM_ADC("ADC Left", NULL,
509 SN95031_ADCCONFIG, 0, 0),
510 SND_SOC_DAPM_ADC("ADC Right", NULL,
511 SN95031_ADCCONFIG, 2, 0),
512
513 SND_SOC_DAPM_MUX("Mic_InputL Capture Route",
514 SND_SOC_NOPM, 0, 0, &sn95031_micl_mux_control),
515 SND_SOC_DAPM_MUX("Mic_InputR Capture Route",
516 SND_SOC_NOPM, 0, 0, &sn95031_micr_mux_control),
517
518 SND_SOC_DAPM_MUX("Txpath1 Capture Route",
519 SND_SOC_NOPM, 0, 0, &sn95031_input1_mux_control),
520 SND_SOC_DAPM_MUX("Txpath2 Capture Route",
521 SND_SOC_NOPM, 0, 0, &sn95031_input2_mux_control),
522 SND_SOC_DAPM_MUX("Txpath3 Capture Route",
523 SND_SOC_NOPM, 0, 0, &sn95031_input3_mux_control),
524 SND_SOC_DAPM_MUX("Txpath4 Capture Route",
525 SND_SOC_NOPM, 0, 0, &sn95031_input4_mux_control),
526
527 };
528
529 static const struct snd_soc_dapm_route sn95031_audio_map[] = {
530 /* headset and earpiece map */
531 { "HPOUTL", NULL, "Headset Rail"},
532 { "HPOUTR", NULL, "Headset Rail"},
533 { "HPOUTL", NULL, "Headset Left Playback" },
534 { "HPOUTR", NULL, "Headset Right Playback" },
535 { "EPOUT", NULL, "Earpiece Playback" },
536 { "Headset Left Playback", NULL, "Headset Left Filter"},
537 { "Headset Right Playback", NULL, "Headset Right Filter"},
538 { "Earpiece Playback", NULL, "Headset Left Filter"},
539 { "Headset Left Filter", NULL, "HSDAC Left"},
540 { "Headset Right Filter", NULL, "HSDAC Right"},
541
542 /* speaker map */
543 { "IHFOUTL", NULL, "Speaker Rail"},
544 { "IHFOUTR", NULL, "Speaker Rail"},
545 { "IHFOUTL", NULL, "Speaker Left Playback"},
546 { "IHFOUTR", NULL, "Speaker Right Playback"},
547 { "Speaker Left Playback", NULL, "Speaker Left Filter"},
548 { "Speaker Right Playback", NULL, "Speaker Right Filter"},
549 { "Speaker Left Filter", NULL, "IHFDAC Left"},
550 { "Speaker Right Filter", NULL, "IHFDAC Right"},
551
552 /* vibra map */
553 { "VIB1OUT", NULL, "Vibra1 Playback"},
554 { "Vibra1 Playback", NULL, "Vibra1 DAC"},
555
556 { "VIB2OUT", NULL, "Vibra2 Playback"},
557 { "Vibra2 Playback", NULL, "Vibra2 DAC"},
558
559 /* lineout */
560 { "LINEOUTL", NULL, "Lineout Left Playback"},
561 { "LINEOUTR", NULL, "Lineout Right Playback"},
562 { "Lineout Left Playback", NULL, "Headset Left Filter"},
563 { "Lineout Left Playback", NULL, "Speaker Left Filter"},
564 { "Lineout Left Playback", NULL, "Vibra1 DAC"},
565 { "Lineout Right Playback", NULL, "Headset Right Filter"},
566 { "Lineout Right Playback", NULL, "Speaker Right Filter"},
567 { "Lineout Right Playback", NULL, "Vibra2 DAC"},
568
569 /* Headset (AMIC1) mic */
570 { "AMIC1Bias", NULL, "AMIC1"},
571 { "MIC1 Enable", NULL, "AMIC1Bias"},
572 { "Mic_InputL Capture Route", "AMIC", "MIC1 Enable"},
573
574 /* AMIC2 */
575 { "AMIC2Bias", NULL, "AMIC2"},
576 { "MIC2 Enable", NULL, "AMIC2Bias"},
577 { "Mic_InputR Capture Route", "AMIC", "MIC2 Enable"},
578
579
580 /* Linein */
581 { "LineIn Enable Left", NULL, "LINEINL"},
582 { "LineIn Enable Right", NULL, "LINEINR"},
583 { "Mic_InputL Capture Route", "LineIn", "LineIn Enable Left"},
584 { "Mic_InputR Capture Route", "LineIn", "LineIn Enable Right"},
585
586 /* ADC connection */
587 { "ADC Left", NULL, "Mic_InputL Capture Route"},
588 { "ADC Right", NULL, "Mic_InputR Capture Route"},
589
590 /*DMIC connections */
591 { "DMIC1", NULL, "DMIC12supply"},
592 { "DMIC2", NULL, "DMIC12supply"},
593 { "DMIC3", NULL, "DMIC34supply"},
594 { "DMIC4", NULL, "DMIC34supply"},
595 { "DMIC5", NULL, "DMIC56supply"},
596 { "DMIC6", NULL, "DMIC56supply"},
597
598 { "DMIC12Bias", NULL, "DMIC1"},
599 { "DMIC12Bias", NULL, "DMIC2"},
600 { "DMIC34Bias", NULL, "DMIC3"},
601 { "DMIC34Bias", NULL, "DMIC4"},
602 { "DMIC56Bias", NULL, "DMIC5"},
603 { "DMIC56Bias", NULL, "DMIC6"},
604
605 /*TX path inputs*/
606 { "Txpath1 Capture Route", "ADC Left", "ADC Left"},
607 { "Txpath2 Capture Route", "ADC Left", "ADC Left"},
608 { "Txpath3 Capture Route", "ADC Left", "ADC Left"},
609 { "Txpath4 Capture Route", "ADC Left", "ADC Left"},
610 { "Txpath1 Capture Route", "ADC Right", "ADC Right"},
611 { "Txpath2 Capture Route", "ADC Right", "ADC Right"},
612 { "Txpath3 Capture Route", "ADC Right", "ADC Right"},
613 { "Txpath4 Capture Route", "ADC Right", "ADC Right"},
614 { "Txpath1 Capture Route", "DMIC1", "DMIC1"},
615 { "Txpath2 Capture Route", "DMIC1", "DMIC1"},
616 { "Txpath3 Capture Route", "DMIC1", "DMIC1"},
617 { "Txpath4 Capture Route", "DMIC1", "DMIC1"},
618 { "Txpath1 Capture Route", "DMIC2", "DMIC2"},
619 { "Txpath2 Capture Route", "DMIC2", "DMIC2"},
620 { "Txpath3 Capture Route", "DMIC2", "DMIC2"},
621 { "Txpath4 Capture Route", "DMIC2", "DMIC2"},
622 { "Txpath1 Capture Route", "DMIC3", "DMIC3"},
623 { "Txpath2 Capture Route", "DMIC3", "DMIC3"},
624 { "Txpath3 Capture Route", "DMIC3", "DMIC3"},
625 { "Txpath4 Capture Route", "DMIC3", "DMIC3"},
626 { "Txpath1 Capture Route", "DMIC4", "DMIC4"},
627 { "Txpath2 Capture Route", "DMIC4", "DMIC4"},
628 { "Txpath3 Capture Route", "DMIC4", "DMIC4"},
629 { "Txpath4 Capture Route", "DMIC4", "DMIC4"},
630 { "Txpath1 Capture Route", "DMIC5", "DMIC5"},
631 { "Txpath2 Capture Route", "DMIC5", "DMIC5"},
632 { "Txpath3 Capture Route", "DMIC5", "DMIC5"},
633 { "Txpath4 Capture Route", "DMIC5", "DMIC5"},
634 { "Txpath1 Capture Route", "DMIC6", "DMIC6"},
635 { "Txpath2 Capture Route", "DMIC6", "DMIC6"},
636 { "Txpath3 Capture Route", "DMIC6", "DMIC6"},
637 { "Txpath4 Capture Route", "DMIC6", "DMIC6"},
638
639 /* tx path */
640 { "TX1 Enable", NULL, "Txpath1 Capture Route"},
641 { "TX2 Enable", NULL, "Txpath2 Capture Route"},
642 { "TX3 Enable", NULL, "Txpath3 Capture Route"},
643 { "TX4 Enable", NULL, "Txpath4 Capture Route"},
644 { "PCM_Out", NULL, "TX1 Enable"},
645 { "PCM_Out", NULL, "TX2 Enable"},
646 { "PCM_Out", NULL, "TX3 Enable"},
647 { "PCM_Out", NULL, "TX4 Enable"},
648
649 };
650
651 /* speaker and headset mutes, for audio pops and clicks */
652 static int sn95031_pcm_hs_mute(struct snd_soc_dai *dai, int mute)
653 {
654 snd_soc_update_bits(dai->codec,
655 SN95031_HSLVOLCTRL, BIT(7), (!mute << 7));
656 snd_soc_update_bits(dai->codec,
657 SN95031_HSRVOLCTRL, BIT(7), (!mute << 7));
658 return 0;
659 }
660
661 static int sn95031_pcm_spkr_mute(struct snd_soc_dai *dai, int mute)
662 {
663 snd_soc_update_bits(dai->codec,
664 SN95031_IHFLVOLCTRL, BIT(7), (!mute << 7));
665 snd_soc_update_bits(dai->codec,
666 SN95031_IHFRVOLCTRL, BIT(7), (!mute << 7));
667 return 0;
668 }
669
670 static int sn95031_pcm_hw_params(struct snd_pcm_substream *substream,
671 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
672 {
673 unsigned int format, rate;
674
675 switch (params_width(params)) {
676 case 16:
677 format = BIT(4)|BIT(5);
678 break;
679
680 case 24:
681 format = 0;
682 break;
683 default:
684 return -EINVAL;
685 }
686 snd_soc_update_bits(dai->codec, SN95031_PCM2C2,
687 BIT(4)|BIT(5), format);
688
689 switch (params_rate(params)) {
690 case 48000:
691 pr_debug("RATE_48000\n");
692 rate = 0;
693 break;
694
695 case 44100:
696 pr_debug("RATE_44100\n");
697 rate = BIT(7);
698 break;
699
700 default:
701 pr_err("ERR rate %d\n", params_rate(params));
702 return -EINVAL;
703 }
704 snd_soc_update_bits(dai->codec, SN95031_PCM1C1, BIT(7), rate);
705
706 return 0;
707 }
708
709 /* Codec DAI section */
710 static const struct snd_soc_dai_ops sn95031_headset_dai_ops = {
711 .digital_mute = sn95031_pcm_hs_mute,
712 .hw_params = sn95031_pcm_hw_params,
713 };
714
715 static const struct snd_soc_dai_ops sn95031_speaker_dai_ops = {
716 .digital_mute = sn95031_pcm_spkr_mute,
717 .hw_params = sn95031_pcm_hw_params,
718 };
719
720 static const struct snd_soc_dai_ops sn95031_vib1_dai_ops = {
721 .hw_params = sn95031_pcm_hw_params,
722 };
723
724 static const struct snd_soc_dai_ops sn95031_vib2_dai_ops = {
725 .hw_params = sn95031_pcm_hw_params,
726 };
727
728 static struct snd_soc_dai_driver sn95031_dais[] = {
729 {
730 .name = "SN95031 Headset",
731 .playback = {
732 .stream_name = "Headset",
733 .channels_min = 2,
734 .channels_max = 2,
735 .rates = SN95031_RATES,
736 .formats = SN95031_FORMATS,
737 },
738 .capture = {
739 .stream_name = "Capture",
740 .channels_min = 1,
741 .channels_max = 5,
742 .rates = SN95031_RATES,
743 .formats = SN95031_FORMATS,
744 },
745 .ops = &sn95031_headset_dai_ops,
746 },
747 { .name = "SN95031 Speaker",
748 .playback = {
749 .stream_name = "Speaker",
750 .channels_min = 2,
751 .channels_max = 2,
752 .rates = SN95031_RATES,
753 .formats = SN95031_FORMATS,
754 },
755 .ops = &sn95031_speaker_dai_ops,
756 },
757 { .name = "SN95031 Vibra1",
758 .playback = {
759 .stream_name = "Vibra1",
760 .channels_min = 1,
761 .channels_max = 1,
762 .rates = SN95031_RATES,
763 .formats = SN95031_FORMATS,
764 },
765 .ops = &sn95031_vib1_dai_ops,
766 },
767 { .name = "SN95031 Vibra2",
768 .playback = {
769 .stream_name = "Vibra2",
770 .channels_min = 1,
771 .channels_max = 1,
772 .rates = SN95031_RATES,
773 .formats = SN95031_FORMATS,
774 },
775 .ops = &sn95031_vib2_dai_ops,
776 },
777 };
778
779 static inline void sn95031_disable_jack_btn(struct snd_soc_codec *codec)
780 {
781 snd_soc_write(codec, SN95031_BTNCTRL2, 0x00);
782 }
783
784 static inline void sn95031_enable_jack_btn(struct snd_soc_codec *codec)
785 {
786 snd_soc_write(codec, SN95031_BTNCTRL1, 0x77);
787 snd_soc_write(codec, SN95031_BTNCTRL2, 0x01);
788 }
789
790 static int sn95031_get_headset_state(struct snd_soc_codec *codec,
791 struct snd_soc_jack *mfld_jack)
792 {
793 int micbias = sn95031_get_mic_bias(codec);
794
795 int jack_type = snd_soc_jack_get_type(mfld_jack, micbias);
796
797 pr_debug("jack type detected = %d\n", jack_type);
798 if (jack_type == SND_JACK_HEADSET)
799 sn95031_enable_jack_btn(codec);
800 return jack_type;
801 }
802
803 void sn95031_jack_detection(struct snd_soc_codec *codec,
804 struct mfld_jack_data *jack_data)
805 {
806 unsigned int status;
807 unsigned int mask = SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_HEADSET;
808
809 pr_debug("interrupt id read in sram = 0x%x\n", jack_data->intr_id);
810 if (jack_data->intr_id & 0x1) {
811 pr_debug("short_push detected\n");
812 status = SND_JACK_HEADSET | SND_JACK_BTN_0;
813 } else if (jack_data->intr_id & 0x2) {
814 pr_debug("long_push detected\n");
815 status = SND_JACK_HEADSET | SND_JACK_BTN_1;
816 } else if (jack_data->intr_id & 0x4) {
817 pr_debug("headset or headphones inserted\n");
818 status = sn95031_get_headset_state(codec, jack_data->mfld_jack);
819 } else if (jack_data->intr_id & 0x8) {
820 pr_debug("headset or headphones removed\n");
821 status = 0;
822 sn95031_disable_jack_btn(codec);
823 } else {
824 pr_err("unidentified interrupt\n");
825 return;
826 }
827
828 snd_soc_jack_report(jack_data->mfld_jack, status, mask);
829 /*button pressed and released so we send explicit button release */
830 if ((status & SND_JACK_BTN_0) | (status & SND_JACK_BTN_1))
831 snd_soc_jack_report(jack_data->mfld_jack,
832 SND_JACK_HEADSET, mask);
833 }
834 EXPORT_SYMBOL_GPL(sn95031_jack_detection);
835
836 /* codec registration */
837 static int sn95031_codec_probe(struct snd_soc_codec *codec)
838 {
839 pr_debug("codec_probe called\n");
840
841 /* PCM interface config
842 * This sets the pcm rx slot conguration to max 6 slots
843 * for max 4 dais (2 stereo and 2 mono)
844 */
845 snd_soc_write(codec, SN95031_PCM2RXSLOT01, 0x10);
846 snd_soc_write(codec, SN95031_PCM2RXSLOT23, 0x32);
847 snd_soc_write(codec, SN95031_PCM2RXSLOT45, 0x54);
848 snd_soc_write(codec, SN95031_PCM2TXSLOT01, 0x10);
849 snd_soc_write(codec, SN95031_PCM2TXSLOT23, 0x32);
850 /* pcm port setting
851 * This sets the pcm port to slave and clock at 19.2Mhz which
852 * can support 6slots, sampling rate set per stream in hw-params
853 */
854 snd_soc_write(codec, SN95031_PCM1C1, 0x00);
855 snd_soc_write(codec, SN95031_PCM2C1, 0x01);
856 snd_soc_write(codec, SN95031_PCM2C2, 0x0A);
857 snd_soc_write(codec, SN95031_HSMIXER, BIT(0)|BIT(4));
858 /* vendor vibra workround, the vibras are muted by
859 * custom register so unmute them
860 */
861 snd_soc_write(codec, SN95031_SSR5, 0x80);
862 snd_soc_write(codec, SN95031_SSR6, 0x80);
863 snd_soc_write(codec, SN95031_VIB1C5, 0x00);
864 snd_soc_write(codec, SN95031_VIB2C5, 0x00);
865 /* configure vibras for pcm port */
866 snd_soc_write(codec, SN95031_VIB1C3, 0x00);
867 snd_soc_write(codec, SN95031_VIB2C3, 0x00);
868
869 /* soft mute ramp time */
870 snd_soc_write(codec, SN95031_SOFTMUTE, 0x3);
871 /* fix the initial volume at 1dB,
872 * default in +9dB,
873 * 1dB give optimal swing on DAC, amps
874 */
875 snd_soc_write(codec, SN95031_HSLVOLCTRL, 0x08);
876 snd_soc_write(codec, SN95031_HSRVOLCTRL, 0x08);
877 snd_soc_write(codec, SN95031_IHFLVOLCTRL, 0x08);
878 snd_soc_write(codec, SN95031_IHFRVOLCTRL, 0x08);
879 /* dac mode and lineout workaround */
880 snd_soc_write(codec, SN95031_SSR2, 0x10);
881 snd_soc_write(codec, SN95031_SSR3, 0x40);
882
883 return 0;
884 }
885
886 static struct snd_soc_codec_driver sn95031_codec = {
887 .probe = sn95031_codec_probe,
888 .set_bias_level = sn95031_set_vaud_bias,
889 .idle_bias_off = true,
890
891 .component_driver = {
892 .controls = sn95031_snd_controls,
893 .num_controls = ARRAY_SIZE(sn95031_snd_controls),
894 .dapm_widgets = sn95031_dapm_widgets,
895 .num_dapm_widgets = ARRAY_SIZE(sn95031_dapm_widgets),
896 .dapm_routes = sn95031_audio_map,
897 .num_dapm_routes = ARRAY_SIZE(sn95031_audio_map),
898 },
899 };
900
901 static int sn95031_device_probe(struct platform_device *pdev)
902 {
903 struct regmap *regmap;
904
905 pr_debug("codec device probe called for %s\n", dev_name(&pdev->dev));
906
907 regmap = devm_regmap_init(&pdev->dev, NULL, NULL, &sn95031_regmap);
908 if (IS_ERR(regmap))
909 return PTR_ERR(regmap);
910
911 return snd_soc_register_codec(&pdev->dev, &sn95031_codec,
912 sn95031_dais, ARRAY_SIZE(sn95031_dais));
913 }
914
915 static int sn95031_device_remove(struct platform_device *pdev)
916 {
917 pr_debug("codec device remove called\n");
918 snd_soc_unregister_codec(&pdev->dev);
919 return 0;
920 }
921
922 static struct platform_driver sn95031_codec_driver = {
923 .driver = {
924 .name = "sn95031",
925 },
926 .probe = sn95031_device_probe,
927 .remove = sn95031_device_remove,
928 };
929
930 module_platform_driver(sn95031_codec_driver);
931
932 MODULE_DESCRIPTION("ASoC TI SN95031 codec driver");
933 MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
934 MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
935 MODULE_LICENSE("GPL v2");
936 MODULE_ALIAS("platform:sn95031");
Linux with added FPC-III support