sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / sound / soc / intel / skylake / skl-messages.c
blobe79cbcf6e4629e970f00db484df9433ab9500657
1 /*
2 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
3 * configurations
5 * Copyright (C) 2015 Intel Corp
6 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
7 * Jeeja KP <jeeja.kp@intel.com>
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as version 2, as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include "skl-sst-dsp.h"
25 #include "skl-sst-ipc.h"
26 #include "skl.h"
27 #include "../common/sst-dsp.h"
28 #include "../common/sst-dsp-priv.h"
29 #include "skl-topology.h"
30 #include "skl-tplg-interface.h"
32 static int skl_alloc_dma_buf(struct device *dev,
33 struct snd_dma_buffer *dmab, size_t size)
35 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
36 struct hdac_bus *bus = ebus_to_hbus(ebus);
38 if (!bus)
39 return -ENODEV;
41 return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
44 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
46 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
47 struct hdac_bus *bus = ebus_to_hbus(ebus);
49 if (!bus)
50 return -ENODEV;
52 bus->io_ops->dma_free_pages(bus, dmab);
54 return 0;
57 #define NOTIFICATION_PARAM_ID 3
58 #define NOTIFICATION_MASK 0xf
60 /* disable notfication for underruns/overruns from firmware module */
61 static void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable)
63 struct notification_mask mask;
64 struct skl_ipc_large_config_msg msg = {0};
66 mask.notify = NOTIFICATION_MASK;
67 mask.enable = enable;
69 msg.large_param_id = NOTIFICATION_PARAM_ID;
70 msg.param_data_size = sizeof(mask);
72 skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask);
75 static int skl_dsp_setup_spib(struct device *dev, unsigned int size,
76 int stream_tag, int enable)
78 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
79 struct hdac_bus *bus = ebus_to_hbus(ebus);
80 struct hdac_stream *stream = snd_hdac_get_stream(bus,
81 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
82 struct hdac_ext_stream *estream;
84 if (!stream)
85 return -EINVAL;
87 estream = stream_to_hdac_ext_stream(stream);
88 /* enable/disable SPIB for this hdac stream */
89 snd_hdac_ext_stream_spbcap_enable(ebus, enable, stream->index);
91 /* set the spib value */
92 snd_hdac_ext_stream_set_spib(ebus, estream, size);
94 return 0;
97 static int skl_dsp_prepare(struct device *dev, unsigned int format,
98 unsigned int size, struct snd_dma_buffer *dmab)
100 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
101 struct hdac_bus *bus = ebus_to_hbus(ebus);
102 struct hdac_ext_stream *estream;
103 struct hdac_stream *stream;
104 struct snd_pcm_substream substream;
105 int ret;
107 if (!bus)
108 return -ENODEV;
110 memset(&substream, 0, sizeof(substream));
111 substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
113 estream = snd_hdac_ext_stream_assign(ebus, &substream,
114 HDAC_EXT_STREAM_TYPE_HOST);
115 if (!estream)
116 return -ENODEV;
118 stream = hdac_stream(estream);
120 /* assign decouple host dma channel */
121 ret = snd_hdac_dsp_prepare(stream, format, size, dmab);
122 if (ret < 0)
123 return ret;
125 skl_dsp_setup_spib(dev, size, stream->stream_tag, true);
127 return stream->stream_tag;
130 static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag)
132 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
133 struct hdac_stream *stream;
134 struct hdac_bus *bus = ebus_to_hbus(ebus);
136 if (!bus)
137 return -ENODEV;
139 stream = snd_hdac_get_stream(bus,
140 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
141 if (!stream)
142 return -EINVAL;
144 snd_hdac_dsp_trigger(stream, start);
146 return 0;
149 static int skl_dsp_cleanup(struct device *dev,
150 struct snd_dma_buffer *dmab, int stream_tag)
152 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
153 struct hdac_stream *stream;
154 struct hdac_ext_stream *estream;
155 struct hdac_bus *bus = ebus_to_hbus(ebus);
157 if (!bus)
158 return -ENODEV;
160 stream = snd_hdac_get_stream(bus,
161 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
162 if (!stream)
163 return -EINVAL;
165 estream = stream_to_hdac_ext_stream(stream);
166 skl_dsp_setup_spib(dev, 0, stream_tag, false);
167 snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
169 snd_hdac_dsp_cleanup(stream, dmab);
171 return 0;
174 static struct skl_dsp_loader_ops skl_get_loader_ops(void)
176 struct skl_dsp_loader_ops loader_ops;
178 memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops));
180 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
181 loader_ops.free_dma_buf = skl_free_dma_buf;
183 return loader_ops;
186 static struct skl_dsp_loader_ops bxt_get_loader_ops(void)
188 struct skl_dsp_loader_ops loader_ops;
190 memset(&loader_ops, 0, sizeof(loader_ops));
192 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
193 loader_ops.free_dma_buf = skl_free_dma_buf;
194 loader_ops.prepare = skl_dsp_prepare;
195 loader_ops.trigger = skl_dsp_trigger;
196 loader_ops.cleanup = skl_dsp_cleanup;
198 return loader_ops;
201 static const struct skl_dsp_ops dsp_ops[] = {
203 .id = 0x9d70,
204 .loader_ops = skl_get_loader_ops,
205 .init = skl_sst_dsp_init,
206 .init_fw = skl_sst_init_fw,
207 .cleanup = skl_sst_dsp_cleanup
210 .id = 0x9d71,
211 .loader_ops = skl_get_loader_ops,
212 .init = skl_sst_dsp_init,
213 .init_fw = skl_sst_init_fw,
214 .cleanup = skl_sst_dsp_cleanup
217 .id = 0x5a98,
218 .loader_ops = bxt_get_loader_ops,
219 .init = bxt_sst_dsp_init,
220 .init_fw = bxt_sst_init_fw,
221 .cleanup = bxt_sst_dsp_cleanup
225 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id)
227 int i;
229 for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) {
230 if (dsp_ops[i].id == pci_id)
231 return &dsp_ops[i];
234 return NULL;
237 int skl_init_dsp(struct skl *skl)
239 void __iomem *mmio_base;
240 struct hdac_ext_bus *ebus = &skl->ebus;
241 struct hdac_bus *bus = ebus_to_hbus(ebus);
242 struct skl_dsp_loader_ops loader_ops;
243 int irq = bus->irq;
244 const struct skl_dsp_ops *ops;
245 int ret;
247 /* enable ppcap interrupt */
248 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
249 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
251 /* read the BAR of the ADSP MMIO */
252 mmio_base = pci_ioremap_bar(skl->pci, 4);
253 if (mmio_base == NULL) {
254 dev_err(bus->dev, "ioremap error\n");
255 return -ENXIO;
258 ops = skl_get_dsp_ops(skl->pci->device);
259 if (!ops)
260 return -EIO;
262 loader_ops = ops->loader_ops();
263 ret = ops->init(bus->dev, mmio_base, irq,
264 skl->fw_name, loader_ops,
265 &skl->skl_sst);
267 if (ret < 0)
268 return ret;
270 dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
272 return ret;
275 int skl_free_dsp(struct skl *skl)
277 struct hdac_ext_bus *ebus = &skl->ebus;
278 struct hdac_bus *bus = ebus_to_hbus(ebus);
279 struct skl_sst *ctx = skl->skl_sst;
280 const struct skl_dsp_ops *ops;
282 /* disable ppcap interrupt */
283 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
285 ops = skl_get_dsp_ops(skl->pci->device);
286 if (!ops)
287 return -EIO;
289 ops->cleanup(bus->dev, ctx);
291 if (ctx->dsp->addr.lpe)
292 iounmap(ctx->dsp->addr.lpe);
294 return 0;
298 * In the case of "suspend_active" i.e, the Audio IP being active
299 * during system suspend, immediately excecute any pending D0i3 work
300 * before suspending. This is needed for the IP to work in low power
301 * mode during system suspend. In the case of normal suspend, cancel
302 * any pending D0i3 work.
304 int skl_suspend_late_dsp(struct skl *skl)
306 struct skl_sst *ctx = skl->skl_sst;
307 struct delayed_work *dwork;
309 if (!ctx)
310 return 0;
312 dwork = &ctx->d0i3.work;
314 if (dwork->work.func) {
315 if (skl->supend_active)
316 flush_delayed_work(dwork);
317 else
318 cancel_delayed_work_sync(dwork);
321 return 0;
324 int skl_suspend_dsp(struct skl *skl)
326 struct skl_sst *ctx = skl->skl_sst;
327 int ret;
329 /* if ppcap is not supported return 0 */
330 if (!skl->ebus.bus.ppcap)
331 return 0;
333 ret = skl_dsp_sleep(ctx->dsp);
334 if (ret < 0)
335 return ret;
337 /* disable ppcap interrupt */
338 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
339 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false);
341 return 0;
344 int skl_resume_dsp(struct skl *skl)
346 struct skl_sst *ctx = skl->skl_sst;
347 int ret;
349 /* if ppcap is not supported return 0 */
350 if (!skl->ebus.bus.ppcap)
351 return 0;
353 /* enable ppcap interrupt */
354 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
355 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
357 /* check if DSP 1st boot is done */
358 if (skl->skl_sst->is_first_boot == true)
359 return 0;
361 ret = skl_dsp_wake(ctx->dsp);
362 if (ret < 0)
363 return ret;
365 skl_dsp_enable_notification(skl->skl_sst, false);
366 return ret;
369 enum skl_bitdepth skl_get_bit_depth(int params)
371 switch (params) {
372 case 8:
373 return SKL_DEPTH_8BIT;
375 case 16:
376 return SKL_DEPTH_16BIT;
378 case 24:
379 return SKL_DEPTH_24BIT;
381 case 32:
382 return SKL_DEPTH_32BIT;
384 default:
385 return SKL_DEPTH_INVALID;
391 * Each module in DSP expects a base module configuration, which consists of
392 * PCM format information, which we calculate in driver and resource values
393 * which are read from widget information passed through topology binary
394 * This is send when we create a module with INIT_INSTANCE IPC msg
396 static void skl_set_base_module_format(struct skl_sst *ctx,
397 struct skl_module_cfg *mconfig,
398 struct skl_base_cfg *base_cfg)
400 struct skl_module_fmt *format = &mconfig->in_fmt[0];
402 base_cfg->audio_fmt.number_of_channels = (u8)format->channels;
404 base_cfg->audio_fmt.s_freq = format->s_freq;
405 base_cfg->audio_fmt.bit_depth = format->bit_depth;
406 base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
407 base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
409 dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
410 format->bit_depth, format->valid_bit_depth,
411 format->ch_cfg);
413 base_cfg->audio_fmt.channel_map = format->ch_map;
415 base_cfg->audio_fmt.interleaving = format->interleaving_style;
417 base_cfg->cps = mconfig->mcps;
418 base_cfg->ibs = mconfig->ibs;
419 base_cfg->obs = mconfig->obs;
420 base_cfg->is_pages = mconfig->mem_pages;
424 * Copies copier capabilities into copier module and updates copier module
425 * config size.
427 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
428 struct skl_cpr_cfg *cpr_mconfig)
430 if (mconfig->formats_config.caps_size == 0)
431 return;
433 memcpy(cpr_mconfig->gtw_cfg.config_data,
434 mconfig->formats_config.caps,
435 mconfig->formats_config.caps_size);
437 cpr_mconfig->gtw_cfg.config_length =
438 (mconfig->formats_config.caps_size) / 4;
441 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
443 * Calculate the gatewat settings required for copier module, type of
444 * gateway and index of gateway to use
446 static u32 skl_get_node_id(struct skl_sst *ctx,
447 struct skl_module_cfg *mconfig)
449 union skl_connector_node_id node_id = {0};
450 union skl_ssp_dma_node ssp_node = {0};
451 struct skl_pipe_params *params = mconfig->pipe->p_params;
453 switch (mconfig->dev_type) {
454 case SKL_DEVICE_BT:
455 node_id.node.dma_type =
456 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
457 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
458 SKL_DMA_I2S_LINK_INPUT_CLASS;
459 node_id.node.vindex = params->host_dma_id +
460 (mconfig->vbus_id << 3);
461 break;
463 case SKL_DEVICE_I2S:
464 node_id.node.dma_type =
465 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
466 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
467 SKL_DMA_I2S_LINK_INPUT_CLASS;
468 ssp_node.dma_node.time_slot_index = mconfig->time_slot;
469 ssp_node.dma_node.i2s_instance = mconfig->vbus_id;
470 node_id.node.vindex = ssp_node.val;
471 break;
473 case SKL_DEVICE_DMIC:
474 node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
475 node_id.node.vindex = mconfig->vbus_id +
476 (mconfig->time_slot);
477 break;
479 case SKL_DEVICE_HDALINK:
480 node_id.node.dma_type =
481 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
482 SKL_DMA_HDA_LINK_OUTPUT_CLASS :
483 SKL_DMA_HDA_LINK_INPUT_CLASS;
484 node_id.node.vindex = params->link_dma_id;
485 break;
487 case SKL_DEVICE_HDAHOST:
488 node_id.node.dma_type =
489 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
490 SKL_DMA_HDA_HOST_OUTPUT_CLASS :
491 SKL_DMA_HDA_HOST_INPUT_CLASS;
492 node_id.node.vindex = params->host_dma_id;
493 break;
495 default:
496 node_id.val = 0xFFFFFFFF;
497 break;
500 return node_id.val;
503 static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx,
504 struct skl_module_cfg *mconfig,
505 struct skl_cpr_cfg *cpr_mconfig)
507 cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(ctx, mconfig);
509 if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) {
510 cpr_mconfig->cpr_feature_mask = 0;
511 return;
514 if (SKL_CONN_SOURCE == mconfig->hw_conn_type)
515 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs;
516 else
517 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->ibs;
519 cpr_mconfig->cpr_feature_mask = 0;
520 cpr_mconfig->gtw_cfg.config_length = 0;
522 skl_copy_copier_caps(mconfig, cpr_mconfig);
525 #define DMA_CONTROL_ID 5
527 int skl_dsp_set_dma_control(struct skl_sst *ctx, struct skl_module_cfg *mconfig)
529 struct skl_dma_control *dma_ctrl;
530 struct skl_ipc_large_config_msg msg = {0};
531 int err = 0;
535 * if blob size zero, then return
537 if (mconfig->formats_config.caps_size == 0)
538 return 0;
540 msg.large_param_id = DMA_CONTROL_ID;
541 msg.param_data_size = sizeof(struct skl_dma_control) +
542 mconfig->formats_config.caps_size;
544 dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL);
545 if (dma_ctrl == NULL)
546 return -ENOMEM;
548 dma_ctrl->node_id = skl_get_node_id(ctx, mconfig);
550 /* size in dwords */
551 dma_ctrl->config_length = mconfig->formats_config.caps_size / 4;
553 memcpy(dma_ctrl->config_data, mconfig->formats_config.caps,
554 mconfig->formats_config.caps_size);
556 err = skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)dma_ctrl);
558 kfree(dma_ctrl);
559 return err;
562 static void skl_setup_out_format(struct skl_sst *ctx,
563 struct skl_module_cfg *mconfig,
564 struct skl_audio_data_format *out_fmt)
566 struct skl_module_fmt *format = &mconfig->out_fmt[0];
568 out_fmt->number_of_channels = (u8)format->channels;
569 out_fmt->s_freq = format->s_freq;
570 out_fmt->bit_depth = format->bit_depth;
571 out_fmt->valid_bit_depth = format->valid_bit_depth;
572 out_fmt->ch_cfg = format->ch_cfg;
574 out_fmt->channel_map = format->ch_map;
575 out_fmt->interleaving = format->interleaving_style;
576 out_fmt->sample_type = format->sample_type;
578 dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
579 out_fmt->number_of_channels, format->s_freq, format->bit_depth);
583 * DSP needs SRC module for frequency conversion, SRC takes base module
584 * configuration and the target frequency as extra parameter passed as src
585 * config
587 static void skl_set_src_format(struct skl_sst *ctx,
588 struct skl_module_cfg *mconfig,
589 struct skl_src_module_cfg *src_mconfig)
591 struct skl_module_fmt *fmt = &mconfig->out_fmt[0];
593 skl_set_base_module_format(ctx, mconfig,
594 (struct skl_base_cfg *)src_mconfig);
596 src_mconfig->src_cfg = fmt->s_freq;
600 * DSP needs updown module to do channel conversion. updown module take base
601 * module configuration and channel configuration
602 * It also take coefficients and now we have defaults applied here
604 static void skl_set_updown_mixer_format(struct skl_sst *ctx,
605 struct skl_module_cfg *mconfig,
606 struct skl_up_down_mixer_cfg *mixer_mconfig)
608 struct skl_module_fmt *fmt = &mconfig->out_fmt[0];
609 int i = 0;
611 skl_set_base_module_format(ctx, mconfig,
612 (struct skl_base_cfg *)mixer_mconfig);
613 mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
615 /* Select F/W default coefficient */
616 mixer_mconfig->coeff_sel = 0x0;
618 /* User coeff, don't care since we are selecting F/W defaults */
619 for (i = 0; i < UP_DOWN_MIXER_MAX_COEFF; i++)
620 mixer_mconfig->coeff[i] = 0xDEADBEEF;
624 * 'copier' is DSP internal module which copies data from Host DMA (HDA host
625 * dma) or link (hda link, SSP, PDM)
626 * Here we calculate the copier module parameters, like PCM format, output
627 * format, gateway settings
628 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
630 static void skl_set_copier_format(struct skl_sst *ctx,
631 struct skl_module_cfg *mconfig,
632 struct skl_cpr_cfg *cpr_mconfig)
634 struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
635 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
637 skl_set_base_module_format(ctx, mconfig, base_cfg);
639 skl_setup_out_format(ctx, mconfig, out_fmt);
640 skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig);
644 * Algo module are DSP pre processing modules. Algo module take base module
645 * configuration and params
648 static void skl_set_algo_format(struct skl_sst *ctx,
649 struct skl_module_cfg *mconfig,
650 struct skl_algo_cfg *algo_mcfg)
652 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)algo_mcfg;
654 skl_set_base_module_format(ctx, mconfig, base_cfg);
656 if (mconfig->formats_config.caps_size == 0)
657 return;
659 memcpy(algo_mcfg->params,
660 mconfig->formats_config.caps,
661 mconfig->formats_config.caps_size);
666 * Mic select module allows selecting one or many input channels, thus
667 * acting as a demux.
669 * Mic select module take base module configuration and out-format
670 * configuration
672 static void skl_set_base_outfmt_format(struct skl_sst *ctx,
673 struct skl_module_cfg *mconfig,
674 struct skl_base_outfmt_cfg *base_outfmt_mcfg)
676 struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt;
677 struct skl_base_cfg *base_cfg =
678 (struct skl_base_cfg *)base_outfmt_mcfg;
680 skl_set_base_module_format(ctx, mconfig, base_cfg);
681 skl_setup_out_format(ctx, mconfig, out_fmt);
684 static u16 skl_get_module_param_size(struct skl_sst *ctx,
685 struct skl_module_cfg *mconfig)
687 u16 param_size;
689 switch (mconfig->m_type) {
690 case SKL_MODULE_TYPE_COPIER:
691 param_size = sizeof(struct skl_cpr_cfg);
692 param_size += mconfig->formats_config.caps_size;
693 return param_size;
695 case SKL_MODULE_TYPE_SRCINT:
696 return sizeof(struct skl_src_module_cfg);
698 case SKL_MODULE_TYPE_UPDWMIX:
699 return sizeof(struct skl_up_down_mixer_cfg);
701 case SKL_MODULE_TYPE_ALGO:
702 param_size = sizeof(struct skl_base_cfg);
703 param_size += mconfig->formats_config.caps_size;
704 return param_size;
706 case SKL_MODULE_TYPE_BASE_OUTFMT:
707 case SKL_MODULE_TYPE_KPB:
708 return sizeof(struct skl_base_outfmt_cfg);
710 default:
712 * return only base cfg when no specific module type is
713 * specified
715 return sizeof(struct skl_base_cfg);
718 return 0;
722 * DSP firmware supports various modules like copier, SRC, updown etc.
723 * These modules required various parameters to be calculated and sent for
724 * the module initialization to DSP. By default a generic module needs only
725 * base module format configuration
728 static int skl_set_module_format(struct skl_sst *ctx,
729 struct skl_module_cfg *module_config,
730 u16 *module_config_size,
731 void **param_data)
733 u16 param_size;
735 param_size = skl_get_module_param_size(ctx, module_config);
737 *param_data = kzalloc(param_size, GFP_KERNEL);
738 if (NULL == *param_data)
739 return -ENOMEM;
741 *module_config_size = param_size;
743 switch (module_config->m_type) {
744 case SKL_MODULE_TYPE_COPIER:
745 skl_set_copier_format(ctx, module_config, *param_data);
746 break;
748 case SKL_MODULE_TYPE_SRCINT:
749 skl_set_src_format(ctx, module_config, *param_data);
750 break;
752 case SKL_MODULE_TYPE_UPDWMIX:
753 skl_set_updown_mixer_format(ctx, module_config, *param_data);
754 break;
756 case SKL_MODULE_TYPE_ALGO:
757 skl_set_algo_format(ctx, module_config, *param_data);
758 break;
760 case SKL_MODULE_TYPE_BASE_OUTFMT:
761 case SKL_MODULE_TYPE_KPB:
762 skl_set_base_outfmt_format(ctx, module_config, *param_data);
763 break;
765 default:
766 skl_set_base_module_format(ctx, module_config, *param_data);
767 break;
771 dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n",
772 module_config->id.module_id, param_size);
773 print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET, 8, 4,
774 *param_data, param_size, false);
775 return 0;
778 static int skl_get_queue_index(struct skl_module_pin *mpin,
779 struct skl_module_inst_id id, int max)
781 int i;
783 for (i = 0; i < max; i++) {
784 if (mpin[i].id.module_id == id.module_id &&
785 mpin[i].id.instance_id == id.instance_id)
786 return i;
789 return -EINVAL;
793 * Allocates queue for each module.
794 * if dynamic, the pin_index is allocated 0 to max_pin.
795 * In static, the pin_index is fixed based on module_id and instance id
797 static int skl_alloc_queue(struct skl_module_pin *mpin,
798 struct skl_module_cfg *tgt_cfg, int max)
800 int i;
801 struct skl_module_inst_id id = tgt_cfg->id;
803 * if pin in dynamic, find first free pin
804 * otherwise find match module and instance id pin as topology will
805 * ensure a unique pin is assigned to this so no need to
806 * allocate/free
808 for (i = 0; i < max; i++) {
809 if (mpin[i].is_dynamic) {
810 if (!mpin[i].in_use &&
811 mpin[i].pin_state == SKL_PIN_UNBIND) {
813 mpin[i].in_use = true;
814 mpin[i].id.module_id = id.module_id;
815 mpin[i].id.instance_id = id.instance_id;
816 mpin[i].id.pvt_id = id.pvt_id;
817 mpin[i].tgt_mcfg = tgt_cfg;
818 return i;
820 } else {
821 if (mpin[i].id.module_id == id.module_id &&
822 mpin[i].id.instance_id == id.instance_id &&
823 mpin[i].pin_state == SKL_PIN_UNBIND) {
825 mpin[i].tgt_mcfg = tgt_cfg;
826 return i;
831 return -EINVAL;
834 static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
836 if (mpin[q_index].is_dynamic) {
837 mpin[q_index].in_use = false;
838 mpin[q_index].id.module_id = 0;
839 mpin[q_index].id.instance_id = 0;
840 mpin[q_index].id.pvt_id = 0;
842 mpin[q_index].pin_state = SKL_PIN_UNBIND;
843 mpin[q_index].tgt_mcfg = NULL;
846 /* Module state will be set to unint, if all the out pin state is UNBIND */
848 static void skl_clear_module_state(struct skl_module_pin *mpin, int max,
849 struct skl_module_cfg *mcfg)
851 int i;
852 bool found = false;
854 for (i = 0; i < max; i++) {
855 if (mpin[i].pin_state == SKL_PIN_UNBIND)
856 continue;
857 found = true;
858 break;
861 if (!found)
862 mcfg->m_state = SKL_MODULE_UNINIT;
863 return;
867 * A module needs to be instanataited in DSP. A mdoule is present in a
868 * collection of module referred as a PIPE.
869 * We first calculate the module format, based on module type and then
870 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
872 int skl_init_module(struct skl_sst *ctx,
873 struct skl_module_cfg *mconfig)
875 u16 module_config_size = 0;
876 void *param_data = NULL;
877 int ret;
878 struct skl_ipc_init_instance_msg msg;
880 dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__,
881 mconfig->id.module_id, mconfig->id.pvt_id);
883 if (mconfig->pipe->state != SKL_PIPE_CREATED) {
884 dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n",
885 mconfig->pipe->state, mconfig->pipe->ppl_id);
886 return -EIO;
889 ret = skl_set_module_format(ctx, mconfig,
890 &module_config_size, &param_data);
891 if (ret < 0) {
892 dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret);
893 return ret;
896 msg.module_id = mconfig->id.module_id;
897 msg.instance_id = mconfig->id.pvt_id;
898 msg.ppl_instance_id = mconfig->pipe->ppl_id;
899 msg.param_data_size = module_config_size;
900 msg.core_id = mconfig->core_id;
901 msg.domain = mconfig->domain;
903 ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data);
904 if (ret < 0) {
905 dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret);
906 kfree(param_data);
907 return ret;
909 mconfig->m_state = SKL_MODULE_INIT_DONE;
910 kfree(param_data);
911 return ret;
914 static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg
915 *src_module, struct skl_module_cfg *dst_module)
917 dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n",
918 __func__, src_module->id.module_id, src_module->id.pvt_id);
919 dev_dbg(ctx->dev, "%s: dst_module=%d dst_instacne=%d\n", __func__,
920 dst_module->id.module_id, dst_module->id.pvt_id);
922 dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n",
923 src_module->m_state, dst_module->m_state);
927 * On module freeup, we need to unbind the module with modules
928 * it is already bind.
929 * Find the pin allocated and unbind then using bind_unbind IPC
931 int skl_unbind_modules(struct skl_sst *ctx,
932 struct skl_module_cfg *src_mcfg,
933 struct skl_module_cfg *dst_mcfg)
935 int ret;
936 struct skl_ipc_bind_unbind_msg msg;
937 struct skl_module_inst_id src_id = src_mcfg->id;
938 struct skl_module_inst_id dst_id = dst_mcfg->id;
939 int in_max = dst_mcfg->max_in_queue;
940 int out_max = src_mcfg->max_out_queue;
941 int src_index, dst_index, src_pin_state, dst_pin_state;
943 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
945 /* get src queue index */
946 src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
947 if (src_index < 0)
948 return 0;
950 msg.src_queue = src_index;
952 /* get dst queue index */
953 dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
954 if (dst_index < 0)
955 return 0;
957 msg.dst_queue = dst_index;
959 src_pin_state = src_mcfg->m_out_pin[src_index].pin_state;
960 dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state;
962 if (src_pin_state != SKL_PIN_BIND_DONE ||
963 dst_pin_state != SKL_PIN_BIND_DONE)
964 return 0;
966 msg.module_id = src_mcfg->id.module_id;
967 msg.instance_id = src_mcfg->id.pvt_id;
968 msg.dst_module_id = dst_mcfg->id.module_id;
969 msg.dst_instance_id = dst_mcfg->id.pvt_id;
970 msg.bind = false;
972 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
973 if (!ret) {
974 /* free queue only if unbind is success */
975 skl_free_queue(src_mcfg->m_out_pin, src_index);
976 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
979 * check only if src module bind state, bind is
980 * always from src -> sink
982 skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg);
985 return ret;
989 * Once a module is instantiated it need to be 'bind' with other modules in
990 * the pipeline. For binding we need to find the module pins which are bind
991 * together
992 * This function finds the pins and then sends bund_unbind IPC message to
993 * DSP using IPC helper
995 int skl_bind_modules(struct skl_sst *ctx,
996 struct skl_module_cfg *src_mcfg,
997 struct skl_module_cfg *dst_mcfg)
999 int ret;
1000 struct skl_ipc_bind_unbind_msg msg;
1001 int in_max = dst_mcfg->max_in_queue;
1002 int out_max = src_mcfg->max_out_queue;
1003 int src_index, dst_index;
1005 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1007 if (src_mcfg->m_state < SKL_MODULE_INIT_DONE ||
1008 dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
1009 return 0;
1011 src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max);
1012 if (src_index < 0)
1013 return -EINVAL;
1015 msg.src_queue = src_index;
1016 dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max);
1017 if (dst_index < 0) {
1018 skl_free_queue(src_mcfg->m_out_pin, src_index);
1019 return -EINVAL;
1022 msg.dst_queue = dst_index;
1024 dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n",
1025 msg.src_queue, msg.dst_queue);
1027 msg.module_id = src_mcfg->id.module_id;
1028 msg.instance_id = src_mcfg->id.pvt_id;
1029 msg.dst_module_id = dst_mcfg->id.module_id;
1030 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1031 msg.bind = true;
1033 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1035 if (!ret) {
1036 src_mcfg->m_state = SKL_MODULE_BIND_DONE;
1037 src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE;
1038 dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE;
1039 } else {
1040 /* error case , if IPC fails, clear the queue index */
1041 skl_free_queue(src_mcfg->m_out_pin, src_index);
1042 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1045 return ret;
1048 static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe,
1049 enum skl_ipc_pipeline_state state)
1051 dev_dbg(ctx->dev, "%s: pipe_satate = %d\n", __func__, state);
1053 return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state);
1057 * A pipeline is a collection of modules. Before a module in instantiated a
1058 * pipeline needs to be created for it.
1059 * This function creates pipeline, by sending create pipeline IPC messages
1060 * to FW
1062 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe)
1064 int ret;
1066 dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
1068 ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages,
1069 pipe->pipe_priority, pipe->ppl_id,
1070 pipe->lp_mode);
1071 if (ret < 0) {
1072 dev_err(ctx->dev, "Failed to create pipeline\n");
1073 return ret;
1076 pipe->state = SKL_PIPE_CREATED;
1078 return 0;
1082 * A pipeline needs to be deleted on cleanup. If a pipeline is running, then
1083 * pause the pipeline first and then delete it
1084 * The pipe delete is done by sending delete pipeline IPC. DSP will stop the
1085 * DMA engines and releases resources
1087 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1089 int ret;
1091 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1093 /* If pipe is started, do stop the pipe in FW. */
1094 if (pipe->state > SKL_PIPE_STARTED) {
1095 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1096 if (ret < 0) {
1097 dev_err(ctx->dev, "Failed to stop pipeline\n");
1098 return ret;
1101 pipe->state = SKL_PIPE_PAUSED;
1104 /* If pipe was not created in FW, do not try to delete it */
1105 if (pipe->state < SKL_PIPE_CREATED)
1106 return 0;
1108 ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id);
1109 if (ret < 0) {
1110 dev_err(ctx->dev, "Failed to delete pipeline\n");
1111 return ret;
1114 pipe->state = SKL_PIPE_INVALID;
1116 return ret;
1120 * A pipeline is also a scheduling entity in DSP which can be run, stopped
1121 * For processing data the pipe need to be run by sending IPC set pipe state
1122 * to DSP
1124 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1126 int ret;
1128 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1130 /* If pipe was not created in FW, do not try to pause or delete */
1131 if (pipe->state < SKL_PIPE_CREATED)
1132 return 0;
1134 /* Pipe has to be paused before it is started */
1135 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1136 if (ret < 0) {
1137 dev_err(ctx->dev, "Failed to pause pipe\n");
1138 return ret;
1141 pipe->state = SKL_PIPE_PAUSED;
1143 ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING);
1144 if (ret < 0) {
1145 dev_err(ctx->dev, "Failed to start pipe\n");
1146 return ret;
1149 pipe->state = SKL_PIPE_STARTED;
1151 return 0;
1155 * Stop the pipeline by sending set pipe state IPC
1156 * DSP doesnt implement stop so we always send pause message
1158 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1160 int ret;
1162 dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
1164 /* If pipe was not created in FW, do not try to pause or delete */
1165 if (pipe->state < SKL_PIPE_PAUSED)
1166 return 0;
1168 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1169 if (ret < 0) {
1170 dev_dbg(ctx->dev, "Failed to stop pipe\n");
1171 return ret;
1174 pipe->state = SKL_PIPE_PAUSED;
1176 return 0;
1180 * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1181 * from the DSP side
1183 int skl_reset_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1185 int ret;
1187 /* If pipe was not created in FW, do not try to pause or delete */
1188 if (pipe->state < SKL_PIPE_PAUSED)
1189 return 0;
1191 ret = skl_set_pipe_state(ctx, pipe, PPL_RESET);
1192 if (ret < 0) {
1193 dev_dbg(ctx->dev, "Failed to reset pipe ret=%d\n", ret);
1194 return ret;
1197 pipe->state = SKL_PIPE_RESET;
1199 return 0;
1202 /* Algo parameter set helper function */
1203 int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size,
1204 u32 param_id, struct skl_module_cfg *mcfg)
1206 struct skl_ipc_large_config_msg msg;
1208 msg.module_id = mcfg->id.module_id;
1209 msg.instance_id = mcfg->id.pvt_id;
1210 msg.param_data_size = size;
1211 msg.large_param_id = param_id;
1213 return skl_ipc_set_large_config(&ctx->ipc, &msg, params);
1216 int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size,
1217 u32 param_id, struct skl_module_cfg *mcfg)
1219 struct skl_ipc_large_config_msg msg;
1221 msg.module_id = mcfg->id.module_id;
1222 msg.instance_id = mcfg->id.pvt_id;
1223 msg.param_data_size = size;
1224 msg.large_param_id = param_id;
1226 return skl_ipc_get_large_config(&ctx->ipc, &msg, params);