sound/soc/qcom/lpass-apq8016.c

   1 /*
   2  * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 and
   6  * only version 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * lpass-apq8016.c -- ALSA SoC CPU DAI driver for APQ8016 LPASS
  14  *
  15  */
  16
  17
  18 #include <linux/clk.h>
  19 #include <linux/device.h>
  20 #include <linux/err.h>
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/of.h>
  24 #include <linux/platform_device.h>
  25 #include <sound/pcm.h>
  26 #include <sound/pcm_params.h>
  27 #include <sound/soc.h>
  28 #include <sound/soc-dai.h>
  29
  30 #include <dt-bindings/sound/apq8016-lpass.h>
  31 #include "lpass-lpaif-reg.h"
  32 #include "lpass.h"
  33
  34 static struct snd_soc_dai_driver apq8016_lpass_cpu_dai_driver[] = {
  35         [MI2S_PRIMARY] =  {
  36                 .id = MI2S_PRIMARY,
  37                 .name = "Primary MI2S",
  38                 .playback = {
  39                         .stream_name    = "Primary Playback",
  40                         .formats        = SNDRV_PCM_FMTBIT_S16 |
  41                                                 SNDRV_PCM_FMTBIT_S24 |
  42                                                 SNDRV_PCM_FMTBIT_S32,
  43                         .rates          = SNDRV_PCM_RATE_8000 |
  44                                                 SNDRV_PCM_RATE_16000 |
  45                                                 SNDRV_PCM_RATE_32000 |
  46                                                 SNDRV_PCM_RATE_48000 |
  47                                                 SNDRV_PCM_RATE_96000,
  48                         .rate_min       = 8000,
  49                         .rate_max       = 96000,
  50                         .channels_min   = 1,
  51                         .channels_max   = 8,
  52                 },
  53                 .probe  = &asoc_qcom_lpass_cpu_dai_probe,
  54                 .ops    = &asoc_qcom_lpass_cpu_dai_ops,
  55         },
  56         [MI2S_SECONDARY] =  {
  57                 .id = MI2S_SECONDARY,
  58                 .name = "Secondary MI2S",
  59                 .playback = {
  60                         .stream_name    = "Secondary Playback",
  61                         .formats        = SNDRV_PCM_FMTBIT_S16 |
  62                                                 SNDRV_PCM_FMTBIT_S24 |
  63                                                 SNDRV_PCM_FMTBIT_S32,
  64                         .rates          = SNDRV_PCM_RATE_8000 |
  65                                                 SNDRV_PCM_RATE_16000 |
  66                                                 SNDRV_PCM_RATE_32000 |
  67                                                 SNDRV_PCM_RATE_48000 |
  68                                                 SNDRV_PCM_RATE_96000,
  69                         .rate_min       = 8000,
  70                         .rate_max       = 96000,
  71                         .channels_min   = 1,
  72                         .channels_max   = 8,
  73                 },
  74                 .probe  = &asoc_qcom_lpass_cpu_dai_probe,
  75                 .ops    = &asoc_qcom_lpass_cpu_dai_ops,
  76         },
  77         [MI2S_TERTIARY] =  {
  78                 .id = MI2S_TERTIARY,
  79                 .name = "Tertiary MI2S",
  80                 .capture = {
  81                         .stream_name    = "Tertiary Capture",
  82                         .formats        = SNDRV_PCM_FMTBIT_S16 |
  83                                                 SNDRV_PCM_FMTBIT_S24 |
  84                                                 SNDRV_PCM_FMTBIT_S32,
  85                         .rates          = SNDRV_PCM_RATE_8000 |
  86                                                 SNDRV_PCM_RATE_16000 |
  87                                                 SNDRV_PCM_RATE_32000 |
  88                                                 SNDRV_PCM_RATE_48000 |
  89                                                 SNDRV_PCM_RATE_96000,
  90                         .rate_min       = 8000,
  91                         .rate_max       = 96000,
  92                         .channels_min   = 1,
  93                         .channels_max   = 8,
  94                 },
  95                 .probe  = &asoc_qcom_lpass_cpu_dai_probe,
  96                 .ops    = &asoc_qcom_lpass_cpu_dai_ops,
  97         },
  98         [MI2S_QUATERNARY] =  {
  99                 .id = MI2S_QUATERNARY,
 100                 .name = "Quatenary MI2S",
 101                 .playback = {
 102                         .stream_name    = "Quatenary Playback",
 103                         .formats        = SNDRV_PCM_FMTBIT_S16 |
 104                                                 SNDRV_PCM_FMTBIT_S24 |
 105                                                 SNDRV_PCM_FMTBIT_S32,
 106                         .rates          = SNDRV_PCM_RATE_8000 |
 107                                                 SNDRV_PCM_RATE_16000 |
 108                                                 SNDRV_PCM_RATE_32000 |
 109                                                 SNDRV_PCM_RATE_48000 |
 110                                                 SNDRV_PCM_RATE_96000,
 111                         .rate_min       = 8000,
 112                         .rate_max       = 96000,
 113                         .channels_min   = 1,
 114                         .channels_max   = 8,
 115                 },
 116                 .capture = {
 117                         .stream_name    = "Quatenary Capture",
 118                         .formats        = SNDRV_PCM_FMTBIT_S16 |
 119                                                 SNDRV_PCM_FMTBIT_S24 |
 120                                                 SNDRV_PCM_FMTBIT_S32,
 121                         .rates          = SNDRV_PCM_RATE_8000 |
 122                                                 SNDRV_PCM_RATE_16000 |
 123                                                 SNDRV_PCM_RATE_32000 |
 124                                                 SNDRV_PCM_RATE_48000 |
 125                                                 SNDRV_PCM_RATE_96000,
 126                         .rate_min       = 8000,
 127                         .rate_max       = 96000,
 128                         .channels_min   = 1,
 129                         .channels_max   = 8,
 130                 },
 131                 .probe  = &asoc_qcom_lpass_cpu_dai_probe,
 132                 .ops    = &asoc_qcom_lpass_cpu_dai_ops,
 133         },
 134 };
 135
 136 static int apq8016_lpass_alloc_dma_channel(struct lpass_data *drvdata,
 137                                            int direction)
 138 {
 139         struct lpass_variant *v = drvdata->variant;
 140         int chan = 0;
 141
 142         if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
 143                 chan = find_first_zero_bit(&drvdata->dma_ch_bit_map,
 144                                         v->rdma_channels);
 145
 146                 if (chan >= v->rdma_channels)
 147                         return -EBUSY;
 148         } else {
 149                 chan = find_next_zero_bit(&drvdata->dma_ch_bit_map,
 150                                         v->wrdma_channel_start +
 151                                         v->wrdma_channels,
 152                                         v->wrdma_channel_start);
 153
 154                 if (chan >=  v->wrdma_channel_start + v->wrdma_channels)
 155                         return -EBUSY;
 156         }
 157
 158         set_bit(chan, &drvdata->dma_ch_bit_map);
 159
 160         return chan;
 161 }
 162
 163 static int apq8016_lpass_free_dma_channel(struct lpass_data *drvdata, int chan)
 164 {
 165         clear_bit(chan, &drvdata->dma_ch_bit_map);
 166
 167         return 0;
 168 }
 169
 170 static int apq8016_lpass_init(struct platform_device *pdev)
 171 {
 172         struct lpass_data *drvdata = platform_get_drvdata(pdev);
 173         struct device *dev = &pdev->dev;
 174         int ret;
 175
 176         drvdata->pcnoc_mport_clk = devm_clk_get(dev, "pcnoc-mport-clk");
 177         if (IS_ERR(drvdata->pcnoc_mport_clk)) {
 178                 dev_err(&pdev->dev, "%s() error getting pcnoc-mport-clk: %ld\n",
 179                                 __func__, PTR_ERR(drvdata->pcnoc_mport_clk));
 180                 return PTR_ERR(drvdata->pcnoc_mport_clk);
 181         }
 182
 183         ret = clk_prepare_enable(drvdata->pcnoc_mport_clk);
 184         if (ret) {
 185                 dev_err(&pdev->dev, "%s() Error enabling pcnoc-mport-clk: %d\n",
 186                                 __func__, ret);
 187                 return ret;
 188         }
 189
 190         drvdata->pcnoc_sway_clk = devm_clk_get(dev, "pcnoc-sway-clk");
 191         if (IS_ERR(drvdata->pcnoc_sway_clk)) {
 192                 dev_err(&pdev->dev, "%s() error getting pcnoc-sway-clk: %ld\n",
 193                                 __func__, PTR_ERR(drvdata->pcnoc_sway_clk));
 194                 return PTR_ERR(drvdata->pcnoc_sway_clk);
 195         }
 196
 197         ret = clk_prepare_enable(drvdata->pcnoc_sway_clk);
 198         if (ret) {
 199                 dev_err(&pdev->dev, "%s() Error enabling pcnoc_sway_clk: %d\n",
 200                                 __func__, ret);
 201                 return ret;
 202         }
 203
 204         return 0;
 205 }
 206
 207 static int apq8016_lpass_exit(struct platform_device *pdev)
 208 {
 209         struct lpass_data *drvdata = platform_get_drvdata(pdev);
 210
 211         clk_disable_unprepare(drvdata->pcnoc_mport_clk);
 212         clk_disable_unprepare(drvdata->pcnoc_sway_clk);
 213
 214         return 0;
 215 }
 216
 217
 218 static struct lpass_variant apq8016_data = {
 219         .i2sctrl_reg_base       = 0x1000,
 220         .i2sctrl_reg_stride     = 0x1000,
 221         .i2s_ports              = 4,
 222         .irq_reg_base           = 0x6000,
 223         .irq_reg_stride         = 0x1000,
 224         .irq_ports              = 3,
 225         .rdma_reg_base          = 0x8400,
 226         .rdma_reg_stride        = 0x1000,
 227         .rdma_channels          = 2,
 228         .dmactl_audif_start     = 1,
 229         .wrdma_reg_base         = 0xB000,
 230         .wrdma_reg_stride       = 0x1000,
 231         .wrdma_channel_start    = 5,
 232         .wrdma_channels         = 2,
 233         .dai_driver             = apq8016_lpass_cpu_dai_driver,
 234         .num_dai                = ARRAY_SIZE(apq8016_lpass_cpu_dai_driver),
 235         .init                   = apq8016_lpass_init,
 236         .exit                   = apq8016_lpass_exit,
 237         .alloc_dma_channel      = apq8016_lpass_alloc_dma_channel,
 238         .free_dma_channel       = apq8016_lpass_free_dma_channel,
 239 };
 240
 241 static const struct of_device_id apq8016_lpass_cpu_device_id[] = {
 242         { .compatible = "qcom,lpass-cpu-apq8016", .data = &apq8016_data },
 243         {}
 244 };
 245 MODULE_DEVICE_TABLE(of, apq8016_lpass_cpu_device_id);
 246
 247 static struct platform_driver apq8016_lpass_cpu_platform_driver = {
 248         .driver = {
 249                 .name           = "apq8016-lpass-cpu",
 250                 .of_match_table = of_match_ptr(apq8016_lpass_cpu_device_id),
 251         },
 252         .probe  = asoc_qcom_lpass_cpu_platform_probe,
 253         .remove = asoc_qcom_lpass_cpu_platform_remove,
 254 };
 255 module_platform_driver(apq8016_lpass_cpu_platform_driver);
 256
 257 MODULE_DESCRIPTION("APQ8016 LPASS CPU Driver");
 258 MODULE_LICENSE("GPL v2");
 259