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sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / sound / soc / samsung / i2s.c
blobe00974bc561670ff30413a85e5fe2644148617e3
1 /* sound/soc/samsung/i2s.c
2 *
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
4 *
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
6 * Jaswinder Singh <jassisinghbrar@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <dt-bindings/sound/samsung-i2s.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
18 #include <linux/io.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22 #include <linux/of_gpio.h>
23 #include <linux/pm_runtime.h>
24
25 #include <sound/soc.h>
26 #include <sound/pcm_params.h>
27
28 #include <linux/platform_data/asoc-s3c.h>
29
30 #include "dma.h"
31 #include "idma.h"
32 #include "i2s.h"
33 #include "i2s-regs.h"
34
35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
36
37 enum samsung_dai_type {
38 TYPE_PRI,
39 TYPE_SEC,
40 };
41
42 struct samsung_i2s_variant_regs {
43 unsigned int bfs_off;
44 unsigned int rfs_off;
45 unsigned int sdf_off;
46 unsigned int txr_off;
47 unsigned int rclksrc_off;
48 unsigned int mss_off;
49 unsigned int cdclkcon_off;
50 unsigned int lrp_off;
51 unsigned int bfs_mask;
52 unsigned int rfs_mask;
53 unsigned int ftx0cnt_off;
54 };
55
56 struct samsung_i2s_dai_data {
57 int dai_type;
58 u32 quirks;
59 const struct samsung_i2s_variant_regs *i2s_variant_regs;
60 };
61
62 struct i2s_dai {
63 /* Platform device for this DAI */
64 struct platform_device *pdev;
65 /* Memory mapped SFR region */
66 void __iomem *addr;
67 /* Rate of RCLK source clock */
68 unsigned long rclk_srcrate;
69 /* Frame Clock */
70 unsigned frmclk;
71 /*
72 * Specifically requested RCLK,BCLK by MACHINE Driver.
73 * 0 indicates CPU driver is free to choose any value.
74 */
75 unsigned rfs, bfs;
76 /* I2S Controller's core clock */
77 struct clk *clk;
78 /* Clock for generating I2S signals */
79 struct clk *op_clk;
80 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
81 struct i2s_dai *pri_dai;
82 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
83 struct i2s_dai *sec_dai;
84 #define DAI_OPENED (1 << 0) /* Dai is opened */
85 #define DAI_MANAGER (1 << 1) /* Dai is the manager */
86 unsigned mode;
87 /* Driver for this DAI */
88 struct snd_soc_dai_driver i2s_dai_drv;
89 /* DMA parameters */
90 struct snd_dmaengine_dai_dma_data dma_playback;
91 struct snd_dmaengine_dai_dma_data dma_capture;
92 struct snd_dmaengine_dai_dma_data idma_playback;
93 dma_filter_fn filter;
94 u32 quirks;
95 u32 suspend_i2smod;
96 u32 suspend_i2scon;
97 u32 suspend_i2spsr;
98 const struct samsung_i2s_variant_regs *variant_regs;
99
100 /* Spinlock protecting access to the device's registers */
101 spinlock_t spinlock;
102 spinlock_t *lock;
103
104 /* Below fields are only valid if this is the primary FIFO */
105 struct clk *clk_table[3];
106 struct clk_onecell_data clk_data;
107 };
108
109 /* Lock for cross i/f checks */
110 static DEFINE_SPINLOCK(lock);
111
112 /* If this is the 'overlay' stereo DAI */
113 static inline bool is_secondary(struct i2s_dai *i2s)
114 {
115 return i2s->pri_dai ? true : false;
116 }
117
118 /* If operating in SoC-Slave mode */
119 static inline bool is_slave(struct i2s_dai *i2s)
120 {
121 u32 mod = readl(i2s->addr + I2SMOD);
122 return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
123 }
124
125 /* If this interface of the controller is transmitting data */
126 static inline bool tx_active(struct i2s_dai *i2s)
127 {
128 u32 active;
129
130 if (!i2s)
131 return false;
132
133 active = readl(i2s->addr + I2SCON);
134
135 if (is_secondary(i2s))
136 active &= CON_TXSDMA_ACTIVE;
137 else
138 active &= CON_TXDMA_ACTIVE;
139
140 return active ? true : false;
141 }
142
143 /* Return pointer to the other DAI */
144 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
145 {
146 return i2s->pri_dai ? : i2s->sec_dai;
147 }
148
149 /* If the other interface of the controller is transmitting data */
150 static inline bool other_tx_active(struct i2s_dai *i2s)
151 {
152 struct i2s_dai *other = get_other_dai(i2s);
153
154 return tx_active(other);
155 }
156
157 /* If any interface of the controller is transmitting data */
158 static inline bool any_tx_active(struct i2s_dai *i2s)
159 {
160 return tx_active(i2s) || other_tx_active(i2s);
161 }
162
163 /* If this interface of the controller is receiving data */
164 static inline bool rx_active(struct i2s_dai *i2s)
165 {
166 u32 active;
167
168 if (!i2s)
169 return false;
170
171 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
172
173 return active ? true : false;
174 }
175
176 /* If the other interface of the controller is receiving data */
177 static inline bool other_rx_active(struct i2s_dai *i2s)
178 {
179 struct i2s_dai *other = get_other_dai(i2s);
180
181 return rx_active(other);
182 }
183
184 /* If any interface of the controller is receiving data */
185 static inline bool any_rx_active(struct i2s_dai *i2s)
186 {
187 return rx_active(i2s) || other_rx_active(i2s);
188 }
189
190 /* If the other DAI is transmitting or receiving data */
191 static inline bool other_active(struct i2s_dai *i2s)
192 {
193 return other_rx_active(i2s) || other_tx_active(i2s);
194 }
195
196 /* If this DAI is transmitting or receiving data */
197 static inline bool this_active(struct i2s_dai *i2s)
198 {
199 return tx_active(i2s) || rx_active(i2s);
200 }
201
202 /* If the controller is active anyway */
203 static inline bool any_active(struct i2s_dai *i2s)
204 {
205 return this_active(i2s) || other_active(i2s);
206 }
207
208 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
209 {
210 return snd_soc_dai_get_drvdata(dai);
211 }
212
213 static inline bool is_opened(struct i2s_dai *i2s)
214 {
215 if (i2s && (i2s->mode & DAI_OPENED))
216 return true;
217 else
218 return false;
219 }
220
221 static inline bool is_manager(struct i2s_dai *i2s)
222 {
223 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
224 return true;
225 else
226 return false;
227 }
228
229 /* Read RCLK of I2S (in multiples of LRCLK) */
230 static inline unsigned get_rfs(struct i2s_dai *i2s)
231 {
232 u32 rfs;
233 rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
234 rfs &= i2s->variant_regs->rfs_mask;
235
236 switch (rfs) {
237 case 7: return 192;
238 case 6: return 96;
239 case 5: return 128;
240 case 4: return 64;
241 case 3: return 768;
242 case 2: return 384;
243 case 1: return 512;
244 default: return 256;
245 }
246 }
247
248 /* Write RCLK of I2S (in multiples of LRCLK) */
249 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
250 {
251 u32 mod = readl(i2s->addr + I2SMOD);
252 int rfs_shift = i2s->variant_regs->rfs_off;
253
254 mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
255
256 switch (rfs) {
257 case 192:
258 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
259 break;
260 case 96:
261 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
262 break;
263 case 128:
264 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
265 break;
266 case 64:
267 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
268 break;
269 case 768:
270 mod |= (MOD_RCLK_768FS << rfs_shift);
271 break;
272 case 512:
273 mod |= (MOD_RCLK_512FS << rfs_shift);
274 break;
275 case 384:
276 mod |= (MOD_RCLK_384FS << rfs_shift);
277 break;
278 default:
279 mod |= (MOD_RCLK_256FS << rfs_shift);
280 break;
281 }
282
283 writel(mod, i2s->addr + I2SMOD);
284 }
285
286 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
287 static inline unsigned get_bfs(struct i2s_dai *i2s)
288 {
289 u32 bfs;
290 bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
291 bfs &= i2s->variant_regs->bfs_mask;
292
293 switch (bfs) {
294 case 8: return 256;
295 case 7: return 192;
296 case 6: return 128;
297 case 5: return 96;
298 case 4: return 64;
299 case 3: return 24;
300 case 2: return 16;
301 case 1: return 48;
302 default: return 32;
303 }
304 }
305
306 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
307 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
308 {
309 u32 mod = readl(i2s->addr + I2SMOD);
310 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
311 int bfs_shift = i2s->variant_regs->bfs_off;
312
313 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
314 if (!tdm && bfs > 48) {
315 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
316 return;
317 }
318
319 mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
320
321 switch (bfs) {
322 case 48:
323 mod |= (MOD_BCLK_48FS << bfs_shift);
324 break;
325 case 32:
326 mod |= (MOD_BCLK_32FS << bfs_shift);
327 break;
328 case 24:
329 mod |= (MOD_BCLK_24FS << bfs_shift);
330 break;
331 case 16:
332 mod |= (MOD_BCLK_16FS << bfs_shift);
333 break;
334 case 64:
335 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
336 break;
337 case 96:
338 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
339 break;
340 case 128:
341 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
342 break;
343 case 192:
344 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
345 break;
346 case 256:
347 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
348 break;
349 default:
350 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
351 return;
352 }
353
354 writel(mod, i2s->addr + I2SMOD);
355 }
356
357 /* Sample-Size */
358 static inline int get_blc(struct i2s_dai *i2s)
359 {
360 int blc = readl(i2s->addr + I2SMOD);
361
362 blc = (blc >> 13) & 0x3;
363
364 switch (blc) {
365 case 2: return 24;
366 case 1: return 8;
367 default: return 16;
368 }
369 }
370
371 /* TX Channel Control */
372 static void i2s_txctrl(struct i2s_dai *i2s, int on)
373 {
374 void __iomem *addr = i2s->addr;
375 int txr_off = i2s->variant_regs->txr_off;
376 u32 con = readl(addr + I2SCON);
377 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
378
379 if (on) {
380 con |= CON_ACTIVE;
381 con &= ~CON_TXCH_PAUSE;
382
383 if (is_secondary(i2s)) {
384 con |= CON_TXSDMA_ACTIVE;
385 con &= ~CON_TXSDMA_PAUSE;
386 } else {
387 con |= CON_TXDMA_ACTIVE;
388 con &= ~CON_TXDMA_PAUSE;
389 }
390
391 if (any_rx_active(i2s))
392 mod |= 2 << txr_off;
393 else
394 mod |= 0 << txr_off;
395 } else {
396 if (is_secondary(i2s)) {
397 con |= CON_TXSDMA_PAUSE;
398 con &= ~CON_TXSDMA_ACTIVE;
399 } else {
400 con |= CON_TXDMA_PAUSE;
401 con &= ~CON_TXDMA_ACTIVE;
402 }
403
404 if (other_tx_active(i2s)) {
405 writel(con, addr + I2SCON);
406 return;
407 }
408
409 con |= CON_TXCH_PAUSE;
410
411 if (any_rx_active(i2s))
412 mod |= 1 << txr_off;
413 else
414 con &= ~CON_ACTIVE;
415 }
416
417 writel(mod, addr + I2SMOD);
418 writel(con, addr + I2SCON);
419 }
420
421 /* RX Channel Control */
422 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
423 {
424 void __iomem *addr = i2s->addr;
425 int txr_off = i2s->variant_regs->txr_off;
426 u32 con = readl(addr + I2SCON);
427 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
428
429 if (on) {
430 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
431 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
432
433 if (any_tx_active(i2s))
434 mod |= 2 << txr_off;
435 else
436 mod |= 1 << txr_off;
437 } else {
438 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
439 con &= ~CON_RXDMA_ACTIVE;
440
441 if (any_tx_active(i2s))
442 mod |= 0 << txr_off;
443 else
444 con &= ~CON_ACTIVE;
445 }
446
447 writel(mod, addr + I2SMOD);
448 writel(con, addr + I2SCON);
449 }
450
451 /* Flush FIFO of an interface */
452 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
453 {
454 void __iomem *fic;
455 u32 val;
456
457 if (!i2s)
458 return;
459
460 if (is_secondary(i2s))
461 fic = i2s->addr + I2SFICS;
462 else
463 fic = i2s->addr + I2SFIC;
464
465 /* Flush the FIFO */
466 writel(readl(fic) | flush, fic);
467
468 /* Be patient */
469 val = msecs_to_loops(1) / 1000; /* 1 usec */
470 while (--val)
471 cpu_relax();
472
473 writel(readl(fic) & ~flush, fic);
474 }
475
476 static int i2s_set_sysclk(struct snd_soc_dai *dai,
477 int clk_id, unsigned int rfs, int dir)
478 {
479 struct i2s_dai *i2s = to_info(dai);
480 struct i2s_dai *other = get_other_dai(i2s);
481 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
482 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
483 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
484 u32 mod, mask, val = 0;
485 unsigned long flags;
486
487 spin_lock_irqsave(i2s->lock, flags);
488 mod = readl(i2s->addr + I2SMOD);
489 spin_unlock_irqrestore(i2s->lock, flags);
490
491 switch (clk_id) {
492 case SAMSUNG_I2S_OPCLK:
493 mask = MOD_OPCLK_MASK;
494 val = dir;
495 break;
496 case SAMSUNG_I2S_CDCLK:
497 mask = 1 << i2s_regs->cdclkcon_off;
498 /* Shouldn't matter in GATING(CLOCK_IN) mode */
499 if (dir == SND_SOC_CLOCK_IN)
500 rfs = 0;
501
502 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
503 (any_active(i2s) &&
504 (((dir == SND_SOC_CLOCK_IN)
505 && !(mod & cdcon_mask)) ||
506 ((dir == SND_SOC_CLOCK_OUT)
507 && (mod & cdcon_mask))))) {
508 dev_err(&i2s->pdev->dev,
509 "%s:%d Other DAI busy\n", __func__, __LINE__);
510 return -EAGAIN;
511 }
512
513 if (dir == SND_SOC_CLOCK_IN)
514 val = 1 << i2s_regs->cdclkcon_off;
515
516 i2s->rfs = rfs;
517 break;
518
519 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
520 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
521 mask = 1 << i2s_regs->rclksrc_off;
522
523 if ((i2s->quirks & QUIRK_NO_MUXPSR)
524 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
525 clk_id = 0;
526 else
527 clk_id = 1;
528
529 if (!any_active(i2s)) {
530 if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
531 if ((clk_id && !(mod & rsrc_mask)) ||
532 (!clk_id && (mod & rsrc_mask))) {
533 clk_disable_unprepare(i2s->op_clk);
534 clk_put(i2s->op_clk);
535 } else {
536 i2s->rclk_srcrate =
537 clk_get_rate(i2s->op_clk);
538 return 0;
539 }
540 }
541
542 if (clk_id)
543 i2s->op_clk = clk_get(&i2s->pdev->dev,
544 "i2s_opclk1");
545 else
546 i2s->op_clk = clk_get(&i2s->pdev->dev,
547 "i2s_opclk0");
548
549 if (WARN_ON(IS_ERR(i2s->op_clk)))
550 return PTR_ERR(i2s->op_clk);
551
552 clk_prepare_enable(i2s->op_clk);
553 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
554
555 /* Over-ride the other's */
556 if (other) {
557 other->op_clk = i2s->op_clk;
558 other->rclk_srcrate = i2s->rclk_srcrate;
559 }
560 } else if ((!clk_id && (mod & rsrc_mask))
561 || (clk_id && !(mod & rsrc_mask))) {
562 dev_err(&i2s->pdev->dev,
563 "%s:%d Other DAI busy\n", __func__, __LINE__);
564 return -EAGAIN;
565 } else {
566 /* Call can't be on the active DAI */
567 i2s->op_clk = other->op_clk;
568 i2s->rclk_srcrate = other->rclk_srcrate;
569 return 0;
570 }
571
572 if (clk_id == 1)
573 val = 1 << i2s_regs->rclksrc_off;
574 break;
575 default:
576 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
577 return -EINVAL;
578 }
579
580 spin_lock_irqsave(i2s->lock, flags);
581 mod = readl(i2s->addr + I2SMOD);
582 mod = (mod & ~mask) | val;
583 writel(mod, i2s->addr + I2SMOD);
584 spin_unlock_irqrestore(i2s->lock, flags);
585
586 return 0;
587 }
588
589 static int i2s_set_fmt(struct snd_soc_dai *dai,
590 unsigned int fmt)
591 {
592 struct i2s_dai *i2s = to_info(dai);
593 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
594 u32 mod, tmp = 0;
595 unsigned long flags;
596
597 lrp_shift = i2s->variant_regs->lrp_off;
598 sdf_shift = i2s->variant_regs->sdf_off;
599 mod_slave = 1 << i2s->variant_regs->mss_off;
600
601 sdf_mask = MOD_SDF_MASK << sdf_shift;
602 lrp_rlow = MOD_LR_RLOW << lrp_shift;
603
604 /* Format is priority */
605 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
606 case SND_SOC_DAIFMT_RIGHT_J:
607 tmp |= lrp_rlow;
608 tmp |= (MOD_SDF_MSB << sdf_shift);
609 break;
610 case SND_SOC_DAIFMT_LEFT_J:
611 tmp |= lrp_rlow;
612 tmp |= (MOD_SDF_LSB << sdf_shift);
613 break;
614 case SND_SOC_DAIFMT_I2S:
615 tmp |= (MOD_SDF_IIS << sdf_shift);
616 break;
617 default:
618 dev_err(&i2s->pdev->dev, "Format not supported\n");
619 return -EINVAL;
620 }
621
622 /*
623 * INV flag is relative to the FORMAT flag - if set it simply
624 * flips the polarity specified by the Standard
625 */
626 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
627 case SND_SOC_DAIFMT_NB_NF:
628 break;
629 case SND_SOC_DAIFMT_NB_IF:
630 if (tmp & lrp_rlow)
631 tmp &= ~lrp_rlow;
632 else
633 tmp |= lrp_rlow;
634 break;
635 default:
636 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
637 return -EINVAL;
638 }
639
640 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
641 case SND_SOC_DAIFMT_CBM_CFM:
642 tmp |= mod_slave;
643 break;
644 case SND_SOC_DAIFMT_CBS_CFS:
645 /* Set default source clock in Master mode */
646 if (i2s->rclk_srcrate == 0)
647 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
648 0, SND_SOC_CLOCK_IN);
649 break;
650 default:
651 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
652 return -EINVAL;
653 }
654
655 spin_lock_irqsave(i2s->lock, flags);
656 mod = readl(i2s->addr + I2SMOD);
657 /*
658 * Don't change the I2S mode if any controller is active on this
659 * channel.
660 */
661 if (any_active(i2s) &&
662 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
663 spin_unlock_irqrestore(i2s->lock, flags);
664 dev_err(&i2s->pdev->dev,
665 "%s:%d Other DAI busy\n", __func__, __LINE__);
666 return -EAGAIN;
667 }
668
669 mod &= ~(sdf_mask | lrp_rlow | mod_slave);
670 mod |= tmp;
671 writel(mod, i2s->addr + I2SMOD);
672 spin_unlock_irqrestore(i2s->lock, flags);
673
674 return 0;
675 }
676
677 static int i2s_hw_params(struct snd_pcm_substream *substream,
678 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
679 {
680 struct i2s_dai *i2s = to_info(dai);
681 u32 mod, mask = 0, val = 0;
682 unsigned long flags;
683
684 if (!is_secondary(i2s))
685 mask |= (MOD_DC2_EN | MOD_DC1_EN);
686
687 switch (params_channels(params)) {
688 case 6:
689 val |= MOD_DC2_EN;
690 case 4:
691 val |= MOD_DC1_EN;
692 break;
693 case 2:
694 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
695 i2s->dma_playback.addr_width = 4;
696 else
697 i2s->dma_capture.addr_width = 4;
698 break;
699 case 1:
700 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
701 i2s->dma_playback.addr_width = 2;
702 else
703 i2s->dma_capture.addr_width = 2;
704
705 break;
706 default:
707 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
708 params_channels(params));
709 return -EINVAL;
710 }
711
712 if (is_secondary(i2s))
713 mask |= MOD_BLCS_MASK;
714 else
715 mask |= MOD_BLCP_MASK;
716
717 if (is_manager(i2s))
718 mask |= MOD_BLC_MASK;
719
720 switch (params_width(params)) {
721 case 8:
722 if (is_secondary(i2s))
723 val |= MOD_BLCS_8BIT;
724 else
725 val |= MOD_BLCP_8BIT;
726 if (is_manager(i2s))
727 val |= MOD_BLC_8BIT;
728 break;
729 case 16:
730 if (is_secondary(i2s))
731 val |= MOD_BLCS_16BIT;
732 else
733 val |= MOD_BLCP_16BIT;
734 if (is_manager(i2s))
735 val |= MOD_BLC_16BIT;
736 break;
737 case 24:
738 if (is_secondary(i2s))
739 val |= MOD_BLCS_24BIT;
740 else
741 val |= MOD_BLCP_24BIT;
742 if (is_manager(i2s))
743 val |= MOD_BLC_24BIT;
744 break;
745 default:
746 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
747 params_format(params));
748 return -EINVAL;
749 }
750
751 spin_lock_irqsave(i2s->lock, flags);
752 mod = readl(i2s->addr + I2SMOD);
753 mod = (mod & ~mask) | val;
754 writel(mod, i2s->addr + I2SMOD);
755 spin_unlock_irqrestore(i2s->lock, flags);
756
757 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
758
759 i2s->frmclk = params_rate(params);
760
761 return 0;
762 }
763
764 /* We set constraints on the substream acc to the version of I2S */
765 static int i2s_startup(struct snd_pcm_substream *substream,
766 struct snd_soc_dai *dai)
767 {
768 struct i2s_dai *i2s = to_info(dai);
769 struct i2s_dai *other = get_other_dai(i2s);
770 unsigned long flags;
771
772 spin_lock_irqsave(&lock, flags);
773
774 i2s->mode |= DAI_OPENED;
775
776 if (is_manager(other))
777 i2s->mode &= ~DAI_MANAGER;
778 else
779 i2s->mode |= DAI_MANAGER;
780
781 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
782 writel(CON_RSTCLR, i2s->addr + I2SCON);
783
784 spin_unlock_irqrestore(&lock, flags);
785
786 return 0;
787 }
788
789 static void i2s_shutdown(struct snd_pcm_substream *substream,
790 struct snd_soc_dai *dai)
791 {
792 struct i2s_dai *i2s = to_info(dai);
793 struct i2s_dai *other = get_other_dai(i2s);
794 unsigned long flags;
795
796 spin_lock_irqsave(&lock, flags);
797
798 i2s->mode &= ~DAI_OPENED;
799 i2s->mode &= ~DAI_MANAGER;
800
801 if (is_opened(other))
802 other->mode |= DAI_MANAGER;
803
804 /* Reset any constraint on RFS and BFS */
805 i2s->rfs = 0;
806 i2s->bfs = 0;
807
808 spin_unlock_irqrestore(&lock, flags);
809 }
810
811 static int config_setup(struct i2s_dai *i2s)
812 {
813 struct i2s_dai *other = get_other_dai(i2s);
814 unsigned rfs, bfs, blc;
815 u32 psr;
816
817 blc = get_blc(i2s);
818
819 bfs = i2s->bfs;
820
821 if (!bfs && other)
822 bfs = other->bfs;
823
824 /* Select least possible multiple(2) if no constraint set */
825 if (!bfs)
826 bfs = blc * 2;
827
828 rfs = i2s->rfs;
829
830 if (!rfs && other)
831 rfs = other->rfs;
832
833 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
834 dev_err(&i2s->pdev->dev,
835 "%d-RFS not supported for 24-blc\n", rfs);
836 return -EINVAL;
837 }
838
839 if (!rfs) {
840 if (bfs == 16 || bfs == 32)
841 rfs = 256;
842 else
843 rfs = 384;
844 }
845
846 /* If already setup and running */
847 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
848 dev_err(&i2s->pdev->dev,
849 "%s:%d Other DAI busy\n", __func__, __LINE__);
850 return -EAGAIN;
851 }
852
853 set_bfs(i2s, bfs);
854 set_rfs(i2s, rfs);
855
856 /* Don't bother with PSR in Slave mode */
857 if (is_slave(i2s))
858 return 0;
859
860 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
861 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
862 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
863 dev_dbg(&i2s->pdev->dev,
864 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
865 i2s->rclk_srcrate, psr, rfs, bfs);
866 }
867
868 return 0;
869 }
870
871 static int i2s_trigger(struct snd_pcm_substream *substream,
872 int cmd, struct snd_soc_dai *dai)
873 {
874 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
875 struct snd_soc_pcm_runtime *rtd = substream->private_data;
876 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
877 unsigned long flags;
878
879 switch (cmd) {
880 case SNDRV_PCM_TRIGGER_START:
881 case SNDRV_PCM_TRIGGER_RESUME:
882 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
883 spin_lock_irqsave(i2s->lock, flags);
884
885 if (config_setup(i2s)) {
886 spin_unlock_irqrestore(i2s->lock, flags);
887 return -EINVAL;
888 }
889
890 if (capture)
891 i2s_rxctrl(i2s, 1);
892 else
893 i2s_txctrl(i2s, 1);
894
895 spin_unlock_irqrestore(i2s->lock, flags);
896 break;
897 case SNDRV_PCM_TRIGGER_STOP:
898 case SNDRV_PCM_TRIGGER_SUSPEND:
899 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
900 spin_lock_irqsave(i2s->lock, flags);
901
902 if (capture) {
903 i2s_rxctrl(i2s, 0);
904 i2s_fifo(i2s, FIC_RXFLUSH);
905 } else {
906 i2s_txctrl(i2s, 0);
907 i2s_fifo(i2s, FIC_TXFLUSH);
908 }
909
910 spin_unlock_irqrestore(i2s->lock, flags);
911 break;
912 }
913
914 return 0;
915 }
916
917 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
918 int div_id, int div)
919 {
920 struct i2s_dai *i2s = to_info(dai);
921 struct i2s_dai *other = get_other_dai(i2s);
922
923 switch (div_id) {
924 case SAMSUNG_I2S_DIV_BCLK:
925 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
926 || (other && other->bfs && (other->bfs != div))) {
927 dev_err(&i2s->pdev->dev,
928 "%s:%d Other DAI busy\n", __func__, __LINE__);
929 return -EAGAIN;
930 }
931 i2s->bfs = div;
932 break;
933 default:
934 dev_err(&i2s->pdev->dev,
935 "Invalid clock divider(%d)\n", div_id);
936 return -EINVAL;
937 }
938
939 return 0;
940 }
941
942 static snd_pcm_sframes_t
943 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
944 {
945 struct i2s_dai *i2s = to_info(dai);
946 u32 reg = readl(i2s->addr + I2SFIC);
947 snd_pcm_sframes_t delay;
948 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
949
950 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
951 delay = FIC_RXCOUNT(reg);
952 else if (is_secondary(i2s))
953 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
954 else
955 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
956
957 return delay;
958 }
959
960 #ifdef CONFIG_PM
961 static int i2s_suspend(struct snd_soc_dai *dai)
962 {
963 struct i2s_dai *i2s = to_info(dai);
964
965 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
966 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
967 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
968
969 return 0;
970 }
971
972 static int i2s_resume(struct snd_soc_dai *dai)
973 {
974 struct i2s_dai *i2s = to_info(dai);
975
976 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
977 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
978 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
979
980 return 0;
981 }
982 #else
983 #define i2s_suspend NULL
984 #define i2s_resume NULL
985 #endif
986
987 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
988 {
989 struct i2s_dai *i2s = to_info(dai);
990 struct i2s_dai *other = get_other_dai(i2s);
991 unsigned long flags;
992
993 if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
994 snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback,
995 NULL);
996 } else {
997 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
998 &i2s->dma_capture);
999
1000 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1001 writel(CON_RSTCLR, i2s->addr + I2SCON);
1002
1003 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1004 idma_reg_addr_init(i2s->addr,
1005 i2s->sec_dai->idma_playback.addr);
1006 }
1007
1008 /* Reset any constraint on RFS and BFS */
1009 i2s->rfs = 0;
1010 i2s->bfs = 0;
1011 i2s->rclk_srcrate = 0;
1012
1013 spin_lock_irqsave(i2s->lock, flags);
1014 i2s_txctrl(i2s, 0);
1015 i2s_rxctrl(i2s, 0);
1016 i2s_fifo(i2s, FIC_TXFLUSH);
1017 i2s_fifo(other, FIC_TXFLUSH);
1018 i2s_fifo(i2s, FIC_RXFLUSH);
1019 spin_unlock_irqrestore(i2s->lock, flags);
1020
1021 /* Gate CDCLK by default */
1022 if (!is_opened(other))
1023 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1024 0, SND_SOC_CLOCK_IN);
1025
1026 return 0;
1027 }
1028
1029 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1030 {
1031 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1032 unsigned long flags;
1033
1034 if (!is_secondary(i2s)) {
1035 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1036 spin_lock_irqsave(i2s->lock, flags);
1037 writel(0, i2s->addr + I2SCON);
1038 spin_unlock_irqrestore(i2s->lock, flags);
1039 }
1040 }
1041
1042 return 0;
1043 }
1044
1045 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1046 .trigger = i2s_trigger,
1047 .hw_params = i2s_hw_params,
1048 .set_fmt = i2s_set_fmt,
1049 .set_clkdiv = i2s_set_clkdiv,
1050 .set_sysclk = i2s_set_sysclk,
1051 .startup = i2s_startup,
1052 .shutdown = i2s_shutdown,
1053 .delay = i2s_delay,
1054 };
1055
1056 static const struct snd_soc_component_driver samsung_i2s_component = {
1057 .name = "samsung-i2s",
1058 };
1059
1060 #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
1061
1062 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1063 SNDRV_PCM_FMTBIT_S16_LE | \
1064 SNDRV_PCM_FMTBIT_S24_LE)
1065
1066 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1067 {
1068 struct i2s_dai *i2s;
1069 int ret;
1070
1071 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1072 if (i2s == NULL)
1073 return NULL;
1074
1075 i2s->pdev = pdev;
1076 i2s->pri_dai = NULL;
1077 i2s->sec_dai = NULL;
1078 i2s->i2s_dai_drv.symmetric_rates = 1;
1079 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1080 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1081 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1082 i2s->i2s_dai_drv.suspend = i2s_suspend;
1083 i2s->i2s_dai_drv.resume = i2s_resume;
1084 i2s->i2s_dai_drv.playback.channels_min = 1;
1085 i2s->i2s_dai_drv.playback.channels_max = 2;
1086 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1087 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1088
1089 if (!sec) {
1090 i2s->i2s_dai_drv.capture.channels_min = 1;
1091 i2s->i2s_dai_drv.capture.channels_max = 2;
1092 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1093 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1094 dev_set_drvdata(&i2s->pdev->dev, i2s);
1095 } else { /* Create a new platform_device for Secondary */
1096 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
1097 if (!i2s->pdev)
1098 return NULL;
1099
1100 i2s->pdev->dev.parent = &pdev->dev;
1101
1102 platform_set_drvdata(i2s->pdev, i2s);
1103 ret = platform_device_add(i2s->pdev);
1104 if (ret < 0)
1105 return NULL;
1106 }
1107
1108 return i2s;
1109 }
1110
1111 static void i2s_free_sec_dai(struct i2s_dai *i2s)
1112 {
1113 platform_device_del(i2s->pdev);
1114 }
1115
1116 #ifdef CONFIG_PM
1117 static int i2s_runtime_suspend(struct device *dev)
1118 {
1119 struct i2s_dai *i2s = dev_get_drvdata(dev);
1120
1121 clk_disable_unprepare(i2s->clk);
1122
1123 return 0;
1124 }
1125
1126 static int i2s_runtime_resume(struct device *dev)
1127 {
1128 struct i2s_dai *i2s = dev_get_drvdata(dev);
1129
1130 clk_prepare_enable(i2s->clk);
1131
1132 return 0;
1133 }
1134 #endif /* CONFIG_PM */
1135
1136 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1137 {
1138 int i;
1139
1140 for (i = 0; i < i2s->clk_data.clk_num; i++) {
1141 if (!IS_ERR(i2s->clk_table[i]))
1142 clk_unregister(i2s->clk_table[i]);
1143 }
1144 }
1145
1146 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1147 {
1148 struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1149
1150 of_clk_del_provider(pdev->dev.of_node);
1151 i2s_unregister_clocks(i2s);
1152 }
1153
1154 static int i2s_register_clock_provider(struct platform_device *pdev)
1155 {
1156 struct device *dev = &pdev->dev;
1157 struct i2s_dai *i2s = dev_get_drvdata(dev);
1158 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1159 const char *p_names[2] = { NULL };
1160 const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1161 struct clk *rclksrc;
1162 int ret, i;
1163
1164 /* Register the clock provider only if it's expected in the DTB */
1165 if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1166 return 0;
1167
1168 /* Get the RCLKSRC mux clock parent clock names */
1169 for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1170 rclksrc = clk_get(dev, clk_name[i]);
1171 if (IS_ERR(rclksrc))
1172 continue;
1173 p_names[i] = __clk_get_name(rclksrc);
1174 clk_put(rclksrc);
1175 }
1176
1177 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1178 /* Activate the prescaler */
1179 u32 val = readl(i2s->addr + I2SPSR);
1180 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1181
1182 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(NULL,
1183 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
1184 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1185 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1186 1, 0, i2s->lock);
1187
1188 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(NULL,
1189 "i2s_presc", "i2s_rclksrc",
1190 CLK_SET_RATE_PARENT,
1191 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1192
1193 p_names[0] = "i2s_presc";
1194 i2s->clk_data.clk_num = 2;
1195 }
1196 of_property_read_string_index(dev->of_node,
1197 "clock-output-names", 0, &clk_name[0]);
1198
1199 i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(NULL, clk_name[0],
1200 p_names[0], CLK_SET_RATE_PARENT,
1201 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1202 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1203
1204 i2s->clk_data.clk_num += 1;
1205 i2s->clk_data.clks = i2s->clk_table;
1206
1207 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1208 &i2s->clk_data);
1209 if (ret < 0) {
1210 dev_err(dev, "failed to add clock provider: %d\n", ret);
1211 i2s_unregister_clocks(i2s);
1212 }
1213
1214 return ret;
1215 }
1216
1217 static int samsung_i2s_probe(struct platform_device *pdev)
1218 {
1219 struct i2s_dai *pri_dai, *sec_dai = NULL;
1220 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1221 struct samsung_i2s *i2s_cfg = NULL;
1222 struct resource *res;
1223 u32 regs_base, quirks = 0, idma_addr = 0;
1224 struct device_node *np = pdev->dev.of_node;
1225 const struct samsung_i2s_dai_data *i2s_dai_data;
1226 int ret;
1227
1228 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)
1229 i2s_dai_data = of_device_get_match_data(&pdev->dev);
1230 else
1231 i2s_dai_data = (struct samsung_i2s_dai_data *)
1232 platform_get_device_id(pdev)->driver_data;
1233
1234 /* Call during the secondary interface registration */
1235 if (i2s_dai_data->dai_type == TYPE_SEC) {
1236 sec_dai = dev_get_drvdata(&pdev->dev);
1237 if (!sec_dai) {
1238 dev_err(&pdev->dev, "Unable to get drvdata\n");
1239 return -EFAULT;
1240 }
1241 ret = samsung_asoc_dma_platform_register(&pdev->dev,
1242 sec_dai->filter, "tx-sec", NULL);
1243 if (ret != 0)
1244 return ret;
1245
1246 return devm_snd_soc_register_component(&sec_dai->pdev->dev,
1247 &samsung_i2s_component,
1248 &sec_dai->i2s_dai_drv, 1);
1249 }
1250
1251 pri_dai = i2s_alloc_dai(pdev, false);
1252 if (!pri_dai) {
1253 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1254 return -ENOMEM;
1255 }
1256
1257 spin_lock_init(&pri_dai->spinlock);
1258 pri_dai->lock = &pri_dai->spinlock;
1259
1260 if (!np) {
1261 if (i2s_pdata == NULL) {
1262 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1263 return -EINVAL;
1264 }
1265
1266 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1267 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1268 pri_dai->filter = i2s_pdata->dma_filter;
1269
1270 if (&i2s_pdata->type)
1271 i2s_cfg = &i2s_pdata->type.i2s;
1272
1273 if (i2s_cfg) {
1274 quirks = i2s_cfg->quirks;
1275 idma_addr = i2s_cfg->idma_addr;
1276 }
1277 } else {
1278 quirks = i2s_dai_data->quirks;
1279 if (of_property_read_u32(np, "samsung,idma-addr",
1280 &idma_addr)) {
1281 if (quirks & QUIRK_SUPPORTS_IDMA) {
1282 dev_info(&pdev->dev, "idma address is not"\
1283 "specified");
1284 }
1285 }
1286 }
1287
1288 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1289 pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1290 if (IS_ERR(pri_dai->addr))
1291 return PTR_ERR(pri_dai->addr);
1292
1293 regs_base = res->start;
1294
1295 pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1296 if (IS_ERR(pri_dai->clk)) {
1297 dev_err(&pdev->dev, "Failed to get iis clock\n");
1298 return PTR_ERR(pri_dai->clk);
1299 }
1300
1301 ret = clk_prepare_enable(pri_dai->clk);
1302 if (ret != 0) {
1303 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1304 return ret;
1305 }
1306 pri_dai->dma_playback.addr = regs_base + I2STXD;
1307 pri_dai->dma_capture.addr = regs_base + I2SRXD;
1308 pri_dai->dma_playback.addr_width = 4;
1309 pri_dai->dma_capture.addr_width = 4;
1310 pri_dai->quirks = quirks;
1311 pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1312
1313 if (quirks & QUIRK_PRI_6CHAN)
1314 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1315
1316 ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1317 NULL, NULL);
1318 if (ret < 0)
1319 goto err_disable_clk;
1320
1321 if (quirks & QUIRK_SEC_DAI) {
1322 sec_dai = i2s_alloc_dai(pdev, true);
1323 if (!sec_dai) {
1324 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1325 ret = -ENOMEM;
1326 goto err_disable_clk;
1327 }
1328
1329 sec_dai->lock = &pri_dai->spinlock;
1330 sec_dai->variant_regs = pri_dai->variant_regs;
1331 sec_dai->dma_playback.addr = regs_base + I2STXDS;
1332
1333 if (!np) {
1334 sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1335 sec_dai->filter = i2s_pdata->dma_filter;
1336 }
1337
1338 sec_dai->dma_playback.addr_width = 4;
1339 sec_dai->addr = pri_dai->addr;
1340 sec_dai->clk = pri_dai->clk;
1341 sec_dai->quirks = quirks;
1342 sec_dai->idma_playback.addr = idma_addr;
1343 sec_dai->pri_dai = pri_dai;
1344 pri_dai->sec_dai = sec_dai;
1345 }
1346
1347 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1348 dev_err(&pdev->dev, "Unable to configure gpio\n");
1349 ret = -EINVAL;
1350 goto err_disable_clk;
1351 }
1352
1353 ret = devm_snd_soc_register_component(&pri_dai->pdev->dev,
1354 &samsung_i2s_component,
1355 &pri_dai->i2s_dai_drv, 1);
1356 if (ret < 0)
1357 goto err_free_dai;
1358
1359
1360 pm_runtime_enable(&pdev->dev);
1361
1362 ret = i2s_register_clock_provider(pdev);
1363 if (!ret)
1364 return 0;
1365
1366 pm_runtime_disable(&pdev->dev);
1367 err_free_dai:
1368 if (sec_dai)
1369 i2s_free_sec_dai(sec_dai);
1370 err_disable_clk:
1371 clk_disable_unprepare(pri_dai->clk);
1372 return ret;
1373 }
1374
1375 static int samsung_i2s_remove(struct platform_device *pdev)
1376 {
1377 struct i2s_dai *i2s, *other;
1378
1379 i2s = dev_get_drvdata(&pdev->dev);
1380 other = get_other_dai(i2s);
1381
1382 if (other) {
1383 other->pri_dai = NULL;
1384 other->sec_dai = NULL;
1385 } else {
1386 pm_runtime_disable(&pdev->dev);
1387 }
1388
1389 if (!is_secondary(i2s)) {
1390 i2s_unregister_clock_provider(pdev);
1391 clk_disable_unprepare(i2s->clk);
1392 }
1393
1394 i2s->pri_dai = NULL;
1395 i2s->sec_dai = NULL;
1396
1397 return 0;
1398 }
1399
1400 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1401 .bfs_off = 1,
1402 .rfs_off = 3,
1403 .sdf_off = 5,
1404 .txr_off = 8,
1405 .rclksrc_off = 10,
1406 .mss_off = 11,
1407 .cdclkcon_off = 12,
1408 .lrp_off = 7,
1409 .bfs_mask = 0x3,
1410 .rfs_mask = 0x3,
1411 .ftx0cnt_off = 8,
1412 };
1413
1414 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1415 .bfs_off = 0,
1416 .rfs_off = 4,
1417 .sdf_off = 6,
1418 .txr_off = 8,
1419 .rclksrc_off = 10,
1420 .mss_off = 11,
1421 .cdclkcon_off = 12,
1422 .lrp_off = 15,
1423 .bfs_mask = 0xf,
1424 .rfs_mask = 0x3,
1425 .ftx0cnt_off = 8,
1426 };
1427
1428 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1429 .bfs_off = 0,
1430 .rfs_off = 4,
1431 .sdf_off = 7,
1432 .txr_off = 9,
1433 .rclksrc_off = 11,
1434 .mss_off = 12,
1435 .cdclkcon_off = 22,
1436 .lrp_off = 15,
1437 .bfs_mask = 0xf,
1438 .rfs_mask = 0x7,
1439 .ftx0cnt_off = 0,
1440 };
1441
1442 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1443 .bfs_off = 0,
1444 .rfs_off = 3,
1445 .sdf_off = 6,
1446 .txr_off = 8,
1447 .rclksrc_off = 10,
1448 .mss_off = 11,
1449 .cdclkcon_off = 12,
1450 .lrp_off = 15,
1451 .bfs_mask = 0x7,
1452 .rfs_mask = 0x7,
1453 .ftx0cnt_off = 8,
1454 };
1455
1456 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1457 .dai_type = TYPE_PRI,
1458 .quirks = QUIRK_NO_MUXPSR,
1459 .i2s_variant_regs = &i2sv3_regs,
1460 };
1461
1462 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1463 .dai_type = TYPE_PRI,
1464 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1465 QUIRK_SUPPORTS_IDMA,
1466 .i2s_variant_regs = &i2sv3_regs,
1467 };
1468
1469 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1470 .dai_type = TYPE_PRI,
1471 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1472 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1473 .i2s_variant_regs = &i2sv6_regs,
1474 };
1475
1476 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1477 .dai_type = TYPE_PRI,
1478 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1479 QUIRK_SUPPORTS_TDM,
1480 .i2s_variant_regs = &i2sv7_regs,
1481 };
1482
1483 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1484 .dai_type = TYPE_PRI,
1485 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1486 .i2s_variant_regs = &i2sv5_i2s1_regs,
1487 };
1488
1489 static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1490 .dai_type = TYPE_SEC,
1491 };
1492
1493 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1494 {
1495 .name = "samsung-i2s",
1496 .driver_data = (kernel_ulong_t)&i2sv3_dai_type,
1497 }, {
1498 .name = "samsung-i2s-sec",
1499 .driver_data = (kernel_ulong_t)&samsung_dai_type_sec,
1500 },
1501 {},
1502 };
1503 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1504
1505 #ifdef CONFIG_OF
1506 static const struct of_device_id exynos_i2s_match[] = {
1507 {
1508 .compatible = "samsung,s3c6410-i2s",
1509 .data = &i2sv3_dai_type,
1510 }, {
1511 .compatible = "samsung,s5pv210-i2s",
1512 .data = &i2sv5_dai_type,
1513 }, {
1514 .compatible = "samsung,exynos5420-i2s",
1515 .data = &i2sv6_dai_type,
1516 }, {
1517 .compatible = "samsung,exynos7-i2s",
1518 .data = &i2sv7_dai_type,
1519 }, {
1520 .compatible = "samsung,exynos7-i2s1",
1521 .data = &i2sv5_dai_type_i2s1,
1522 },
1523 {},
1524 };
1525 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1526 #endif
1527
1528 static const struct dev_pm_ops samsung_i2s_pm = {
1529 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1530 i2s_runtime_resume, NULL)
1531 };
1532
1533 static struct platform_driver samsung_i2s_driver = {
1534 .probe = samsung_i2s_probe,
1535 .remove = samsung_i2s_remove,
1536 .id_table = samsung_i2s_driver_ids,
1537 .driver = {
1538 .name = "samsung-i2s",
1539 .of_match_table = of_match_ptr(exynos_i2s_match),
1540 .pm = &samsung_i2s_pm,
1541 },
1542 };
1543
1544 module_platform_driver(samsung_i2s_driver);
1545
1546 /* Module information */
1547 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1548 MODULE_DESCRIPTION("Samsung I2S Interface");
1549 MODULE_ALIAS("platform:samsung-i2s");
1550 MODULE_LICENSE("GPL");
Linux with added FPC-III support