sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / sound / soc / tegra / tegra20_das.c
blob89add13c31cfc08259bd97d91555b70886117b77
1 /*
2 * tegra20_das.c - Tegra20 DAS driver
4 * Author: Stephen Warren <swarren@nvidia.com>
5 * Copyright (C) 2010 - NVIDIA, Inc.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
23 #include <linux/device.h>
24 #include <linux/io.h>
25 #include <linux/module.h>
26 #include <linux/platform_device.h>
27 #include <linux/regmap.h>
28 #include <linux/slab.h>
29 #include <sound/soc.h>
30 #include "tegra20_das.h"
32 #define DRV_NAME "tegra20-das"
34 static struct tegra20_das *das;
36 static inline void tegra20_das_write(u32 reg, u32 val)
38 regmap_write(das->regmap, reg, val);
41 static inline u32 tegra20_das_read(u32 reg)
43 u32 val;
44 regmap_read(das->regmap, reg, &val);
45 return val;
48 int tegra20_das_connect_dap_to_dac(int dap, int dac)
50 u32 addr;
51 u32 reg;
53 if (!das)
54 return -ENODEV;
56 addr = TEGRA20_DAS_DAP_CTRL_SEL +
57 (dap * TEGRA20_DAS_DAP_CTRL_SEL_STRIDE);
58 reg = dac << TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P;
60 tegra20_das_write(addr, reg);
62 return 0;
64 EXPORT_SYMBOL_GPL(tegra20_das_connect_dap_to_dac);
66 int tegra20_das_connect_dap_to_dap(int dap, int otherdap, int master,
67 int sdata1rx, int sdata2rx)
69 u32 addr;
70 u32 reg;
72 if (!das)
73 return -ENODEV;
75 addr = TEGRA20_DAS_DAP_CTRL_SEL +
76 (dap * TEGRA20_DAS_DAP_CTRL_SEL_STRIDE);
77 reg = otherdap << TEGRA20_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P |
78 !!sdata2rx << TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA2_TX_RX_P |
79 !!sdata1rx << TEGRA20_DAS_DAP_CTRL_SEL_DAP_SDATA1_TX_RX_P |
80 !!master << TEGRA20_DAS_DAP_CTRL_SEL_DAP_MS_SEL_P;
82 tegra20_das_write(addr, reg);
84 return 0;
86 EXPORT_SYMBOL_GPL(tegra20_das_connect_dap_to_dap);
88 int tegra20_das_connect_dac_to_dap(int dac, int dap)
90 u32 addr;
91 u32 reg;
93 if (!das)
94 return -ENODEV;
96 addr = TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL +
97 (dac * TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_STRIDE);
98 reg = dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL_P |
99 dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL_P |
100 dap << TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL_P;
102 tegra20_das_write(addr, reg);
104 return 0;
106 EXPORT_SYMBOL_GPL(tegra20_das_connect_dac_to_dap);
108 #define LAST_REG(name) \
109 (TEGRA20_DAS_##name + \
110 (TEGRA20_DAS_##name##_STRIDE * (TEGRA20_DAS_##name##_COUNT - 1)))
112 static bool tegra20_das_wr_rd_reg(struct device *dev, unsigned int reg)
114 if ((reg >= TEGRA20_DAS_DAP_CTRL_SEL) &&
115 (reg <= LAST_REG(DAP_CTRL_SEL)))
116 return true;
117 if ((reg >= TEGRA20_DAS_DAC_INPUT_DATA_CLK_SEL) &&
118 (reg <= LAST_REG(DAC_INPUT_DATA_CLK_SEL)))
119 return true;
121 return false;
124 static const struct regmap_config tegra20_das_regmap_config = {
125 .reg_bits = 32,
126 .reg_stride = 4,
127 .val_bits = 32,
128 .max_register = LAST_REG(DAC_INPUT_DATA_CLK_SEL),
129 .writeable_reg = tegra20_das_wr_rd_reg,
130 .readable_reg = tegra20_das_wr_rd_reg,
131 .cache_type = REGCACHE_FLAT,
134 static int tegra20_das_probe(struct platform_device *pdev)
136 struct resource *res;
137 void __iomem *regs;
138 int ret = 0;
140 if (das)
141 return -ENODEV;
143 das = devm_kzalloc(&pdev->dev, sizeof(struct tegra20_das), GFP_KERNEL);
144 if (!das) {
145 dev_err(&pdev->dev, "Can't allocate tegra20_das\n");
146 ret = -ENOMEM;
147 goto err;
149 das->dev = &pdev->dev;
151 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
152 regs = devm_ioremap_resource(&pdev->dev, res);
153 if (IS_ERR(regs)) {
154 ret = PTR_ERR(regs);
155 goto err;
158 das->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
159 &tegra20_das_regmap_config);
160 if (IS_ERR(das->regmap)) {
161 dev_err(&pdev->dev, "regmap init failed\n");
162 ret = PTR_ERR(das->regmap);
163 goto err;
166 ret = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_1,
167 TEGRA20_DAS_DAP_SEL_DAC1);
168 if (ret) {
169 dev_err(&pdev->dev, "Can't set up DAS DAP connection\n");
170 goto err;
172 ret = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAC_ID_1,
173 TEGRA20_DAS_DAC_SEL_DAP1);
174 if (ret) {
175 dev_err(&pdev->dev, "Can't set up DAS DAC connection\n");
176 goto err;
179 ret = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_3,
180 TEGRA20_DAS_DAP_SEL_DAC3);
181 if (ret) {
182 dev_err(&pdev->dev, "Can't set up DAS DAP connection\n");
183 goto err;
185 ret = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAC_ID_3,
186 TEGRA20_DAS_DAC_SEL_DAP3);
187 if (ret) {
188 dev_err(&pdev->dev, "Can't set up DAS DAC connection\n");
189 goto err;
192 platform_set_drvdata(pdev, das);
194 return 0;
196 err:
197 das = NULL;
198 return ret;
201 static int tegra20_das_remove(struct platform_device *pdev)
203 if (!das)
204 return -ENODEV;
206 das = NULL;
208 return 0;
211 static const struct of_device_id tegra20_das_of_match[] = {
212 { .compatible = "nvidia,tegra20-das", },
216 static struct platform_driver tegra20_das_driver = {
217 .probe = tegra20_das_probe,
218 .remove = tegra20_das_remove,
219 .driver = {
220 .name = DRV_NAME,
221 .of_match_table = tegra20_das_of_match,
224 module_platform_driver(tegra20_das_driver);
226 MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
227 MODULE_DESCRIPTION("Tegra20 DAS driver");
228 MODULE_LICENSE("GPL");
229 MODULE_ALIAS("platform:" DRV_NAME);
230 MODULE_DEVICE_TABLE(of, tegra20_das_of_match);