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dmaengine: imx-sdma: Let the core do the device node validation
[linux/fpc-iii.git] / drivers / net / wireless / intel / iwlegacy / 4965.c
bloba20b6c885047bac9812d44a58f9f346b132b29dc
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/sched.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <net/mac80211.h>
36 #include <linux/etherdevice.h>
37 #include <asm/unaligned.h>
38
39 #include "common.h"
40 #include "4965.h"
41
42 /**
43 * il_verify_inst_sparse - verify runtime uCode image in card vs. host,
44 * using sample data 100 bytes apart. If these sample points are good,
45 * it's a pretty good bet that everything between them is good, too.
46 */
47 static int
48 il4965_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
49 {
50 u32 val;
51 int ret = 0;
52 u32 errcnt = 0;
53 u32 i;
54
55 D_INFO("ucode inst image size is %u\n", len);
56
57 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
58 /* read data comes through single port, auto-incr addr */
59 /* NOTE: Use the debugless read so we don't flood kernel log
60 * if IL_DL_IO is set */
61 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL4965_RTC_INST_LOWER_BOUND);
62 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
63 if (val != le32_to_cpu(*image)) {
64 ret = -EIO;
65 errcnt++;
66 if (errcnt >= 3)
67 break;
68 }
69 }
70
71 return ret;
72 }
73
74 /**
75 * il4965_verify_inst_full - verify runtime uCode image in card vs. host,
76 * looking at all data.
77 */
78 static int
79 il4965_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
80 {
81 u32 val;
82 u32 save_len = len;
83 int ret = 0;
84 u32 errcnt;
85
86 D_INFO("ucode inst image size is %u\n", len);
87
88 il_wr(il, HBUS_TARG_MEM_RADDR, IL4965_RTC_INST_LOWER_BOUND);
89
90 errcnt = 0;
91 for (; len > 0; len -= sizeof(u32), image++) {
92 /* read data comes through single port, auto-incr addr */
93 /* NOTE: Use the debugless read so we don't flood kernel log
94 * if IL_DL_IO is set */
95 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
96 if (val != le32_to_cpu(*image)) {
97 IL_ERR("uCode INST section is invalid at "
98 "offset 0x%x, is 0x%x, s/b 0x%x\n",
99 save_len - len, val, le32_to_cpu(*image));
100 ret = -EIO;
101 errcnt++;
102 if (errcnt >= 20)
103 break;
104 }
105 }
106
107 if (!errcnt)
108 D_INFO("ucode image in INSTRUCTION memory is good\n");
109
110 return ret;
111 }
112
113 /**
114 * il4965_verify_ucode - determine which instruction image is in SRAM,
115 * and verify its contents
116 */
117 int
118 il4965_verify_ucode(struct il_priv *il)
119 {
120 __le32 *image;
121 u32 len;
122 int ret;
123
124 /* Try bootstrap */
125 image = (__le32 *) il->ucode_boot.v_addr;
126 len = il->ucode_boot.len;
127 ret = il4965_verify_inst_sparse(il, image, len);
128 if (!ret) {
129 D_INFO("Bootstrap uCode is good in inst SRAM\n");
130 return 0;
131 }
132
133 /* Try initialize */
134 image = (__le32 *) il->ucode_init.v_addr;
135 len = il->ucode_init.len;
136 ret = il4965_verify_inst_sparse(il, image, len);
137 if (!ret) {
138 D_INFO("Initialize uCode is good in inst SRAM\n");
139 return 0;
140 }
141
142 /* Try runtime/protocol */
143 image = (__le32 *) il->ucode_code.v_addr;
144 len = il->ucode_code.len;
145 ret = il4965_verify_inst_sparse(il, image, len);
146 if (!ret) {
147 D_INFO("Runtime uCode is good in inst SRAM\n");
148 return 0;
149 }
150
151 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
152
153 /* Since nothing seems to match, show first several data entries in
154 * instruction SRAM, so maybe visual inspection will give a clue.
155 * Selection of bootstrap image (vs. other images) is arbitrary. */
156 image = (__le32 *) il->ucode_boot.v_addr;
157 len = il->ucode_boot.len;
158 ret = il4965_verify_inst_full(il, image, len);
159
160 return ret;
161 }
162
163 /******************************************************************************
164 *
165 * EEPROM related functions
166 *
167 ******************************************************************************/
168
169 /*
170 * The device's EEPROM semaphore prevents conflicts between driver and uCode
171 * when accessing the EEPROM; each access is a series of pulses to/from the
172 * EEPROM chip, not a single event, so even reads could conflict if they
173 * weren't arbitrated by the semaphore.
174 */
175 int
176 il4965_eeprom_acquire_semaphore(struct il_priv *il)
177 {
178 u16 count;
179 int ret;
180
181 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
182 /* Request semaphore */
183 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
184 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
185
186 /* See if we got it */
187 ret =
188 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
189 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
190 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
191 EEPROM_SEM_TIMEOUT);
192 if (ret >= 0)
193 return ret;
194 }
195
196 return ret;
197 }
198
199 void
200 il4965_eeprom_release_semaphore(struct il_priv *il)
201 {
202 il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
203 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
204
205 }
206
207 int
208 il4965_eeprom_check_version(struct il_priv *il)
209 {
210 u16 eeprom_ver;
211 u16 calib_ver;
212
213 eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION);
214 calib_ver = il_eeprom_query16(il, EEPROM_4965_CALIB_VERSION_OFFSET);
215
216 if (eeprom_ver < il->cfg->eeprom_ver ||
217 calib_ver < il->cfg->eeprom_calib_ver)
218 goto err;
219
220 IL_INFO("device EEPROM VER=0x%x, CALIB=0x%x\n", eeprom_ver, calib_ver);
221
222 return 0;
223 err:
224 IL_ERR("Unsupported (too old) EEPROM VER=0x%x < 0x%x "
225 "CALIB=0x%x < 0x%x\n", eeprom_ver, il->cfg->eeprom_ver,
226 calib_ver, il->cfg->eeprom_calib_ver);
227 return -EINVAL;
228
229 }
230
231 void
232 il4965_eeprom_get_mac(const struct il_priv *il, u8 * mac)
233 {
234 const u8 *addr = il_eeprom_query_addr(il,
235 EEPROM_MAC_ADDRESS);
236 memcpy(mac, addr, ETH_ALEN);
237 }
238
239 /* Send led command */
240 static int
241 il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
242 {
243 struct il_host_cmd cmd = {
244 .id = C_LEDS,
245 .len = sizeof(struct il_led_cmd),
246 .data = led_cmd,
247 .flags = CMD_ASYNC,
248 .callback = NULL,
249 };
250 u32 reg;
251
252 reg = _il_rd(il, CSR_LED_REG);
253 if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
254 _il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
255
256 return il_send_cmd(il, &cmd);
257 }
258
259 /* Set led register off */
260 void
261 il4965_led_enable(struct il_priv *il)
262 {
263 _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
264 }
265
266 static int il4965_send_tx_power(struct il_priv *il);
267 static int il4965_hw_get_temperature(struct il_priv *il);
268
269 /* Highest firmware API version supported */
270 #define IL4965_UCODE_API_MAX 2
271
272 /* Lowest firmware API version supported */
273 #define IL4965_UCODE_API_MIN 2
274
275 #define IL4965_FW_PRE "iwlwifi-4965-"
276 #define _IL4965_MODULE_FIRMWARE(api) IL4965_FW_PRE #api ".ucode"
277 #define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api)
278
279 /* check contents of special bootstrap uCode SRAM */
280 static int
281 il4965_verify_bsm(struct il_priv *il)
282 {
283 __le32 *image = il->ucode_boot.v_addr;
284 u32 len = il->ucode_boot.len;
285 u32 reg;
286 u32 val;
287
288 D_INFO("Begin verify bsm\n");
289
290 /* verify BSM SRAM contents */
291 val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
292 for (reg = BSM_SRAM_LOWER_BOUND; reg < BSM_SRAM_LOWER_BOUND + len;
293 reg += sizeof(u32), image++) {
294 val = il_rd_prph(il, reg);
295 if (val != le32_to_cpu(*image)) {
296 IL_ERR("BSM uCode verification failed at "
297 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
298 BSM_SRAM_LOWER_BOUND, reg - BSM_SRAM_LOWER_BOUND,
299 len, val, le32_to_cpu(*image));
300 return -EIO;
301 }
302 }
303
304 D_INFO("BSM bootstrap uCode image OK\n");
305
306 return 0;
307 }
308
309 /**
310 * il4965_load_bsm - Load bootstrap instructions
311 *
312 * BSM operation:
313 *
314 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
315 * in special SRAM that does not power down during RFKILL. When powering back
316 * up after power-saving sleeps (or during initial uCode load), the BSM loads
317 * the bootstrap program into the on-board processor, and starts it.
318 *
319 * The bootstrap program loads (via DMA) instructions and data for a new
320 * program from host DRAM locations indicated by the host driver in the
321 * BSM_DRAM_* registers. Once the new program is loaded, it starts
322 * automatically.
323 *
324 * When initializing the NIC, the host driver points the BSM to the
325 * "initialize" uCode image. This uCode sets up some internal data, then
326 * notifies host via "initialize alive" that it is complete.
327 *
328 * The host then replaces the BSM_DRAM_* pointer values to point to the
329 * normal runtime uCode instructions and a backup uCode data cache buffer
330 * (filled initially with starting data values for the on-board processor),
331 * then triggers the "initialize" uCode to load and launch the runtime uCode,
332 * which begins normal operation.
333 *
334 * When doing a power-save shutdown, runtime uCode saves data SRAM into
335 * the backup data cache in DRAM before SRAM is powered down.
336 *
337 * When powering back up, the BSM loads the bootstrap program. This reloads
338 * the runtime uCode instructions and the backup data cache into SRAM,
339 * and re-launches the runtime uCode from where it left off.
340 */
341 static int
342 il4965_load_bsm(struct il_priv *il)
343 {
344 __le32 *image = il->ucode_boot.v_addr;
345 u32 len = il->ucode_boot.len;
346 dma_addr_t pinst;
347 dma_addr_t pdata;
348 u32 inst_len;
349 u32 data_len;
350 int i;
351 u32 done;
352 u32 reg_offset;
353 int ret;
354
355 D_INFO("Begin load bsm\n");
356
357 il->ucode_type = UCODE_RT;
358
359 /* make sure bootstrap program is no larger than BSM's SRAM size */
360 if (len > IL49_MAX_BSM_SIZE)
361 return -EINVAL;
362
363 /* Tell bootstrap uCode where to find the "Initialize" uCode
364 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
365 * NOTE: il_init_alive_start() will replace these values,
366 * after the "initialize" uCode has run, to point to
367 * runtime/protocol instructions and backup data cache.
368 */
369 pinst = il->ucode_init.p_addr >> 4;
370 pdata = il->ucode_init_data.p_addr >> 4;
371 inst_len = il->ucode_init.len;
372 data_len = il->ucode_init_data.len;
373
374 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
375 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
376 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
377 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
378
379 /* Fill BSM memory with bootstrap instructions */
380 for (reg_offset = BSM_SRAM_LOWER_BOUND;
381 reg_offset < BSM_SRAM_LOWER_BOUND + len;
382 reg_offset += sizeof(u32), image++)
383 _il_wr_prph(il, reg_offset, le32_to_cpu(*image));
384
385 ret = il4965_verify_bsm(il);
386 if (ret)
387 return ret;
388
389 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
390 il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
391 il_wr_prph(il, BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND);
392 il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
393
394 /* Load bootstrap code into instruction SRAM now,
395 * to prepare to load "initialize" uCode */
396 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
397
398 /* Wait for load of bootstrap uCode to finish */
399 for (i = 0; i < 100; i++) {
400 done = il_rd_prph(il, BSM_WR_CTRL_REG);
401 if (!(done & BSM_WR_CTRL_REG_BIT_START))
402 break;
403 udelay(10);
404 }
405 if (i < 100)
406 D_INFO("BSM write complete, poll %d iterations\n", i);
407 else {
408 IL_ERR("BSM write did not complete!\n");
409 return -EIO;
410 }
411
412 /* Enable future boot loads whenever power management unit triggers it
413 * (e.g. when powering back up after power-save shutdown) */
414 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
415
416 return 0;
417 }
418
419 /**
420 * il4965_set_ucode_ptrs - Set uCode address location
421 *
422 * Tell initialization uCode where to find runtime uCode.
423 *
424 * BSM registers initially contain pointers to initialization uCode.
425 * We need to replace them to load runtime uCode inst and data,
426 * and to save runtime data when powering down.
427 */
428 static int
429 il4965_set_ucode_ptrs(struct il_priv *il)
430 {
431 dma_addr_t pinst;
432 dma_addr_t pdata;
433 int ret = 0;
434
435 /* bits 35:4 for 4965 */
436 pinst = il->ucode_code.p_addr >> 4;
437 pdata = il->ucode_data_backup.p_addr >> 4;
438
439 /* Tell bootstrap uCode where to find image to load */
440 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
441 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
442 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
443
444 /* Inst byte count must be last to set up, bit 31 signals uCode
445 * that all new ptr/size info is in place */
446 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
447 il->ucode_code.len | BSM_DRAM_INST_LOAD);
448 D_INFO("Runtime uCode pointers are set.\n");
449
450 return ret;
451 }
452
453 /**
454 * il4965_init_alive_start - Called after N_ALIVE notification received
455 *
456 * Called after N_ALIVE notification received from "initialize" uCode.
457 *
458 * The 4965 "initialize" ALIVE reply contains calibration data for:
459 * Voltage, temperature, and MIMO tx gain correction, now stored in il
460 * (3945 does not contain this data).
461 *
462 * Tell "initialize" uCode to go ahead and load the runtime uCode.
463 */
464 static void
465 il4965_init_alive_start(struct il_priv *il)
466 {
467 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
468 * This is a paranoid check, because we would not have gotten the
469 * "initialize" alive if code weren't properly loaded. */
470 if (il4965_verify_ucode(il)) {
471 /* Runtime instruction load was bad;
472 * take it all the way back down so we can try again */
473 D_INFO("Bad \"initialize\" uCode load.\n");
474 goto restart;
475 }
476
477 /* Calculate temperature */
478 il->temperature = il4965_hw_get_temperature(il);
479
480 /* Send pointers to protocol/runtime uCode image ... init code will
481 * load and launch runtime uCode, which will send us another "Alive"
482 * notification. */
483 D_INFO("Initialization Alive received.\n");
484 if (il4965_set_ucode_ptrs(il)) {
485 /* Runtime instruction load won't happen;
486 * take it all the way back down so we can try again */
487 D_INFO("Couldn't set up uCode pointers.\n");
488 goto restart;
489 }
490 return;
491
492 restart:
493 queue_work(il->workqueue, &il->restart);
494 }
495
496 static bool
497 iw4965_is_ht40_channel(__le32 rxon_flags)
498 {
499 int chan_mod =
500 le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK) >>
501 RXON_FLG_CHANNEL_MODE_POS;
502 return (chan_mod == CHANNEL_MODE_PURE_40 ||
503 chan_mod == CHANNEL_MODE_MIXED);
504 }
505
506 void
507 il4965_nic_config(struct il_priv *il)
508 {
509 unsigned long flags;
510 u16 radio_cfg;
511
512 spin_lock_irqsave(&il->lock, flags);
513
514 radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG);
515
516 /* write radio config values to register */
517 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
518 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
519 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
520 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
521 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
522
523 /* set CSR_HW_CONFIG_REG for uCode use */
524 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
525 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
526 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
527
528 il->calib_info =
529 (struct il_eeprom_calib_info *)
530 il_eeprom_query_addr(il, EEPROM_4965_CALIB_TXPOWER_OFFSET);
531
532 spin_unlock_irqrestore(&il->lock, flags);
533 }
534
535 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
536 * Called after every association, but this runs only once!
537 * ... once chain noise is calibrated the first time, it's good forever. */
538 static void
539 il4965_chain_noise_reset(struct il_priv *il)
540 {
541 struct il_chain_noise_data *data = &(il->chain_noise_data);
542
543 if (data->state == IL_CHAIN_NOISE_ALIVE && il_is_any_associated(il)) {
544 struct il_calib_diff_gain_cmd cmd;
545
546 /* clear data for chain noise calibration algorithm */
547 data->chain_noise_a = 0;
548 data->chain_noise_b = 0;
549 data->chain_noise_c = 0;
550 data->chain_signal_a = 0;
551 data->chain_signal_b = 0;
552 data->chain_signal_c = 0;
553 data->beacon_count = 0;
554
555 memset(&cmd, 0, sizeof(cmd));
556 cmd.hdr.op_code = IL_PHY_CALIBRATE_DIFF_GAIN_CMD;
557 cmd.diff_gain_a = 0;
558 cmd.diff_gain_b = 0;
559 cmd.diff_gain_c = 0;
560 if (il_send_cmd_pdu(il, C_PHY_CALIBRATION, sizeof(cmd), &cmd))
561 IL_ERR("Could not send C_PHY_CALIBRATION\n");
562 data->state = IL_CHAIN_NOISE_ACCUMULATE;
563 D_CALIB("Run chain_noise_calibrate\n");
564 }
565 }
566
567 static s32
568 il4965_math_div_round(s32 num, s32 denom, s32 * res)
569 {
570 s32 sign = 1;
571
572 if (num < 0) {
573 sign = -sign;
574 num = -num;
575 }
576 if (denom < 0) {
577 sign = -sign;
578 denom = -denom;
579 }
580 *res = ((num * 2 + denom) / (denom * 2)) * sign;
581
582 return 1;
583 }
584
585 /**
586 * il4965_get_voltage_compensation - Power supply voltage comp for txpower
587 *
588 * Determines power supply voltage compensation for txpower calculations.
589 * Returns number of 1/2-dB steps to subtract from gain table idx,
590 * to compensate for difference between power supply voltage during
591 * factory measurements, vs. current power supply voltage.
592 *
593 * Voltage indication is higher for lower voltage.
594 * Lower voltage requires more gain (lower gain table idx).
595 */
596 static s32
597 il4965_get_voltage_compensation(s32 eeprom_voltage, s32 current_voltage)
598 {
599 s32 comp = 0;
600
601 if (TX_POWER_IL_ILLEGAL_VOLTAGE == eeprom_voltage ||
602 TX_POWER_IL_ILLEGAL_VOLTAGE == current_voltage)
603 return 0;
604
605 il4965_math_div_round(current_voltage - eeprom_voltage,
606 TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp);
607
608 if (current_voltage > eeprom_voltage)
609 comp *= 2;
610 if ((comp < -2) || (comp > 2))
611 comp = 0;
612
613 return comp;
614 }
615
616 static s32
617 il4965_get_tx_atten_grp(u16 channel)
618 {
619 if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH &&
620 channel <= CALIB_IL_TX_ATTEN_GR5_LCH)
621 return CALIB_CH_GROUP_5;
622
623 if (channel >= CALIB_IL_TX_ATTEN_GR1_FCH &&
624 channel <= CALIB_IL_TX_ATTEN_GR1_LCH)
625 return CALIB_CH_GROUP_1;
626
627 if (channel >= CALIB_IL_TX_ATTEN_GR2_FCH &&
628 channel <= CALIB_IL_TX_ATTEN_GR2_LCH)
629 return CALIB_CH_GROUP_2;
630
631 if (channel >= CALIB_IL_TX_ATTEN_GR3_FCH &&
632 channel <= CALIB_IL_TX_ATTEN_GR3_LCH)
633 return CALIB_CH_GROUP_3;
634
635 if (channel >= CALIB_IL_TX_ATTEN_GR4_FCH &&
636 channel <= CALIB_IL_TX_ATTEN_GR4_LCH)
637 return CALIB_CH_GROUP_4;
638
639 return -EINVAL;
640 }
641
642 static u32
643 il4965_get_sub_band(const struct il_priv *il, u32 channel)
644 {
645 s32 b = -1;
646
647 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
648 if (il->calib_info->band_info[b].ch_from == 0)
649 continue;
650
651 if (channel >= il->calib_info->band_info[b].ch_from &&
652 channel <= il->calib_info->band_info[b].ch_to)
653 break;
654 }
655
656 return b;
657 }
658
659 static s32
660 il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
661 {
662 s32 val;
663
664 if (x2 == x1)
665 return y1;
666 else {
667 il4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
668 return val + y2;
669 }
670 }
671
672 /**
673 * il4965_interpolate_chan - Interpolate factory measurements for one channel
674 *
675 * Interpolates factory measurements from the two sample channels within a
676 * sub-band, to apply to channel of interest. Interpolation is proportional to
677 * differences in channel frequencies, which is proportional to differences
678 * in channel number.
679 */
680 static int
681 il4965_interpolate_chan(struct il_priv *il, u32 channel,
682 struct il_eeprom_calib_ch_info *chan_info)
683 {
684 s32 s = -1;
685 u32 c;
686 u32 m;
687 const struct il_eeprom_calib_measure *m1;
688 const struct il_eeprom_calib_measure *m2;
689 struct il_eeprom_calib_measure *omeas;
690 u32 ch_i1;
691 u32 ch_i2;
692
693 s = il4965_get_sub_band(il, channel);
694 if (s >= EEPROM_TX_POWER_BANDS) {
695 IL_ERR("Tx Power can not find channel %d\n", channel);
696 return -1;
697 }
698
699 ch_i1 = il->calib_info->band_info[s].ch1.ch_num;
700 ch_i2 = il->calib_info->band_info[s].ch2.ch_num;
701 chan_info->ch_num = (u8) channel;
702
703 D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n", channel, s,
704 ch_i1, ch_i2);
705
706 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
707 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
708 m1 = &(il->calib_info->band_info[s].ch1.
709 measurements[c][m]);
710 m2 = &(il->calib_info->band_info[s].ch2.
711 measurements[c][m]);
712 omeas = &(chan_info->measurements[c][m]);
713
714 omeas->actual_pow =
715 (u8) il4965_interpolate_value(channel, ch_i1,
716 m1->actual_pow, ch_i2,
717 m2->actual_pow);
718 omeas->gain_idx =
719 (u8) il4965_interpolate_value(channel, ch_i1,
720 m1->gain_idx, ch_i2,
721 m2->gain_idx);
722 omeas->temperature =
723 (u8) il4965_interpolate_value(channel, ch_i1,
724 m1->temperature,
725 ch_i2,
726 m2->temperature);
727 omeas->pa_det =
728 (s8) il4965_interpolate_value(channel, ch_i1,
729 m1->pa_det, ch_i2,
730 m2->pa_det);
731
732 D_TXPOWER("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c,
733 m, m1->actual_pow, m2->actual_pow,
734 omeas->actual_pow);
735 D_TXPOWER("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c,
736 m, m1->gain_idx, m2->gain_idx,
737 omeas->gain_idx);
738 D_TXPOWER("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c,
739 m, m1->pa_det, m2->pa_det, omeas->pa_det);
740 D_TXPOWER("chain %d meas %d T1=%d T2=%d T=%d\n", c,
741 m, m1->temperature, m2->temperature,
742 omeas->temperature);
743 }
744 }
745
746 return 0;
747 }
748
749 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
750 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
751 static s32 back_off_table[] = {
752 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
753 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
754 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
755 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
756 10 /* CCK */
757 };
758
759 /* Thermal compensation values for txpower for various frequency ranges ...
760 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
761 static struct il4965_txpower_comp_entry {
762 s32 degrees_per_05db_a;
763 s32 degrees_per_05db_a_denom;
764 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
765 {
766 9, 2}, /* group 0 5.2, ch 34-43 */
767 {
768 4, 1}, /* group 1 5.2, ch 44-70 */
769 {
770 4, 1}, /* group 2 5.2, ch 71-124 */
771 {
772 4, 1}, /* group 3 5.2, ch 125-200 */
773 {
774 3, 1} /* group 4 2.4, ch all */
775 };
776
777 static s32
778 get_min_power_idx(s32 rate_power_idx, u32 band)
779 {
780 if (!band) {
781 if ((rate_power_idx & 7) <= 4)
782 return MIN_TX_GAIN_IDX_52GHZ_EXT;
783 }
784 return MIN_TX_GAIN_IDX;
785 }
786
787 struct gain_entry {
788 u8 dsp;
789 u8 radio;
790 };
791
792 static const struct gain_entry gain_table[2][108] = {
793 /* 5.2GHz power gain idx table */
794 {
795 {123, 0x3F}, /* highest txpower */
796 {117, 0x3F},
797 {110, 0x3F},
798 {104, 0x3F},
799 {98, 0x3F},
800 {110, 0x3E},
801 {104, 0x3E},
802 {98, 0x3E},
803 {110, 0x3D},
804 {104, 0x3D},
805 {98, 0x3D},
806 {110, 0x3C},
807 {104, 0x3C},
808 {98, 0x3C},
809 {110, 0x3B},
810 {104, 0x3B},
811 {98, 0x3B},
812 {110, 0x3A},
813 {104, 0x3A},
814 {98, 0x3A},
815 {110, 0x39},
816 {104, 0x39},
817 {98, 0x39},
818 {110, 0x38},
819 {104, 0x38},
820 {98, 0x38},
821 {110, 0x37},
822 {104, 0x37},
823 {98, 0x37},
824 {110, 0x36},
825 {104, 0x36},
826 {98, 0x36},
827 {110, 0x35},
828 {104, 0x35},
829 {98, 0x35},
830 {110, 0x34},
831 {104, 0x34},
832 {98, 0x34},
833 {110, 0x33},
834 {104, 0x33},
835 {98, 0x33},
836 {110, 0x32},
837 {104, 0x32},
838 {98, 0x32},
839 {110, 0x31},
840 {104, 0x31},
841 {98, 0x31},
842 {110, 0x30},
843 {104, 0x30},
844 {98, 0x30},
845 {110, 0x25},
846 {104, 0x25},
847 {98, 0x25},
848 {110, 0x24},
849 {104, 0x24},
850 {98, 0x24},
851 {110, 0x23},
852 {104, 0x23},
853 {98, 0x23},
854 {110, 0x22},
855 {104, 0x18},
856 {98, 0x18},
857 {110, 0x17},
858 {104, 0x17},
859 {98, 0x17},
860 {110, 0x16},
861 {104, 0x16},
862 {98, 0x16},
863 {110, 0x15},
864 {104, 0x15},
865 {98, 0x15},
866 {110, 0x14},
867 {104, 0x14},
868 {98, 0x14},
869 {110, 0x13},
870 {104, 0x13},
871 {98, 0x13},
872 {110, 0x12},
873 {104, 0x08},
874 {98, 0x08},
875 {110, 0x07},
876 {104, 0x07},
877 {98, 0x07},
878 {110, 0x06},
879 {104, 0x06},
880 {98, 0x06},
881 {110, 0x05},
882 {104, 0x05},
883 {98, 0x05},
884 {110, 0x04},
885 {104, 0x04},
886 {98, 0x04},
887 {110, 0x03},
888 {104, 0x03},
889 {98, 0x03},
890 {110, 0x02},
891 {104, 0x02},
892 {98, 0x02},
893 {110, 0x01},
894 {104, 0x01},
895 {98, 0x01},
896 {110, 0x00},
897 {104, 0x00},
898 {98, 0x00},
899 {93, 0x00},
900 {88, 0x00},
901 {83, 0x00},
902 {78, 0x00},
903 },
904 /* 2.4GHz power gain idx table */
905 {
906 {110, 0x3f}, /* highest txpower */
907 {104, 0x3f},
908 {98, 0x3f},
909 {110, 0x3e},
910 {104, 0x3e},
911 {98, 0x3e},
912 {110, 0x3d},
913 {104, 0x3d},
914 {98, 0x3d},
915 {110, 0x3c},
916 {104, 0x3c},
917 {98, 0x3c},
918 {110, 0x3b},
919 {104, 0x3b},
920 {98, 0x3b},
921 {110, 0x3a},
922 {104, 0x3a},
923 {98, 0x3a},
924 {110, 0x39},
925 {104, 0x39},
926 {98, 0x39},
927 {110, 0x38},
928 {104, 0x38},
929 {98, 0x38},
930 {110, 0x37},
931 {104, 0x37},
932 {98, 0x37},
933 {110, 0x36},
934 {104, 0x36},
935 {98, 0x36},
936 {110, 0x35},
937 {104, 0x35},
938 {98, 0x35},
939 {110, 0x34},
940 {104, 0x34},
941 {98, 0x34},
942 {110, 0x33},
943 {104, 0x33},
944 {98, 0x33},
945 {110, 0x32},
946 {104, 0x32},
947 {98, 0x32},
948 {110, 0x31},
949 {104, 0x31},
950 {98, 0x31},
951 {110, 0x30},
952 {104, 0x30},
953 {98, 0x30},
954 {110, 0x6},
955 {104, 0x6},
956 {98, 0x6},
957 {110, 0x5},
958 {104, 0x5},
959 {98, 0x5},
960 {110, 0x4},
961 {104, 0x4},
962 {98, 0x4},
963 {110, 0x3},
964 {104, 0x3},
965 {98, 0x3},
966 {110, 0x2},
967 {104, 0x2},
968 {98, 0x2},
969 {110, 0x1},
970 {104, 0x1},
971 {98, 0x1},
972 {110, 0x0},
973 {104, 0x0},
974 {98, 0x0},
975 {97, 0},
976 {96, 0},
977 {95, 0},
978 {94, 0},
979 {93, 0},
980 {92, 0},
981 {91, 0},
982 {90, 0},
983 {89, 0},
984 {88, 0},
985 {87, 0},
986 {86, 0},
987 {85, 0},
988 {84, 0},
989 {83, 0},
990 {82, 0},
991 {81, 0},
992 {80, 0},
993 {79, 0},
994 {78, 0},
995 {77, 0},
996 {76, 0},
997 {75, 0},
998 {74, 0},
999 {73, 0},
1000 {72, 0},
1001 {71, 0},
1002 {70, 0},
1003 {69, 0},
1004 {68, 0},
1005 {67, 0},
1006 {66, 0},
1007 {65, 0},
1008 {64, 0},
1009 {63, 0},
1010 {62, 0},
1011 {61, 0},
1012 {60, 0},
1013 {59, 0},
1014 }
1015 };
1016
1017 static int
1018 il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, u8 is_ht40,
1019 u8 ctrl_chan_high,
1020 struct il4965_tx_power_db *tx_power_tbl)
1021 {
1022 u8 saturation_power;
1023 s32 target_power;
1024 s32 user_target_power;
1025 s32 power_limit;
1026 s32 current_temp;
1027 s32 reg_limit;
1028 s32 current_regulatory;
1029 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1030 int i;
1031 int c;
1032 const struct il_channel_info *ch_info = NULL;
1033 struct il_eeprom_calib_ch_info ch_eeprom_info;
1034 const struct il_eeprom_calib_measure *measurement;
1035 s16 voltage;
1036 s32 init_voltage;
1037 s32 voltage_compensation;
1038 s32 degrees_per_05db_num;
1039 s32 degrees_per_05db_denom;
1040 s32 factory_temp;
1041 s32 temperature_comp[2];
1042 s32 factory_gain_idx[2];
1043 s32 factory_actual_pwr[2];
1044 s32 power_idx;
1045
1046 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1047 * are used for idxing into txpower table) */
1048 user_target_power = 2 * il->tx_power_user_lmt;
1049
1050 /* Get current (RXON) channel, band, width */
1051 D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band, is_ht40);
1052
1053 ch_info = il_get_channel_info(il, il->band, channel);
1054
1055 if (!il_is_channel_valid(ch_info))
1056 return -EINVAL;
1057
1058 /* get txatten group, used to select 1) thermal txpower adjustment
1059 * and 2) mimo txpower balance between Tx chains. */
1060 txatten_grp = il4965_get_tx_atten_grp(channel);
1061 if (txatten_grp < 0) {
1062 IL_ERR("Can't find txatten group for channel %d.\n", channel);
1063 return txatten_grp;
1064 }
1065
1066 D_TXPOWER("channel %d belongs to txatten group %d\n", channel,
1067 txatten_grp);
1068
1069 if (is_ht40) {
1070 if (ctrl_chan_high)
1071 channel -= 2;
1072 else
1073 channel += 2;
1074 }
1075
1076 /* hardware txpower limits ...
1077 * saturation (clipping distortion) txpowers are in half-dBm */
1078 if (band)
1079 saturation_power = il->calib_info->saturation_power24;
1080 else
1081 saturation_power = il->calib_info->saturation_power52;
1082
1083 if (saturation_power < IL_TX_POWER_SATURATION_MIN ||
1084 saturation_power > IL_TX_POWER_SATURATION_MAX) {
1085 if (band)
1086 saturation_power = IL_TX_POWER_DEFAULT_SATURATION_24;
1087 else
1088 saturation_power = IL_TX_POWER_DEFAULT_SATURATION_52;
1089 }
1090
1091 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1092 * max_power_avg values are in dBm, convert * 2 */
1093 if (is_ht40)
1094 reg_limit = ch_info->ht40_max_power_avg * 2;
1095 else
1096 reg_limit = ch_info->max_power_avg * 2;
1097
1098 if ((reg_limit < IL_TX_POWER_REGULATORY_MIN) ||
1099 (reg_limit > IL_TX_POWER_REGULATORY_MAX)) {
1100 if (band)
1101 reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_24;
1102 else
1103 reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_52;
1104 }
1105
1106 /* Interpolate txpower calibration values for this channel,
1107 * based on factory calibration tests on spaced channels. */
1108 il4965_interpolate_chan(il, channel, &ch_eeprom_info);
1109
1110 /* calculate tx gain adjustment based on power supply voltage */
1111 voltage = le16_to_cpu(il->calib_info->voltage);
1112 init_voltage = (s32) le32_to_cpu(il->card_alive_init.voltage);
1113 voltage_compensation =
1114 il4965_get_voltage_compensation(voltage, init_voltage);
1115
1116 D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n", init_voltage,
1117 voltage, voltage_compensation);
1118
1119 /* get current temperature (Celsius) */
1120 current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN);
1121 current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX);
1122 current_temp = KELVIN_TO_CELSIUS(current_temp);
1123
1124 /* select thermal txpower adjustment params, based on channel group
1125 * (same frequency group used for mimo txatten adjustment) */
1126 degrees_per_05db_num =
1127 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1128 degrees_per_05db_denom =
1129 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1130
1131 /* get per-chain txpower values from factory measurements */
1132 for (c = 0; c < 2; c++) {
1133 measurement = &ch_eeprom_info.measurements[c][1];
1134
1135 /* txgain adjustment (in half-dB steps) based on difference
1136 * between factory and current temperature */
1137 factory_temp = measurement->temperature;
1138 il4965_math_div_round((current_temp -
1139 factory_temp) * degrees_per_05db_denom,
1140 degrees_per_05db_num,
1141 &temperature_comp[c]);
1142
1143 factory_gain_idx[c] = measurement->gain_idx;
1144 factory_actual_pwr[c] = measurement->actual_pow;
1145
1146 D_TXPOWER("chain = %d\n", c);
1147 D_TXPOWER("fctry tmp %d, " "curr tmp %d, comp %d steps\n",
1148 factory_temp, current_temp, temperature_comp[c]);
1149
1150 D_TXPOWER("fctry idx %d, fctry pwr %d\n", factory_gain_idx[c],
1151 factory_actual_pwr[c]);
1152 }
1153
1154 /* for each of 33 bit-rates (including 1 for CCK) */
1155 for (i = 0; i < POWER_TBL_NUM_ENTRIES; i++) {
1156 u8 is_mimo_rate;
1157 union il4965_tx_power_dual_stream tx_power;
1158
1159 /* for mimo, reduce each chain's txpower by half
1160 * (3dB, 6 steps), so total output power is regulatory
1161 * compliant. */
1162 if (i & 0x8) {
1163 current_regulatory =
1164 reg_limit -
1165 IL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1166 is_mimo_rate = 1;
1167 } else {
1168 current_regulatory = reg_limit;
1169 is_mimo_rate = 0;
1170 }
1171
1172 /* find txpower limit, either hardware or regulatory */
1173 power_limit = saturation_power - back_off_table[i];
1174 if (power_limit > current_regulatory)
1175 power_limit = current_regulatory;
1176
1177 /* reduce user's txpower request if necessary
1178 * for this rate on this channel */
1179 target_power = user_target_power;
1180 if (target_power > power_limit)
1181 target_power = power_limit;
1182
1183 D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n", i,
1184 saturation_power - back_off_table[i],
1185 current_regulatory, user_target_power, target_power);
1186
1187 /* for each of 2 Tx chains (radio transmitters) */
1188 for (c = 0; c < 2; c++) {
1189 s32 atten_value;
1190
1191 if (is_mimo_rate)
1192 atten_value =
1193 (s32) le32_to_cpu(il->card_alive_init.
1194 tx_atten[txatten_grp][c]);
1195 else
1196 atten_value = 0;
1197
1198 /* calculate idx; higher idx means lower txpower */
1199 power_idx =
1200 (u8) (factory_gain_idx[c] -
1201 (target_power - factory_actual_pwr[c]) -
1202 temperature_comp[c] - voltage_compensation +
1203 atten_value);
1204
1205 /* D_TXPOWER("calculated txpower idx %d\n",
1206 power_idx); */
1207
1208 if (power_idx < get_min_power_idx(i, band))
1209 power_idx = get_min_power_idx(i, band);
1210
1211 /* adjust 5 GHz idx to support negative idxes */
1212 if (!band)
1213 power_idx += 9;
1214
1215 /* CCK, rate 32, reduce txpower for CCK */
1216 if (i == POWER_TBL_CCK_ENTRY)
1217 power_idx +=
1218 IL_TX_POWER_CCK_COMPENSATION_C_STEP;
1219
1220 /* stay within the table! */
1221 if (power_idx > 107) {
1222 IL_WARN("txpower idx %d > 107\n", power_idx);
1223 power_idx = 107;
1224 }
1225 if (power_idx < 0) {
1226 IL_WARN("txpower idx %d < 0\n", power_idx);
1227 power_idx = 0;
1228 }
1229
1230 /* fill txpower command for this rate/chain */
1231 tx_power.s.radio_tx_gain[c] =
1232 gain_table[band][power_idx].radio;
1233 tx_power.s.dsp_predis_atten[c] =
1234 gain_table[band][power_idx].dsp;
1235
1236 D_TXPOWER("chain %d mimo %d idx %d "
1237 "gain 0x%02x dsp %d\n", c, atten_value,
1238 power_idx, tx_power.s.radio_tx_gain[c],
1239 tx_power.s.dsp_predis_atten[c]);
1240 } /* for each chain */
1241
1242 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1243
1244 } /* for each rate */
1245
1246 return 0;
1247 }
1248
1249 /**
1250 * il4965_send_tx_power - Configure the TXPOWER level user limit
1251 *
1252 * Uses the active RXON for channel, band, and characteristics (ht40, high)
1253 * The power limit is taken from il->tx_power_user_lmt.
1254 */
1255 static int
1256 il4965_send_tx_power(struct il_priv *il)
1257 {
1258 struct il4965_txpowertable_cmd cmd = { 0 };
1259 int ret;
1260 u8 band = 0;
1261 bool is_ht40 = false;
1262 u8 ctrl_chan_high = 0;
1263
1264 if (WARN_ONCE
1265 (test_bit(S_SCAN_HW, &il->status),
1266 "TX Power requested while scanning!\n"))
1267 return -EAGAIN;
1268
1269 band = il->band == NL80211_BAND_2GHZ;
1270
1271 is_ht40 = iw4965_is_ht40_channel(il->active.flags);
1272
1273 if (is_ht40 && (il->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1274 ctrl_chan_high = 1;
1275
1276 cmd.band = band;
1277 cmd.channel = il->active.channel;
1278
1279 ret =
1280 il4965_fill_txpower_tbl(il, band, le16_to_cpu(il->active.channel),
1281 is_ht40, ctrl_chan_high, &cmd.tx_power);
1282 if (ret)
1283 goto out;
1284
1285 ret = il_send_cmd_pdu(il, C_TX_PWR_TBL, sizeof(cmd), &cmd);
1286
1287 out:
1288 return ret;
1289 }
1290
1291 static int
1292 il4965_send_rxon_assoc(struct il_priv *il)
1293 {
1294 int ret = 0;
1295 struct il4965_rxon_assoc_cmd rxon_assoc;
1296 const struct il_rxon_cmd *rxon1 = &il->staging;
1297 const struct il_rxon_cmd *rxon2 = &il->active;
1298
1299 lockdep_assert_held(&il->mutex);
1300
1301 if (rxon1->flags == rxon2->flags &&
1302 rxon1->filter_flags == rxon2->filter_flags &&
1303 rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
1304 rxon1->ofdm_ht_single_stream_basic_rates ==
1305 rxon2->ofdm_ht_single_stream_basic_rates &&
1306 rxon1->ofdm_ht_dual_stream_basic_rates ==
1307 rxon2->ofdm_ht_dual_stream_basic_rates &&
1308 rxon1->rx_chain == rxon2->rx_chain &&
1309 rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
1310 D_INFO("Using current RXON_ASSOC. Not resending.\n");
1311 return 0;
1312 }
1313
1314 rxon_assoc.flags = il->staging.flags;
1315 rxon_assoc.filter_flags = il->staging.filter_flags;
1316 rxon_assoc.ofdm_basic_rates = il->staging.ofdm_basic_rates;
1317 rxon_assoc.cck_basic_rates = il->staging.cck_basic_rates;
1318 rxon_assoc.reserved = 0;
1319 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1320 il->staging.ofdm_ht_single_stream_basic_rates;
1321 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1322 il->staging.ofdm_ht_dual_stream_basic_rates;
1323 rxon_assoc.rx_chain_select_flags = il->staging.rx_chain;
1324
1325 ret =
1326 il_send_cmd_pdu_async(il, C_RXON_ASSOC, sizeof(rxon_assoc),
1327 &rxon_assoc, NULL);
1328
1329 return ret;
1330 }
1331
1332 static int
1333 il4965_commit_rxon(struct il_priv *il)
1334 {
1335 /* cast away the const for active_rxon in this function */
1336 struct il_rxon_cmd *active_rxon = (void *)&il->active;
1337 int ret;
1338 bool new_assoc = !!(il->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
1339
1340 if (!il_is_alive(il))
1341 return -EBUSY;
1342
1343 /* always get timestamp with Rx frame */
1344 il->staging.flags |= RXON_FLG_TSF2HOST_MSK;
1345
1346 ret = il_check_rxon_cmd(il);
1347 if (ret) {
1348 IL_ERR("Invalid RXON configuration. Not committing.\n");
1349 return -EINVAL;
1350 }
1351
1352 /*
1353 * receive commit_rxon request
1354 * abort any previous channel switch if still in process
1355 */
1356 if (test_bit(S_CHANNEL_SWITCH_PENDING, &il->status) &&
1357 il->switch_channel != il->staging.channel) {
1358 D_11H("abort channel switch on %d\n",
1359 le16_to_cpu(il->switch_channel));
1360 il_chswitch_done(il, false);
1361 }
1362
1363 /* If we don't need to send a full RXON, we can use
1364 * il_rxon_assoc_cmd which is used to reconfigure filter
1365 * and other flags for the current radio configuration. */
1366 if (!il_full_rxon_required(il)) {
1367 ret = il_send_rxon_assoc(il);
1368 if (ret) {
1369 IL_ERR("Error setting RXON_ASSOC (%d)\n", ret);
1370 return ret;
1371 }
1372
1373 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1374 il_print_rx_config_cmd(il);
1375 /*
1376 * We do not commit tx power settings while channel changing,
1377 * do it now if tx power changed.
1378 */
1379 il_set_tx_power(il, il->tx_power_next, false);
1380 return 0;
1381 }
1382
1383 /* If we are currently associated and the new config requires
1384 * an RXON_ASSOC and the new config wants the associated mask enabled,
1385 * we must clear the associated from the active configuration
1386 * before we apply the new config */
1387 if (il_is_associated(il) && new_assoc) {
1388 D_INFO("Toggling associated bit on current RXON\n");
1389 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1390
1391 ret =
1392 il_send_cmd_pdu(il, C_RXON,
1393 sizeof(struct il_rxon_cmd), active_rxon);
1394
1395 /* If the mask clearing failed then we set
1396 * active_rxon back to what it was previously */
1397 if (ret) {
1398 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1399 IL_ERR("Error clearing ASSOC_MSK (%d)\n", ret);
1400 return ret;
1401 }
1402 il_clear_ucode_stations(il);
1403 il_restore_stations(il);
1404 ret = il4965_restore_default_wep_keys(il);
1405 if (ret) {
1406 IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1407 return ret;
1408 }
1409 }
1410
1411 D_INFO("Sending RXON\n" "* with%s RXON_FILTER_ASSOC_MSK\n"
1412 "* channel = %d\n" "* bssid = %pM\n", (new_assoc ? "" : "out"),
1413 le16_to_cpu(il->staging.channel), il->staging.bssid_addr);
1414
1415 il_set_rxon_hwcrypto(il, !il->cfg->mod_params->sw_crypto);
1416
1417 /* Apply the new configuration
1418 * RXON unassoc clears the station table in uCode so restoration of
1419 * stations is needed after it (the RXON command) completes
1420 */
1421 if (!new_assoc) {
1422 ret =
1423 il_send_cmd_pdu(il, C_RXON,
1424 sizeof(struct il_rxon_cmd), &il->staging);
1425 if (ret) {
1426 IL_ERR("Error setting new RXON (%d)\n", ret);
1427 return ret;
1428 }
1429 D_INFO("Return from !new_assoc RXON.\n");
1430 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1431 il_clear_ucode_stations(il);
1432 il_restore_stations(il);
1433 ret = il4965_restore_default_wep_keys(il);
1434 if (ret) {
1435 IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1436 return ret;
1437 }
1438 }
1439 if (new_assoc) {
1440 il->start_calib = 0;
1441 /* Apply the new configuration
1442 * RXON assoc doesn't clear the station table in uCode,
1443 */
1444 ret =
1445 il_send_cmd_pdu(il, C_RXON,
1446 sizeof(struct il_rxon_cmd), &il->staging);
1447 if (ret) {
1448 IL_ERR("Error setting new RXON (%d)\n", ret);
1449 return ret;
1450 }
1451 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1452 }
1453 il_print_rx_config_cmd(il);
1454
1455 il4965_init_sensitivity(il);
1456
1457 /* If we issue a new RXON command which required a tune then we must
1458 * send a new TXPOWER command or we won't be able to Tx any frames */
1459 ret = il_set_tx_power(il, il->tx_power_next, true);
1460 if (ret) {
1461 IL_ERR("Error sending TX power (%d)\n", ret);
1462 return ret;
1463 }
1464
1465 return 0;
1466 }
1467
1468 static int
1469 il4965_hw_channel_switch(struct il_priv *il,
1470 struct ieee80211_channel_switch *ch_switch)
1471 {
1472 int rc;
1473 u8 band = 0;
1474 bool is_ht40 = false;
1475 u8 ctrl_chan_high = 0;
1476 struct il4965_channel_switch_cmd cmd;
1477 const struct il_channel_info *ch_info;
1478 u32 switch_time_in_usec, ucode_switch_time;
1479 u16 ch;
1480 u32 tsf_low;
1481 u8 switch_count;
1482 u16 beacon_interval = le16_to_cpu(il->timing.beacon_interval);
1483 struct ieee80211_vif *vif = il->vif;
1484 band = (il->band == NL80211_BAND_2GHZ);
1485
1486 if (WARN_ON_ONCE(vif == NULL))
1487 return -EIO;
1488
1489 is_ht40 = iw4965_is_ht40_channel(il->staging.flags);
1490
1491 if (is_ht40 && (il->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1492 ctrl_chan_high = 1;
1493
1494 cmd.band = band;
1495 cmd.expect_beacon = 0;
1496 ch = ch_switch->chandef.chan->hw_value;
1497 cmd.channel = cpu_to_le16(ch);
1498 cmd.rxon_flags = il->staging.flags;
1499 cmd.rxon_filter_flags = il->staging.filter_flags;
1500 switch_count = ch_switch->count;
1501 tsf_low = ch_switch->timestamp & 0x0ffffffff;
1502 /*
1503 * calculate the ucode channel switch time
1504 * adding TSF as one of the factor for when to switch
1505 */
1506 if (il->ucode_beacon_time > tsf_low && beacon_interval) {
1507 if (switch_count >
1508 ((il->ucode_beacon_time - tsf_low) / beacon_interval)) {
1509 switch_count -=
1510 (il->ucode_beacon_time - tsf_low) / beacon_interval;
1511 } else
1512 switch_count = 0;
1513 }
1514 if (switch_count <= 1)
1515 cmd.switch_time = cpu_to_le32(il->ucode_beacon_time);
1516 else {
1517 switch_time_in_usec =
1518 vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
1519 ucode_switch_time =
1520 il_usecs_to_beacons(il, switch_time_in_usec,
1521 beacon_interval);
1522 cmd.switch_time =
1523 il_add_beacon_time(il, il->ucode_beacon_time,
1524 ucode_switch_time, beacon_interval);
1525 }
1526 D_11H("uCode time for the switch is 0x%x\n", cmd.switch_time);
1527 ch_info = il_get_channel_info(il, il->band, ch);
1528 if (ch_info)
1529 cmd.expect_beacon = il_is_channel_radar(ch_info);
1530 else {
1531 IL_ERR("invalid channel switch from %u to %u\n",
1532 il->active.channel, ch);
1533 return -EFAULT;
1534 }
1535
1536 rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40, ctrl_chan_high,
1537 &cmd.tx_power);
1538 if (rc) {
1539 D_11H("error:%d fill txpower_tbl\n", rc);
1540 return rc;
1541 }
1542
1543 return il_send_cmd_pdu(il, C_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1544 }
1545
1546 /**
1547 * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1548 */
1549 static void
1550 il4965_txq_update_byte_cnt_tbl(struct il_priv *il, struct il_tx_queue *txq,
1551 u16 byte_cnt)
1552 {
1553 struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr;
1554 int txq_id = txq->q.id;
1555 int write_ptr = txq->q.write_ptr;
1556 int len = byte_cnt + IL_TX_CRC_SIZE + IL_TX_DELIMITER_SIZE;
1557 __le16 bc_ent;
1558
1559 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1560
1561 bc_ent = cpu_to_le16(len & 0xFFF);
1562 /* Set up byte count within first 256 entries */
1563 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1564
1565 /* If within first 64 entries, duplicate at end */
1566 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1567 scd_bc_tbl[txq_id].tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] =
1568 bc_ent;
1569 }
1570
1571 /**
1572 * il4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1573 * @stats: Provides the temperature reading from the uCode
1574 *
1575 * A return of <0 indicates bogus data in the stats
1576 */
1577 static int
1578 il4965_hw_get_temperature(struct il_priv *il)
1579 {
1580 s32 temperature;
1581 s32 vt;
1582 s32 R1, R2, R3;
1583 u32 R4;
1584
1585 if (test_bit(S_TEMPERATURE, &il->status) &&
1586 (il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)) {
1587 D_TEMP("Running HT40 temperature calibration\n");
1588 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[1]);
1589 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[1]);
1590 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[1]);
1591 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]);
1592 } else {
1593 D_TEMP("Running temperature calibration\n");
1594 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[0]);
1595 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[0]);
1596 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[0]);
1597 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]);
1598 }
1599
1600 /*
1601 * Temperature is only 23 bits, so sign extend out to 32.
1602 *
1603 * NOTE If we haven't received a stats notification yet
1604 * with an updated temperature, use R4 provided to us in the
1605 * "initialize" ALIVE response.
1606 */
1607 if (!test_bit(S_TEMPERATURE, &il->status))
1608 vt = sign_extend32(R4, 23);
1609 else
1610 vt = sign_extend32(le32_to_cpu
1611 (il->_4965.stats.general.common.temperature),
1612 23);
1613
1614 D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1615
1616 if (R3 == R1) {
1617 IL_ERR("Calibration conflict R1 == R3\n");
1618 return -1;
1619 }
1620
1621 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1622 * Add offset to center the adjustment around 0 degrees Centigrade. */
1623 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1624 temperature /= (R3 - R1);
1625 temperature =
1626 (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1627
1628 D_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
1629 KELVIN_TO_CELSIUS(temperature));
1630
1631 return temperature;
1632 }
1633
1634 /* Adjust Txpower only if temperature variance is greater than threshold. */
1635 #define IL_TEMPERATURE_THRESHOLD 3
1636
1637 /**
1638 * il4965_is_temp_calib_needed - determines if new calibration is needed
1639 *
1640 * If the temperature changed has changed sufficiently, then a recalibration
1641 * is needed.
1642 *
1643 * Assumes caller will replace il->last_temperature once calibration
1644 * executed.
1645 */
1646 static int
1647 il4965_is_temp_calib_needed(struct il_priv *il)
1648 {
1649 int temp_diff;
1650
1651 if (!test_bit(S_STATS, &il->status)) {
1652 D_TEMP("Temperature not updated -- no stats.\n");
1653 return 0;
1654 }
1655
1656 temp_diff = il->temperature - il->last_temperature;
1657
1658 /* get absolute value */
1659 if (temp_diff < 0) {
1660 D_POWER("Getting cooler, delta %d\n", temp_diff);
1661 temp_diff = -temp_diff;
1662 } else if (temp_diff == 0)
1663 D_POWER("Temperature unchanged\n");
1664 else
1665 D_POWER("Getting warmer, delta %d\n", temp_diff);
1666
1667 if (temp_diff < IL_TEMPERATURE_THRESHOLD) {
1668 D_POWER(" => thermal txpower calib not needed\n");
1669 return 0;
1670 }
1671
1672 D_POWER(" => thermal txpower calib needed\n");
1673
1674 return 1;
1675 }
1676
1677 void
1678 il4965_temperature_calib(struct il_priv *il)
1679 {
1680 s32 temp;
1681
1682 temp = il4965_hw_get_temperature(il);
1683 if (IL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(temp))
1684 return;
1685
1686 if (il->temperature != temp) {
1687 if (il->temperature)
1688 D_TEMP("Temperature changed " "from %dC to %dC\n",
1689 KELVIN_TO_CELSIUS(il->temperature),
1690 KELVIN_TO_CELSIUS(temp));
1691 else
1692 D_TEMP("Temperature " "initialized to %dC\n",
1693 KELVIN_TO_CELSIUS(temp));
1694 }
1695
1696 il->temperature = temp;
1697 set_bit(S_TEMPERATURE, &il->status);
1698
1699 if (!il->disable_tx_power_cal &&
1700 unlikely(!test_bit(S_SCANNING, &il->status)) &&
1701 il4965_is_temp_calib_needed(il))
1702 queue_work(il->workqueue, &il->txpower_work);
1703 }
1704
1705 static u16
1706 il4965_get_hcmd_size(u8 cmd_id, u16 len)
1707 {
1708 switch (cmd_id) {
1709 case C_RXON:
1710 return (u16) sizeof(struct il4965_rxon_cmd);
1711 default:
1712 return len;
1713 }
1714 }
1715
1716 static u16
1717 il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd, u8 * data)
1718 {
1719 struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data;
1720 addsta->mode = cmd->mode;
1721 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1722 memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
1723 addsta->station_flags = cmd->station_flags;
1724 addsta->station_flags_msk = cmd->station_flags_msk;
1725 addsta->tid_disable_tx = cmd->tid_disable_tx;
1726 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1727 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1728 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1729 addsta->sleep_tx_count = cmd->sleep_tx_count;
1730 addsta->reserved1 = cpu_to_le16(0);
1731 addsta->reserved2 = cpu_to_le16(0);
1732
1733 return (u16) sizeof(struct il4965_addsta_cmd);
1734 }
1735
1736 static void
1737 il4965_post_scan(struct il_priv *il)
1738 {
1739 /*
1740 * Since setting the RXON may have been deferred while
1741 * performing the scan, fire one off if needed
1742 */
1743 if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
1744 il_commit_rxon(il);
1745 }
1746
1747 static void
1748 il4965_post_associate(struct il_priv *il)
1749 {
1750 struct ieee80211_vif *vif = il->vif;
1751 int ret = 0;
1752
1753 if (!vif || !il->is_open)
1754 return;
1755
1756 if (test_bit(S_EXIT_PENDING, &il->status))
1757 return;
1758
1759 il_scan_cancel_timeout(il, 200);
1760
1761 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1762 il_commit_rxon(il);
1763
1764 ret = il_send_rxon_timing(il);
1765 if (ret)
1766 IL_WARN("RXON timing - " "Attempting to continue.\n");
1767
1768 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
1769
1770 il_set_rxon_ht(il, &il->current_ht_config);
1771
1772 if (il->ops->set_rxon_chain)
1773 il->ops->set_rxon_chain(il);
1774
1775 il->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
1776
1777 D_ASSOC("assoc id %d beacon interval %d\n", vif->bss_conf.aid,
1778 vif->bss_conf.beacon_int);
1779
1780 if (vif->bss_conf.use_short_preamble)
1781 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1782 else
1783 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1784
1785 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
1786 if (vif->bss_conf.use_short_slot)
1787 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
1788 else
1789 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1790 }
1791
1792 il_commit_rxon(il);
1793
1794 D_ASSOC("Associated as %d to: %pM\n", vif->bss_conf.aid,
1795 il->active.bssid_addr);
1796
1797 switch (vif->type) {
1798 case NL80211_IFTYPE_STATION:
1799 break;
1800 case NL80211_IFTYPE_ADHOC:
1801 il4965_send_beacon_cmd(il);
1802 break;
1803 default:
1804 IL_ERR("%s Should not be called in %d mode\n", __func__,
1805 vif->type);
1806 break;
1807 }
1808
1809 /* the chain noise calibration will enabled PM upon completion
1810 * If chain noise has already been run, then we need to enable
1811 * power management here */
1812 if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE)
1813 il_power_update_mode(il, false);
1814
1815 /* Enable Rx differential gain and sensitivity calibrations */
1816 il4965_chain_noise_reset(il);
1817 il->start_calib = 1;
1818 }
1819
1820 static void
1821 il4965_config_ap(struct il_priv *il)
1822 {
1823 struct ieee80211_vif *vif = il->vif;
1824 int ret = 0;
1825
1826 lockdep_assert_held(&il->mutex);
1827
1828 if (test_bit(S_EXIT_PENDING, &il->status))
1829 return;
1830
1831 /* The following should be done only at AP bring up */
1832 if (!il_is_associated(il)) {
1833
1834 /* RXON - unassoc (to set timing command) */
1835 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1836 il_commit_rxon(il);
1837
1838 /* RXON Timing */
1839 ret = il_send_rxon_timing(il);
1840 if (ret)
1841 IL_WARN("RXON timing failed - "
1842 "Attempting to continue.\n");
1843
1844 /* AP has all antennas */
1845 il->chain_noise_data.active_chains = il->hw_params.valid_rx_ant;
1846 il_set_rxon_ht(il, &il->current_ht_config);
1847 if (il->ops->set_rxon_chain)
1848 il->ops->set_rxon_chain(il);
1849
1850 il->staging.assoc_id = 0;
1851
1852 if (vif->bss_conf.use_short_preamble)
1853 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1854 else
1855 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1856
1857 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
1858 if (vif->bss_conf.use_short_slot)
1859 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
1860 else
1861 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1862 }
1863 /* need to send beacon cmd before committing assoc RXON! */
1864 il4965_send_beacon_cmd(il);
1865 /* restore RXON assoc */
1866 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
1867 il_commit_rxon(il);
1868 }
1869 il4965_send_beacon_cmd(il);
1870 }
1871
1872 const struct il_ops il4965_ops = {
1873 .txq_update_byte_cnt_tbl = il4965_txq_update_byte_cnt_tbl,
1874 .txq_attach_buf_to_tfd = il4965_hw_txq_attach_buf_to_tfd,
1875 .txq_free_tfd = il4965_hw_txq_free_tfd,
1876 .txq_init = il4965_hw_tx_queue_init,
1877 .is_valid_rtc_data_addr = il4965_hw_valid_rtc_data_addr,
1878 .init_alive_start = il4965_init_alive_start,
1879 .load_ucode = il4965_load_bsm,
1880 .dump_nic_error_log = il4965_dump_nic_error_log,
1881 .dump_fh = il4965_dump_fh,
1882 .set_channel_switch = il4965_hw_channel_switch,
1883 .apm_init = il_apm_init,
1884 .send_tx_power = il4965_send_tx_power,
1885 .update_chain_flags = il4965_update_chain_flags,
1886 .eeprom_acquire_semaphore = il4965_eeprom_acquire_semaphore,
1887 .eeprom_release_semaphore = il4965_eeprom_release_semaphore,
1888
1889 .rxon_assoc = il4965_send_rxon_assoc,
1890 .commit_rxon = il4965_commit_rxon,
1891 .set_rxon_chain = il4965_set_rxon_chain,
1892
1893 .get_hcmd_size = il4965_get_hcmd_size,
1894 .build_addsta_hcmd = il4965_build_addsta_hcmd,
1895 .request_scan = il4965_request_scan,
1896 .post_scan = il4965_post_scan,
1897
1898 .post_associate = il4965_post_associate,
1899 .config_ap = il4965_config_ap,
1900 .manage_ibss_station = il4965_manage_ibss_station,
1901 .update_bcast_stations = il4965_update_bcast_stations,
1902
1903 .send_led_cmd = il4965_send_led_cmd,
1904 };
1905
1906 struct il_cfg il4965_cfg = {
1907 .name = "Intel(R) Wireless WiFi Link 4965AGN",
1908 .fw_name_pre = IL4965_FW_PRE,
1909 .ucode_api_max = IL4965_UCODE_API_MAX,
1910 .ucode_api_min = IL4965_UCODE_API_MIN,
1911 .sku = IL_SKU_A | IL_SKU_G | IL_SKU_N,
1912 .valid_tx_ant = ANT_AB,
1913 .valid_rx_ant = ANT_ABC,
1914 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
1915 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
1916 .mod_params = &il4965_mod_params,
1917 .led_mode = IL_LED_BLINK,
1918 /*
1919 * Force use of chains B and C for scan RX on 5 GHz band
1920 * because the device has off-channel reception on chain A.
1921 */
1922 .scan_rx_antennas[NL80211_BAND_5GHZ] = ANT_BC,
1923
1924 .eeprom_size = IL4965_EEPROM_IMG_SIZE,
1925 .num_of_queues = IL49_NUM_QUEUES,
1926 .num_of_ampdu_queues = IL49_NUM_AMPDU_QUEUES,
1927 .pll_cfg_val = 0,
1928 .set_l0s = true,
1929 .use_bsm = true,
1930 .led_compensation = 61,
1931 .chain_noise_num_beacons = IL4965_CAL_NUM_BEACONS,
1932 .wd_timeout = IL_DEF_WD_TIMEOUT,
1933 .temperature_kelvin = true,
1934 .ucode_tracing = true,
1935 .sensitivity_calib_by_driver = true,
1936 .chain_noise_calib_by_driver = true,
1937
1938 .regulatory_bands = {
1939 EEPROM_REGULATORY_BAND_1_CHANNELS,
1940 EEPROM_REGULATORY_BAND_2_CHANNELS,
1941 EEPROM_REGULATORY_BAND_3_CHANNELS,
1942 EEPROM_REGULATORY_BAND_4_CHANNELS,
1943 EEPROM_REGULATORY_BAND_5_CHANNELS,
1944 EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
1945 EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
1946 },
1947
1948 };
1949
1950 /* Module firmware */
1951 MODULE_FIRMWARE(IL4965_MODULE_FIRMWARE(IL4965_UCODE_API_MAX));
Linux with added FPC-III support