?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
dmaengine: imx-sdma: Let the core do the device node validation
[linux/fpc-iii.git] / drivers / scsi / smartpqi / smartpqi_init.c
blobc26cac819f9e7a2ceaf9638fdebd600a7639f21f
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * driver for Microsemi PQI-based storage controllers
4 * Copyright (c) 2019 Microchip Technology Inc. and its subsidiaries
5 * Copyright (c) 2016-2018 Microsemi Corporation
6 * Copyright (c) 2016 PMC-Sierra, Inc.
7 *
8 * Questions/Comments/Bugfixes to storagedev@microchip.com
9 *
10 */
11
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/pci.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/sched.h>
18 #include <linux/rtc.h>
19 #include <linux/bcd.h>
20 #include <linux/reboot.h>
21 #include <linux/cciss_ioctl.h>
22 #include <linux/blk-mq-pci.h>
23 #include <scsi/scsi_host.h>
24 #include <scsi/scsi_cmnd.h>
25 #include <scsi/scsi_device.h>
26 #include <scsi/scsi_eh.h>
27 #include <scsi/scsi_transport_sas.h>
28 #include <asm/unaligned.h>
29 #include "smartpqi.h"
30 #include "smartpqi_sis.h"
31
32 #if !defined(BUILD_TIMESTAMP)
33 #define BUILD_TIMESTAMP
34 #endif
35
36 #define DRIVER_VERSION "1.2.6-015"
37 #define DRIVER_MAJOR 1
38 #define DRIVER_MINOR 2
39 #define DRIVER_RELEASE 6
40 #define DRIVER_REVISION 15
41
42 #define DRIVER_NAME "Microsemi PQI Driver (v" \
43 DRIVER_VERSION BUILD_TIMESTAMP ")"
44 #define DRIVER_NAME_SHORT "smartpqi"
45
46 #define PQI_EXTRA_SGL_MEMORY (12 * sizeof(struct pqi_sg_descriptor))
47
48 MODULE_AUTHOR("Microsemi");
49 MODULE_DESCRIPTION("Driver for Microsemi Smart Family Controller version "
50 DRIVER_VERSION);
51 MODULE_SUPPORTED_DEVICE("Microsemi Smart Family Controllers");
52 MODULE_VERSION(DRIVER_VERSION);
53 MODULE_LICENSE("GPL");
54
55 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info);
56 static void pqi_ctrl_offline_worker(struct work_struct *work);
57 static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info);
58 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info);
59 static void pqi_scan_start(struct Scsi_Host *shost);
60 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
61 struct pqi_queue_group *queue_group, enum pqi_io_path path,
62 struct pqi_io_request *io_request);
63 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
64 struct pqi_iu_header *request, unsigned int flags,
65 struct pqi_raid_error_info *error_info, unsigned long timeout_msecs);
66 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
67 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
68 unsigned int cdb_length, struct pqi_queue_group *queue_group,
69 struct pqi_encryption_info *encryption_info, bool raid_bypass);
70 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info);
71 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info);
72 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info);
73 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info,
74 u32 bytes_requested);
75 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info);
76 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info);
77 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
78 struct pqi_scsi_dev *device, unsigned long timeout_secs);
79
80 /* for flags argument to pqi_submit_raid_request_synchronous() */
81 #define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1
82
83 static struct scsi_transport_template *pqi_sas_transport_template;
84
85 static atomic_t pqi_controller_count = ATOMIC_INIT(0);
86
87 enum pqi_lockup_action {
88 NONE,
89 REBOOT,
90 PANIC
91 };
92
93 static enum pqi_lockup_action pqi_lockup_action = NONE;
94
95 static struct {
96 enum pqi_lockup_action action;
97 char *name;
98 } pqi_lockup_actions[] = {
99 {
100 .action = NONE,
101 .name = "none",
102 },
103 {
104 .action = REBOOT,
105 .name = "reboot",
106 },
107 {
108 .action = PANIC,
109 .name = "panic",
110 },
111 };
112
113 static unsigned int pqi_supported_event_types[] = {
114 PQI_EVENT_TYPE_HOTPLUG,
115 PQI_EVENT_TYPE_HARDWARE,
116 PQI_EVENT_TYPE_PHYSICAL_DEVICE,
117 PQI_EVENT_TYPE_LOGICAL_DEVICE,
118 PQI_EVENT_TYPE_OFA,
119 PQI_EVENT_TYPE_AIO_STATE_CHANGE,
120 PQI_EVENT_TYPE_AIO_CONFIG_CHANGE,
121 };
122
123 static int pqi_disable_device_id_wildcards;
124 module_param_named(disable_device_id_wildcards,
125 pqi_disable_device_id_wildcards, int, 0644);
126 MODULE_PARM_DESC(disable_device_id_wildcards,
127 "Disable device ID wildcards.");
128
129 static int pqi_disable_heartbeat;
130 module_param_named(disable_heartbeat,
131 pqi_disable_heartbeat, int, 0644);
132 MODULE_PARM_DESC(disable_heartbeat,
133 "Disable heartbeat.");
134
135 static int pqi_disable_ctrl_shutdown;
136 module_param_named(disable_ctrl_shutdown,
137 pqi_disable_ctrl_shutdown, int, 0644);
138 MODULE_PARM_DESC(disable_ctrl_shutdown,
139 "Disable controller shutdown when controller locked up.");
140
141 static char *pqi_lockup_action_param;
142 module_param_named(lockup_action,
143 pqi_lockup_action_param, charp, 0644);
144 MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n"
145 "\t\tSupported: none, reboot, panic\n"
146 "\t\tDefault: none");
147
148 static char *raid_levels[] = {
149 "RAID-0",
150 "RAID-4",
151 "RAID-1(1+0)",
152 "RAID-5",
153 "RAID-5+1",
154 "RAID-ADG",
155 "RAID-1(ADM)",
156 };
157
158 static char *pqi_raid_level_to_string(u8 raid_level)
159 {
160 if (raid_level < ARRAY_SIZE(raid_levels))
161 return raid_levels[raid_level];
162
163 return "RAID UNKNOWN";
164 }
165
166 #define SA_RAID_0 0
167 #define SA_RAID_4 1
168 #define SA_RAID_1 2 /* also used for RAID 10 */
169 #define SA_RAID_5 3 /* also used for RAID 50 */
170 #define SA_RAID_51 4
171 #define SA_RAID_6 5 /* also used for RAID 60 */
172 #define SA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
173 #define SA_RAID_MAX SA_RAID_ADM
174 #define SA_RAID_UNKNOWN 0xff
175
176 static inline void pqi_scsi_done(struct scsi_cmnd *scmd)
177 {
178 pqi_prep_for_scsi_done(scmd);
179 scmd->scsi_done(scmd);
180 }
181
182 static inline void pqi_disable_write_same(struct scsi_device *sdev)
183 {
184 sdev->no_write_same = 1;
185 }
186
187 static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2)
188 {
189 return memcmp(scsi3addr1, scsi3addr2, 8) == 0;
190 }
191
192 static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device)
193 {
194 return !device->is_physical_device;
195 }
196
197 static inline bool pqi_is_external_raid_addr(u8 *scsi3addr)
198 {
199 return scsi3addr[2] != 0;
200 }
201
202 static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info)
203 {
204 if (ctrl_info->controller_online)
205 if (!sis_is_firmware_running(ctrl_info))
206 pqi_take_ctrl_offline(ctrl_info);
207 }
208
209 static inline bool pqi_is_hba_lunid(u8 *scsi3addr)
210 {
211 return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID);
212 }
213
214 static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(
215 struct pqi_ctrl_info *ctrl_info)
216 {
217 return sis_read_driver_scratch(ctrl_info);
218 }
219
220 static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info,
221 enum pqi_ctrl_mode mode)
222 {
223 sis_write_driver_scratch(ctrl_info, mode);
224 }
225
226 static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info)
227 {
228 ctrl_info->block_requests = true;
229 scsi_block_requests(ctrl_info->scsi_host);
230 }
231
232 static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info)
233 {
234 ctrl_info->block_requests = false;
235 wake_up_all(&ctrl_info->block_requests_wait);
236 pqi_retry_raid_bypass_requests(ctrl_info);
237 scsi_unblock_requests(ctrl_info->scsi_host);
238 }
239
240 static unsigned long pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info,
241 unsigned long timeout_msecs)
242 {
243 unsigned long remaining_msecs;
244
245 if (!pqi_ctrl_blocked(ctrl_info))
246 return timeout_msecs;
247
248 atomic_inc(&ctrl_info->num_blocked_threads);
249
250 if (timeout_msecs == NO_TIMEOUT) {
251 wait_event(ctrl_info->block_requests_wait,
252 !pqi_ctrl_blocked(ctrl_info));
253 remaining_msecs = timeout_msecs;
254 } else {
255 unsigned long remaining_jiffies;
256
257 remaining_jiffies =
258 wait_event_timeout(ctrl_info->block_requests_wait,
259 !pqi_ctrl_blocked(ctrl_info),
260 msecs_to_jiffies(timeout_msecs));
261 remaining_msecs = jiffies_to_msecs(remaining_jiffies);
262 }
263
264 atomic_dec(&ctrl_info->num_blocked_threads);
265
266 return remaining_msecs;
267 }
268
269 static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info)
270 {
271 while (atomic_read(&ctrl_info->num_busy_threads) >
272 atomic_read(&ctrl_info->num_blocked_threads))
273 usleep_range(1000, 2000);
274 }
275
276 static inline bool pqi_device_offline(struct pqi_scsi_dev *device)
277 {
278 return device->device_offline;
279 }
280
281 static inline void pqi_device_reset_start(struct pqi_scsi_dev *device)
282 {
283 device->in_reset = true;
284 }
285
286 static inline void pqi_device_reset_done(struct pqi_scsi_dev *device)
287 {
288 device->in_reset = false;
289 }
290
291 static inline bool pqi_device_in_reset(struct pqi_scsi_dev *device)
292 {
293 return device->in_reset;
294 }
295
296 static inline void pqi_ctrl_ofa_start(struct pqi_ctrl_info *ctrl_info)
297 {
298 ctrl_info->in_ofa = true;
299 }
300
301 static inline void pqi_ctrl_ofa_done(struct pqi_ctrl_info *ctrl_info)
302 {
303 ctrl_info->in_ofa = false;
304 }
305
306 static inline bool pqi_ctrl_in_ofa(struct pqi_ctrl_info *ctrl_info)
307 {
308 return ctrl_info->in_ofa;
309 }
310
311 static inline void pqi_device_remove_start(struct pqi_scsi_dev *device)
312 {
313 device->in_remove = true;
314 }
315
316 static inline bool pqi_device_in_remove(struct pqi_ctrl_info *ctrl_info,
317 struct pqi_scsi_dev *device)
318 {
319 return device->in_remove && !ctrl_info->in_shutdown;
320 }
321
322 static inline void pqi_schedule_rescan_worker_with_delay(
323 struct pqi_ctrl_info *ctrl_info, unsigned long delay)
324 {
325 if (pqi_ctrl_offline(ctrl_info))
326 return;
327 if (pqi_ctrl_in_ofa(ctrl_info))
328 return;
329
330 schedule_delayed_work(&ctrl_info->rescan_work, delay);
331 }
332
333 static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info)
334 {
335 pqi_schedule_rescan_worker_with_delay(ctrl_info, 0);
336 }
337
338 #define PQI_RESCAN_WORK_DELAY (10 * PQI_HZ)
339
340 static inline void pqi_schedule_rescan_worker_delayed(
341 struct pqi_ctrl_info *ctrl_info)
342 {
343 pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY);
344 }
345
346 static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info)
347 {
348 cancel_delayed_work_sync(&ctrl_info->rescan_work);
349 }
350
351 static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info)
352 {
353 if (!ctrl_info->heartbeat_counter)
354 return 0;
355
356 return readl(ctrl_info->heartbeat_counter);
357 }
358
359 static inline u8 pqi_read_soft_reset_status(struct pqi_ctrl_info *ctrl_info)
360 {
361 if (!ctrl_info->soft_reset_status)
362 return 0;
363
364 return readb(ctrl_info->soft_reset_status);
365 }
366
367 static inline void pqi_clear_soft_reset_status(struct pqi_ctrl_info *ctrl_info,
368 u8 clear)
369 {
370 u8 status;
371
372 if (!ctrl_info->soft_reset_status)
373 return;
374
375 status = pqi_read_soft_reset_status(ctrl_info);
376 status &= ~clear;
377 writeb(status, ctrl_info->soft_reset_status);
378 }
379
380 static int pqi_map_single(struct pci_dev *pci_dev,
381 struct pqi_sg_descriptor *sg_descriptor, void *buffer,
382 size_t buffer_length, enum dma_data_direction data_direction)
383 {
384 dma_addr_t bus_address;
385
386 if (!buffer || buffer_length == 0 || data_direction == DMA_NONE)
387 return 0;
388
389 bus_address = dma_map_single(&pci_dev->dev, buffer, buffer_length,
390 data_direction);
391 if (dma_mapping_error(&pci_dev->dev, bus_address))
392 return -ENOMEM;
393
394 put_unaligned_le64((u64)bus_address, &sg_descriptor->address);
395 put_unaligned_le32(buffer_length, &sg_descriptor->length);
396 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
397
398 return 0;
399 }
400
401 static void pqi_pci_unmap(struct pci_dev *pci_dev,
402 struct pqi_sg_descriptor *descriptors, int num_descriptors,
403 enum dma_data_direction data_direction)
404 {
405 int i;
406
407 if (data_direction == DMA_NONE)
408 return;
409
410 for (i = 0; i < num_descriptors; i++)
411 dma_unmap_single(&pci_dev->dev,
412 (dma_addr_t)get_unaligned_le64(&descriptors[i].address),
413 get_unaligned_le32(&descriptors[i].length),
414 data_direction);
415 }
416
417 static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info,
418 struct pqi_raid_path_request *request, u8 cmd,
419 u8 *scsi3addr, void *buffer, size_t buffer_length,
420 u16 vpd_page, enum dma_data_direction *dir)
421 {
422 u8 *cdb;
423 size_t cdb_length = buffer_length;
424
425 memset(request, 0, sizeof(*request));
426
427 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
428 put_unaligned_le16(offsetof(struct pqi_raid_path_request,
429 sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH,
430 &request->header.iu_length);
431 put_unaligned_le32(buffer_length, &request->buffer_length);
432 memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number));
433 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
434 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
435
436 cdb = request->cdb;
437
438 switch (cmd) {
439 case INQUIRY:
440 request->data_direction = SOP_READ_FLAG;
441 cdb[0] = INQUIRY;
442 if (vpd_page & VPD_PAGE) {
443 cdb[1] = 0x1;
444 cdb[2] = (u8)vpd_page;
445 }
446 cdb[4] = (u8)cdb_length;
447 break;
448 case CISS_REPORT_LOG:
449 case CISS_REPORT_PHYS:
450 request->data_direction = SOP_READ_FLAG;
451 cdb[0] = cmd;
452 if (cmd == CISS_REPORT_PHYS)
453 cdb[1] = CISS_REPORT_PHYS_EXTENDED;
454 else
455 cdb[1] = CISS_REPORT_LOG_EXTENDED;
456 put_unaligned_be32(cdb_length, &cdb[6]);
457 break;
458 case CISS_GET_RAID_MAP:
459 request->data_direction = SOP_READ_FLAG;
460 cdb[0] = CISS_READ;
461 cdb[1] = CISS_GET_RAID_MAP;
462 put_unaligned_be32(cdb_length, &cdb[6]);
463 break;
464 case SA_FLUSH_CACHE:
465 request->data_direction = SOP_WRITE_FLAG;
466 cdb[0] = BMIC_WRITE;
467 cdb[6] = BMIC_FLUSH_CACHE;
468 put_unaligned_be16(cdb_length, &cdb[7]);
469 break;
470 case BMIC_SENSE_DIAG_OPTIONS:
471 cdb_length = 0;
472 /* fall through */
473 case BMIC_IDENTIFY_CONTROLLER:
474 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
475 request->data_direction = SOP_READ_FLAG;
476 cdb[0] = BMIC_READ;
477 cdb[6] = cmd;
478 put_unaligned_be16(cdb_length, &cdb[7]);
479 break;
480 case BMIC_SET_DIAG_OPTIONS:
481 cdb_length = 0;
482 /* fall through */
483 case BMIC_WRITE_HOST_WELLNESS:
484 request->data_direction = SOP_WRITE_FLAG;
485 cdb[0] = BMIC_WRITE;
486 cdb[6] = cmd;
487 put_unaligned_be16(cdb_length, &cdb[7]);
488 break;
489 case BMIC_CSMI_PASSTHRU:
490 request->data_direction = SOP_BIDIRECTIONAL;
491 cdb[0] = BMIC_WRITE;
492 cdb[5] = CSMI_CC_SAS_SMP_PASSTHRU;
493 cdb[6] = cmd;
494 put_unaligned_be16(cdb_length, &cdb[7]);
495 break;
496 default:
497 dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n",
498 cmd);
499 break;
500 }
501
502 switch (request->data_direction) {
503 case SOP_READ_FLAG:
504 *dir = DMA_FROM_DEVICE;
505 break;
506 case SOP_WRITE_FLAG:
507 *dir = DMA_TO_DEVICE;
508 break;
509 case SOP_NO_DIRECTION_FLAG:
510 *dir = DMA_NONE;
511 break;
512 default:
513 *dir = DMA_BIDIRECTIONAL;
514 break;
515 }
516
517 return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0],
518 buffer, buffer_length, *dir);
519 }
520
521 static inline void pqi_reinit_io_request(struct pqi_io_request *io_request)
522 {
523 io_request->scmd = NULL;
524 io_request->status = 0;
525 io_request->error_info = NULL;
526 io_request->raid_bypass = false;
527 }
528
529 static struct pqi_io_request *pqi_alloc_io_request(
530 struct pqi_ctrl_info *ctrl_info)
531 {
532 struct pqi_io_request *io_request;
533 u16 i = ctrl_info->next_io_request_slot; /* benignly racy */
534
535 while (1) {
536 io_request = &ctrl_info->io_request_pool[i];
537 if (atomic_inc_return(&io_request->refcount) == 1)
538 break;
539 atomic_dec(&io_request->refcount);
540 i = (i + 1) % ctrl_info->max_io_slots;
541 }
542
543 /* benignly racy */
544 ctrl_info->next_io_request_slot = (i + 1) % ctrl_info->max_io_slots;
545
546 pqi_reinit_io_request(io_request);
547
548 return io_request;
549 }
550
551 static void pqi_free_io_request(struct pqi_io_request *io_request)
552 {
553 atomic_dec(&io_request->refcount);
554 }
555
556 static int pqi_send_scsi_raid_request(struct pqi_ctrl_info *ctrl_info, u8 cmd,
557 u8 *scsi3addr, void *buffer, size_t buffer_length, u16 vpd_page,
558 struct pqi_raid_error_info *error_info,
559 unsigned long timeout_msecs)
560 {
561 int rc;
562 enum dma_data_direction dir;
563 struct pqi_raid_path_request request;
564
565 rc = pqi_build_raid_path_request(ctrl_info, &request,
566 cmd, scsi3addr, buffer,
567 buffer_length, vpd_page, &dir);
568 if (rc)
569 return rc;
570
571 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
572 0, error_info, timeout_msecs);
573
574 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
575 return rc;
576 }
577
578 /* Helper functions for pqi_send_scsi_raid_request */
579
580 static inline int pqi_send_ctrl_raid_request(struct pqi_ctrl_info *ctrl_info,
581 u8 cmd, void *buffer, size_t buffer_length)
582 {
583 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
584 buffer, buffer_length, 0, NULL, NO_TIMEOUT);
585 }
586
587 static inline int pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info *ctrl_info,
588 u8 cmd, void *buffer, size_t buffer_length,
589 struct pqi_raid_error_info *error_info)
590 {
591 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
592 buffer, buffer_length, 0, error_info, NO_TIMEOUT);
593 }
594
595
596 static inline int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info,
597 struct bmic_identify_controller *buffer)
598 {
599 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER,
600 buffer, sizeof(*buffer));
601 }
602
603 static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info,
604 u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length)
605 {
606 return pqi_send_scsi_raid_request(ctrl_info, INQUIRY, scsi3addr,
607 buffer, buffer_length, vpd_page, NULL, NO_TIMEOUT);
608 }
609
610 static bool pqi_vpd_page_supported(struct pqi_ctrl_info *ctrl_info,
611 u8 *scsi3addr, u16 vpd_page)
612 {
613 int rc;
614 int i;
615 int pages;
616 unsigned char *buf, bufsize;
617
618 buf = kzalloc(256, GFP_KERNEL);
619 if (!buf)
620 return false;
621
622 /* Get the size of the page list first */
623 rc = pqi_scsi_inquiry(ctrl_info, scsi3addr,
624 VPD_PAGE | SCSI_VPD_SUPPORTED_PAGES,
625 buf, SCSI_VPD_HEADER_SZ);
626 if (rc != 0)
627 goto exit_unsupported;
628
629 pages = buf[3];
630 if ((pages + SCSI_VPD_HEADER_SZ) <= 255)
631 bufsize = pages + SCSI_VPD_HEADER_SZ;
632 else
633 bufsize = 255;
634
635 /* Get the whole VPD page list */
636 rc = pqi_scsi_inquiry(ctrl_info, scsi3addr,
637 VPD_PAGE | SCSI_VPD_SUPPORTED_PAGES,
638 buf, bufsize);
639 if (rc != 0)
640 goto exit_unsupported;
641
642 pages = buf[3];
643 for (i = 1; i <= pages; i++)
644 if (buf[3 + i] == vpd_page)
645 goto exit_supported;
646
647 exit_unsupported:
648 kfree(buf);
649 return false;
650
651 exit_supported:
652 kfree(buf);
653 return true;
654 }
655
656 static int pqi_get_device_id(struct pqi_ctrl_info *ctrl_info,
657 u8 *scsi3addr, u8 *device_id, int buflen)
658 {
659 int rc;
660 unsigned char *buf;
661
662 if (!pqi_vpd_page_supported(ctrl_info, scsi3addr, SCSI_VPD_DEVICE_ID))
663 return 1; /* function not supported */
664
665 buf = kzalloc(64, GFP_KERNEL);
666 if (!buf)
667 return -ENOMEM;
668
669 rc = pqi_scsi_inquiry(ctrl_info, scsi3addr,
670 VPD_PAGE | SCSI_VPD_DEVICE_ID,
671 buf, 64);
672 if (rc == 0) {
673 if (buflen > 16)
674 buflen = 16;
675 memcpy(device_id, &buf[SCSI_VPD_DEVICE_ID_IDX], buflen);
676 }
677
678 kfree(buf);
679
680 return rc;
681 }
682
683 static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info,
684 struct pqi_scsi_dev *device,
685 struct bmic_identify_physical_device *buffer,
686 size_t buffer_length)
687 {
688 int rc;
689 enum dma_data_direction dir;
690 u16 bmic_device_index;
691 struct pqi_raid_path_request request;
692
693 rc = pqi_build_raid_path_request(ctrl_info, &request,
694 BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer,
695 buffer_length, 0, &dir);
696 if (rc)
697 return rc;
698
699 bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr);
700 request.cdb[2] = (u8)bmic_device_index;
701 request.cdb[9] = (u8)(bmic_device_index >> 8);
702
703 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
704 0, NULL, NO_TIMEOUT);
705
706 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
707 return rc;
708 }
709
710 static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info,
711 enum bmic_flush_cache_shutdown_event shutdown_event)
712 {
713 int rc;
714 struct bmic_flush_cache *flush_cache;
715
716 /*
717 * Don't bother trying to flush the cache if the controller is
718 * locked up.
719 */
720 if (pqi_ctrl_offline(ctrl_info))
721 return -ENXIO;
722
723 flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL);
724 if (!flush_cache)
725 return -ENOMEM;
726
727 flush_cache->shutdown_event = shutdown_event;
728
729 rc = pqi_send_ctrl_raid_request(ctrl_info, SA_FLUSH_CACHE, flush_cache,
730 sizeof(*flush_cache));
731
732 kfree(flush_cache);
733
734 return rc;
735 }
736
737 int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info,
738 struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length,
739 struct pqi_raid_error_info *error_info)
740 {
741 return pqi_send_ctrl_raid_with_error(ctrl_info, BMIC_CSMI_PASSTHRU,
742 buffer, buffer_length, error_info);
743 }
744
745 #define PQI_FETCH_PTRAID_DATA (1UL<<31)
746
747 static int pqi_set_diag_rescan(struct pqi_ctrl_info *ctrl_info)
748 {
749 int rc;
750 struct bmic_diag_options *diag;
751
752 diag = kzalloc(sizeof(*diag), GFP_KERNEL);
753 if (!diag)
754 return -ENOMEM;
755
756 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SENSE_DIAG_OPTIONS,
757 diag, sizeof(*diag));
758 if (rc)
759 goto out;
760
761 diag->options |= cpu_to_le32(PQI_FETCH_PTRAID_DATA);
762
763 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SET_DIAG_OPTIONS,
764 diag, sizeof(*diag));
765 out:
766 kfree(diag);
767
768 return rc;
769 }
770
771 static inline int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info,
772 void *buffer, size_t buffer_length)
773 {
774 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_WRITE_HOST_WELLNESS,
775 buffer, buffer_length);
776 }
777
778 #pragma pack(1)
779
780 struct bmic_host_wellness_driver_version {
781 u8 start_tag[4];
782 u8 driver_version_tag[2];
783 __le16 driver_version_length;
784 char driver_version[32];
785 u8 dont_write_tag[2];
786 u8 end_tag[2];
787 };
788
789 #pragma pack()
790
791 static int pqi_write_driver_version_to_host_wellness(
792 struct pqi_ctrl_info *ctrl_info)
793 {
794 int rc;
795 struct bmic_host_wellness_driver_version *buffer;
796 size_t buffer_length;
797
798 buffer_length = sizeof(*buffer);
799
800 buffer = kmalloc(buffer_length, GFP_KERNEL);
801 if (!buffer)
802 return -ENOMEM;
803
804 buffer->start_tag[0] = '<';
805 buffer->start_tag[1] = 'H';
806 buffer->start_tag[2] = 'W';
807 buffer->start_tag[3] = '>';
808 buffer->driver_version_tag[0] = 'D';
809 buffer->driver_version_tag[1] = 'V';
810 put_unaligned_le16(sizeof(buffer->driver_version),
811 &buffer->driver_version_length);
812 strncpy(buffer->driver_version, "Linux " DRIVER_VERSION,
813 sizeof(buffer->driver_version) - 1);
814 buffer->driver_version[sizeof(buffer->driver_version) - 1] = '\0';
815 buffer->dont_write_tag[0] = 'D';
816 buffer->dont_write_tag[1] = 'W';
817 buffer->end_tag[0] = 'Z';
818 buffer->end_tag[1] = 'Z';
819
820 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
821
822 kfree(buffer);
823
824 return rc;
825 }
826
827 #pragma pack(1)
828
829 struct bmic_host_wellness_time {
830 u8 start_tag[4];
831 u8 time_tag[2];
832 __le16 time_length;
833 u8 time[8];
834 u8 dont_write_tag[2];
835 u8 end_tag[2];
836 };
837
838 #pragma pack()
839
840 static int pqi_write_current_time_to_host_wellness(
841 struct pqi_ctrl_info *ctrl_info)
842 {
843 int rc;
844 struct bmic_host_wellness_time *buffer;
845 size_t buffer_length;
846 time64_t local_time;
847 unsigned int year;
848 struct tm tm;
849
850 buffer_length = sizeof(*buffer);
851
852 buffer = kmalloc(buffer_length, GFP_KERNEL);
853 if (!buffer)
854 return -ENOMEM;
855
856 buffer->start_tag[0] = '<';
857 buffer->start_tag[1] = 'H';
858 buffer->start_tag[2] = 'W';
859 buffer->start_tag[3] = '>';
860 buffer->time_tag[0] = 'T';
861 buffer->time_tag[1] = 'D';
862 put_unaligned_le16(sizeof(buffer->time),
863 &buffer->time_length);
864
865 local_time = ktime_get_real_seconds();
866 time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm);
867 year = tm.tm_year + 1900;
868
869 buffer->time[0] = bin2bcd(tm.tm_hour);
870 buffer->time[1] = bin2bcd(tm.tm_min);
871 buffer->time[2] = bin2bcd(tm.tm_sec);
872 buffer->time[3] = 0;
873 buffer->time[4] = bin2bcd(tm.tm_mon + 1);
874 buffer->time[5] = bin2bcd(tm.tm_mday);
875 buffer->time[6] = bin2bcd(year / 100);
876 buffer->time[7] = bin2bcd(year % 100);
877
878 buffer->dont_write_tag[0] = 'D';
879 buffer->dont_write_tag[1] = 'W';
880 buffer->end_tag[0] = 'Z';
881 buffer->end_tag[1] = 'Z';
882
883 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
884
885 kfree(buffer);
886
887 return rc;
888 }
889
890 #define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * PQI_HZ)
891
892 static void pqi_update_time_worker(struct work_struct *work)
893 {
894 int rc;
895 struct pqi_ctrl_info *ctrl_info;
896
897 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
898 update_time_work);
899
900 if (pqi_ctrl_offline(ctrl_info))
901 return;
902
903 rc = pqi_write_current_time_to_host_wellness(ctrl_info);
904 if (rc)
905 dev_warn(&ctrl_info->pci_dev->dev,
906 "error updating time on controller\n");
907
908 schedule_delayed_work(&ctrl_info->update_time_work,
909 PQI_UPDATE_TIME_WORK_INTERVAL);
910 }
911
912 static inline void pqi_schedule_update_time_worker(
913 struct pqi_ctrl_info *ctrl_info)
914 {
915 schedule_delayed_work(&ctrl_info->update_time_work, 0);
916 }
917
918 static inline void pqi_cancel_update_time_worker(
919 struct pqi_ctrl_info *ctrl_info)
920 {
921 cancel_delayed_work_sync(&ctrl_info->update_time_work);
922 }
923
924 static inline int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd,
925 void *buffer, size_t buffer_length)
926 {
927 return pqi_send_ctrl_raid_request(ctrl_info, cmd, buffer,
928 buffer_length);
929 }
930
931 static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd,
932 void **buffer)
933 {
934 int rc;
935 size_t lun_list_length;
936 size_t lun_data_length;
937 size_t new_lun_list_length;
938 void *lun_data = NULL;
939 struct report_lun_header *report_lun_header;
940
941 report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL);
942 if (!report_lun_header) {
943 rc = -ENOMEM;
944 goto out;
945 }
946
947 rc = pqi_report_luns(ctrl_info, cmd, report_lun_header,
948 sizeof(*report_lun_header));
949 if (rc)
950 goto out;
951
952 lun_list_length = get_unaligned_be32(&report_lun_header->list_length);
953
954 again:
955 lun_data_length = sizeof(struct report_lun_header) + lun_list_length;
956
957 lun_data = kmalloc(lun_data_length, GFP_KERNEL);
958 if (!lun_data) {
959 rc = -ENOMEM;
960 goto out;
961 }
962
963 if (lun_list_length == 0) {
964 memcpy(lun_data, report_lun_header, sizeof(*report_lun_header));
965 goto out;
966 }
967
968 rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length);
969 if (rc)
970 goto out;
971
972 new_lun_list_length = get_unaligned_be32(
973 &((struct report_lun_header *)lun_data)->list_length);
974
975 if (new_lun_list_length > lun_list_length) {
976 lun_list_length = new_lun_list_length;
977 kfree(lun_data);
978 goto again;
979 }
980
981 out:
982 kfree(report_lun_header);
983
984 if (rc) {
985 kfree(lun_data);
986 lun_data = NULL;
987 }
988
989 *buffer = lun_data;
990
991 return rc;
992 }
993
994 static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info,
995 void **buffer)
996 {
997 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS,
998 buffer);
999 }
1000
1001 static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info,
1002 void **buffer)
1003 {
1004 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer);
1005 }
1006
1007 static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info,
1008 struct report_phys_lun_extended **physdev_list,
1009 struct report_log_lun_extended **logdev_list)
1010 {
1011 int rc;
1012 size_t logdev_list_length;
1013 size_t logdev_data_length;
1014 struct report_log_lun_extended *internal_logdev_list;
1015 struct report_log_lun_extended *logdev_data;
1016 struct report_lun_header report_lun_header;
1017
1018 rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list);
1019 if (rc)
1020 dev_err(&ctrl_info->pci_dev->dev,
1021 "report physical LUNs failed\n");
1022
1023 rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list);
1024 if (rc)
1025 dev_err(&ctrl_info->pci_dev->dev,
1026 "report logical LUNs failed\n");
1027
1028 /*
1029 * Tack the controller itself onto the end of the logical device list.
1030 */
1031
1032 logdev_data = *logdev_list;
1033
1034 if (logdev_data) {
1035 logdev_list_length =
1036 get_unaligned_be32(&logdev_data->header.list_length);
1037 } else {
1038 memset(&report_lun_header, 0, sizeof(report_lun_header));
1039 logdev_data =
1040 (struct report_log_lun_extended *)&report_lun_header;
1041 logdev_list_length = 0;
1042 }
1043
1044 logdev_data_length = sizeof(struct report_lun_header) +
1045 logdev_list_length;
1046
1047 internal_logdev_list = kmalloc(logdev_data_length +
1048 sizeof(struct report_log_lun_extended), GFP_KERNEL);
1049 if (!internal_logdev_list) {
1050 kfree(*logdev_list);
1051 *logdev_list = NULL;
1052 return -ENOMEM;
1053 }
1054
1055 memcpy(internal_logdev_list, logdev_data, logdev_data_length);
1056 memset((u8 *)internal_logdev_list + logdev_data_length, 0,
1057 sizeof(struct report_log_lun_extended_entry));
1058 put_unaligned_be32(logdev_list_length +
1059 sizeof(struct report_log_lun_extended_entry),
1060 &internal_logdev_list->header.list_length);
1061
1062 kfree(*logdev_list);
1063 *logdev_list = internal_logdev_list;
1064
1065 return 0;
1066 }
1067
1068 static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device,
1069 int bus, int target, int lun)
1070 {
1071 device->bus = bus;
1072 device->target = target;
1073 device->lun = lun;
1074 }
1075
1076 static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device)
1077 {
1078 u8 *scsi3addr;
1079 u32 lunid;
1080 int bus;
1081 int target;
1082 int lun;
1083
1084 scsi3addr = device->scsi3addr;
1085 lunid = get_unaligned_le32(scsi3addr);
1086
1087 if (pqi_is_hba_lunid(scsi3addr)) {
1088 /* The specified device is the controller. */
1089 pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff);
1090 device->target_lun_valid = true;
1091 return;
1092 }
1093
1094 if (pqi_is_logical_device(device)) {
1095 if (device->is_external_raid_device) {
1096 bus = PQI_EXTERNAL_RAID_VOLUME_BUS;
1097 target = (lunid >> 16) & 0x3fff;
1098 lun = lunid & 0xff;
1099 } else {
1100 bus = PQI_RAID_VOLUME_BUS;
1101 target = 0;
1102 lun = lunid & 0x3fff;
1103 }
1104 pqi_set_bus_target_lun(device, bus, target, lun);
1105 device->target_lun_valid = true;
1106 return;
1107 }
1108
1109 /*
1110 * Defer target and LUN assignment for non-controller physical devices
1111 * because the SAS transport layer will make these assignments later.
1112 */
1113 pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0);
1114 }
1115
1116 static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info,
1117 struct pqi_scsi_dev *device)
1118 {
1119 int rc;
1120 u8 raid_level;
1121 u8 *buffer;
1122
1123 raid_level = SA_RAID_UNKNOWN;
1124
1125 buffer = kmalloc(64, GFP_KERNEL);
1126 if (buffer) {
1127 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1128 VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64);
1129 if (rc == 0) {
1130 raid_level = buffer[8];
1131 if (raid_level > SA_RAID_MAX)
1132 raid_level = SA_RAID_UNKNOWN;
1133 }
1134 kfree(buffer);
1135 }
1136
1137 device->raid_level = raid_level;
1138 }
1139
1140 static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info,
1141 struct pqi_scsi_dev *device, struct raid_map *raid_map)
1142 {
1143 char *err_msg;
1144 u32 raid_map_size;
1145 u32 r5or6_blocks_per_row;
1146
1147 raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1148
1149 if (raid_map_size < offsetof(struct raid_map, disk_data)) {
1150 err_msg = "RAID map too small";
1151 goto bad_raid_map;
1152 }
1153
1154 if (device->raid_level == SA_RAID_1) {
1155 if (get_unaligned_le16(&raid_map->layout_map_count) != 2) {
1156 err_msg = "invalid RAID-1 map";
1157 goto bad_raid_map;
1158 }
1159 } else if (device->raid_level == SA_RAID_ADM) {
1160 if (get_unaligned_le16(&raid_map->layout_map_count) != 3) {
1161 err_msg = "invalid RAID-1(ADM) map";
1162 goto bad_raid_map;
1163 }
1164 } else if ((device->raid_level == SA_RAID_5 ||
1165 device->raid_level == SA_RAID_6) &&
1166 get_unaligned_le16(&raid_map->layout_map_count) > 1) {
1167 /* RAID 50/60 */
1168 r5or6_blocks_per_row =
1169 get_unaligned_le16(&raid_map->strip_size) *
1170 get_unaligned_le16(&raid_map->data_disks_per_row);
1171 if (r5or6_blocks_per_row == 0) {
1172 err_msg = "invalid RAID-5 or RAID-6 map";
1173 goto bad_raid_map;
1174 }
1175 }
1176
1177 return 0;
1178
1179 bad_raid_map:
1180 dev_warn(&ctrl_info->pci_dev->dev,
1181 "logical device %08x%08x %s\n",
1182 *((u32 *)&device->scsi3addr),
1183 *((u32 *)&device->scsi3addr[4]), err_msg);
1184
1185 return -EINVAL;
1186 }
1187
1188 static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info,
1189 struct pqi_scsi_dev *device)
1190 {
1191 int rc;
1192 u32 raid_map_size;
1193 struct raid_map *raid_map;
1194
1195 raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL);
1196 if (!raid_map)
1197 return -ENOMEM;
1198
1199 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1200 device->scsi3addr, raid_map, sizeof(*raid_map),
1201 0, NULL, NO_TIMEOUT);
1202
1203 if (rc)
1204 goto error;
1205
1206 raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1207
1208 if (raid_map_size > sizeof(*raid_map)) {
1209
1210 kfree(raid_map);
1211
1212 raid_map = kmalloc(raid_map_size, GFP_KERNEL);
1213 if (!raid_map)
1214 return -ENOMEM;
1215
1216 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1217 device->scsi3addr, raid_map, raid_map_size,
1218 0, NULL, NO_TIMEOUT);
1219 if (rc)
1220 goto error;
1221
1222 if (get_unaligned_le32(&raid_map->structure_size)
1223 != raid_map_size) {
1224 dev_warn(&ctrl_info->pci_dev->dev,
1225 "Requested %d bytes, received %d bytes",
1226 raid_map_size,
1227 get_unaligned_le32(&raid_map->structure_size));
1228 goto error;
1229 }
1230 }
1231
1232 rc = pqi_validate_raid_map(ctrl_info, device, raid_map);
1233 if (rc)
1234 goto error;
1235
1236 device->raid_map = raid_map;
1237
1238 return 0;
1239
1240 error:
1241 kfree(raid_map);
1242
1243 return rc;
1244 }
1245
1246 static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info,
1247 struct pqi_scsi_dev *device)
1248 {
1249 int rc;
1250 u8 *buffer;
1251 u8 bypass_status;
1252
1253 buffer = kmalloc(64, GFP_KERNEL);
1254 if (!buffer)
1255 return;
1256
1257 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1258 VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64);
1259 if (rc)
1260 goto out;
1261
1262 #define RAID_BYPASS_STATUS 4
1263 #define RAID_BYPASS_CONFIGURED 0x1
1264 #define RAID_BYPASS_ENABLED 0x2
1265
1266 bypass_status = buffer[RAID_BYPASS_STATUS];
1267 device->raid_bypass_configured =
1268 (bypass_status & RAID_BYPASS_CONFIGURED) != 0;
1269 if (device->raid_bypass_configured &&
1270 (bypass_status & RAID_BYPASS_ENABLED) &&
1271 pqi_get_raid_map(ctrl_info, device) == 0)
1272 device->raid_bypass_enabled = true;
1273
1274 out:
1275 kfree(buffer);
1276 }
1277
1278 /*
1279 * Use vendor-specific VPD to determine online/offline status of a volume.
1280 */
1281
1282 static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info,
1283 struct pqi_scsi_dev *device)
1284 {
1285 int rc;
1286 size_t page_length;
1287 u8 volume_status = CISS_LV_STATUS_UNAVAILABLE;
1288 bool volume_offline = true;
1289 u32 volume_flags;
1290 struct ciss_vpd_logical_volume_status *vpd;
1291
1292 vpd = kmalloc(sizeof(*vpd), GFP_KERNEL);
1293 if (!vpd)
1294 goto no_buffer;
1295
1296 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1297 VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd));
1298 if (rc)
1299 goto out;
1300
1301 if (vpd->page_code != CISS_VPD_LV_STATUS)
1302 goto out;
1303
1304 page_length = offsetof(struct ciss_vpd_logical_volume_status,
1305 volume_status) + vpd->page_length;
1306 if (page_length < sizeof(*vpd))
1307 goto out;
1308
1309 volume_status = vpd->volume_status;
1310 volume_flags = get_unaligned_be32(&vpd->flags);
1311 volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0;
1312
1313 out:
1314 kfree(vpd);
1315 no_buffer:
1316 device->volume_status = volume_status;
1317 device->volume_offline = volume_offline;
1318 }
1319
1320 #define PQI_INQUIRY_PAGE0_RETRIES 3
1321
1322 static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info,
1323 struct pqi_scsi_dev *device)
1324 {
1325 int rc;
1326 u8 *buffer;
1327 unsigned int retries;
1328
1329 if (device->is_expander_smp_device)
1330 return 0;
1331
1332 buffer = kmalloc(64, GFP_KERNEL);
1333 if (!buffer)
1334 return -ENOMEM;
1335
1336 /* Send an inquiry to the device to see what it is. */
1337 for (retries = 0;;) {
1338 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0,
1339 buffer, 64);
1340 if (rc == 0)
1341 break;
1342 if (pqi_is_logical_device(device) ||
1343 rc != PQI_CMD_STATUS_ABORTED ||
1344 ++retries > PQI_INQUIRY_PAGE0_RETRIES)
1345 goto out;
1346 }
1347
1348 scsi_sanitize_inquiry_string(&buffer[8], 8);
1349 scsi_sanitize_inquiry_string(&buffer[16], 16);
1350
1351 device->devtype = buffer[0] & 0x1f;
1352 memcpy(device->vendor, &buffer[8], sizeof(device->vendor));
1353 memcpy(device->model, &buffer[16], sizeof(device->model));
1354
1355 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK) {
1356 if (device->is_external_raid_device) {
1357 device->raid_level = SA_RAID_UNKNOWN;
1358 device->volume_status = CISS_LV_OK;
1359 device->volume_offline = false;
1360 } else {
1361 pqi_get_raid_level(ctrl_info, device);
1362 pqi_get_raid_bypass_status(ctrl_info, device);
1363 pqi_get_volume_status(ctrl_info, device);
1364 }
1365 }
1366
1367 if (pqi_get_device_id(ctrl_info, device->scsi3addr,
1368 device->unique_id, sizeof(device->unique_id)) < 0)
1369 dev_warn(&ctrl_info->pci_dev->dev,
1370 "Can't get device id for scsi %d:%d:%d:%d\n",
1371 ctrl_info->scsi_host->host_no,
1372 device->bus, device->target,
1373 device->lun);
1374
1375 out:
1376 kfree(buffer);
1377
1378 return rc;
1379 }
1380
1381 static void pqi_get_physical_disk_info(struct pqi_ctrl_info *ctrl_info,
1382 struct pqi_scsi_dev *device,
1383 struct bmic_identify_physical_device *id_phys)
1384 {
1385 int rc;
1386
1387 memset(id_phys, 0, sizeof(*id_phys));
1388
1389 rc = pqi_identify_physical_device(ctrl_info, device,
1390 id_phys, sizeof(*id_phys));
1391 if (rc) {
1392 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH;
1393 return;
1394 }
1395
1396 device->queue_depth =
1397 get_unaligned_le16(&id_phys->current_queue_depth_limit);
1398 device->device_type = id_phys->device_type;
1399 device->active_path_index = id_phys->active_path_number;
1400 device->path_map = id_phys->redundant_path_present_map;
1401 memcpy(&device->box,
1402 &id_phys->alternate_paths_phys_box_on_port,
1403 sizeof(device->box));
1404 memcpy(&device->phys_connector,
1405 &id_phys->alternate_paths_phys_connector,
1406 sizeof(device->phys_connector));
1407 device->bay = id_phys->phys_bay_in_box;
1408 }
1409
1410 static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info,
1411 struct pqi_scsi_dev *device)
1412 {
1413 char *status;
1414 static const char unknown_state_str[] =
1415 "Volume is in an unknown state (%u)";
1416 char unknown_state_buffer[sizeof(unknown_state_str) + 10];
1417
1418 switch (device->volume_status) {
1419 case CISS_LV_OK:
1420 status = "Volume online";
1421 break;
1422 case CISS_LV_FAILED:
1423 status = "Volume failed";
1424 break;
1425 case CISS_LV_NOT_CONFIGURED:
1426 status = "Volume not configured";
1427 break;
1428 case CISS_LV_DEGRADED:
1429 status = "Volume degraded";
1430 break;
1431 case CISS_LV_READY_FOR_RECOVERY:
1432 status = "Volume ready for recovery operation";
1433 break;
1434 case CISS_LV_UNDERGOING_RECOVERY:
1435 status = "Volume undergoing recovery";
1436 break;
1437 case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED:
1438 status = "Wrong physical drive was replaced";
1439 break;
1440 case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM:
1441 status = "A physical drive not properly connected";
1442 break;
1443 case CISS_LV_HARDWARE_OVERHEATING:
1444 status = "Hardware is overheating";
1445 break;
1446 case CISS_LV_HARDWARE_HAS_OVERHEATED:
1447 status = "Hardware has overheated";
1448 break;
1449 case CISS_LV_UNDERGOING_EXPANSION:
1450 status = "Volume undergoing expansion";
1451 break;
1452 case CISS_LV_NOT_AVAILABLE:
1453 status = "Volume waiting for transforming volume";
1454 break;
1455 case CISS_LV_QUEUED_FOR_EXPANSION:
1456 status = "Volume queued for expansion";
1457 break;
1458 case CISS_LV_DISABLED_SCSI_ID_CONFLICT:
1459 status = "Volume disabled due to SCSI ID conflict";
1460 break;
1461 case CISS_LV_EJECTED:
1462 status = "Volume has been ejected";
1463 break;
1464 case CISS_LV_UNDERGOING_ERASE:
1465 status = "Volume undergoing background erase";
1466 break;
1467 case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD:
1468 status = "Volume ready for predictive spare rebuild";
1469 break;
1470 case CISS_LV_UNDERGOING_RPI:
1471 status = "Volume undergoing rapid parity initialization";
1472 break;
1473 case CISS_LV_PENDING_RPI:
1474 status = "Volume queued for rapid parity initialization";
1475 break;
1476 case CISS_LV_ENCRYPTED_NO_KEY:
1477 status = "Encrypted volume inaccessible - key not present";
1478 break;
1479 case CISS_LV_UNDERGOING_ENCRYPTION:
1480 status = "Volume undergoing encryption process";
1481 break;
1482 case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING:
1483 status = "Volume undergoing encryption re-keying process";
1484 break;
1485 case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1486 status = "Volume encrypted but encryption is disabled";
1487 break;
1488 case CISS_LV_PENDING_ENCRYPTION:
1489 status = "Volume pending migration to encrypted state";
1490 break;
1491 case CISS_LV_PENDING_ENCRYPTION_REKEYING:
1492 status = "Volume pending encryption rekeying";
1493 break;
1494 case CISS_LV_NOT_SUPPORTED:
1495 status = "Volume not supported on this controller";
1496 break;
1497 case CISS_LV_STATUS_UNAVAILABLE:
1498 status = "Volume status not available";
1499 break;
1500 default:
1501 snprintf(unknown_state_buffer, sizeof(unknown_state_buffer),
1502 unknown_state_str, device->volume_status);
1503 status = unknown_state_buffer;
1504 break;
1505 }
1506
1507 dev_info(&ctrl_info->pci_dev->dev,
1508 "scsi %d:%d:%d:%d %s\n",
1509 ctrl_info->scsi_host->host_no,
1510 device->bus, device->target, device->lun, status);
1511 }
1512
1513 static void pqi_rescan_worker(struct work_struct *work)
1514 {
1515 struct pqi_ctrl_info *ctrl_info;
1516
1517 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
1518 rescan_work);
1519
1520 pqi_scan_scsi_devices(ctrl_info);
1521 }
1522
1523 static int pqi_add_device(struct pqi_ctrl_info *ctrl_info,
1524 struct pqi_scsi_dev *device)
1525 {
1526 int rc;
1527
1528 if (pqi_is_logical_device(device))
1529 rc = scsi_add_device(ctrl_info->scsi_host, device->bus,
1530 device->target, device->lun);
1531 else
1532 rc = pqi_add_sas_device(ctrl_info->sas_host, device);
1533
1534 return rc;
1535 }
1536
1537 #define PQI_PENDING_IO_TIMEOUT_SECS 20
1538
1539 static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info,
1540 struct pqi_scsi_dev *device)
1541 {
1542 int rc;
1543
1544 pqi_device_remove_start(device);
1545
1546 rc = pqi_device_wait_for_pending_io(ctrl_info, device,
1547 PQI_PENDING_IO_TIMEOUT_SECS);
1548 if (rc)
1549 dev_err(&ctrl_info->pci_dev->dev,
1550 "scsi %d:%d:%d:%d removing device with %d outstanding commands\n",
1551 ctrl_info->scsi_host->host_no, device->bus,
1552 device->target, device->lun,
1553 atomic_read(&device->scsi_cmds_outstanding));
1554
1555 if (pqi_is_logical_device(device))
1556 scsi_remove_device(device->sdev);
1557 else
1558 pqi_remove_sas_device(device);
1559 }
1560
1561 /* Assumes the SCSI device list lock is held. */
1562
1563 static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info,
1564 int bus, int target, int lun)
1565 {
1566 struct pqi_scsi_dev *device;
1567
1568 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1569 scsi_device_list_entry)
1570 if (device->bus == bus && device->target == target &&
1571 device->lun == lun)
1572 return device;
1573
1574 return NULL;
1575 }
1576
1577 static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1,
1578 struct pqi_scsi_dev *dev2)
1579 {
1580 if (dev1->is_physical_device != dev2->is_physical_device)
1581 return false;
1582
1583 if (dev1->is_physical_device)
1584 return dev1->wwid == dev2->wwid;
1585
1586 return memcmp(dev1->volume_id, dev2->volume_id,
1587 sizeof(dev1->volume_id)) == 0;
1588 }
1589
1590 enum pqi_find_result {
1591 DEVICE_NOT_FOUND,
1592 DEVICE_CHANGED,
1593 DEVICE_SAME,
1594 };
1595
1596 static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info,
1597 struct pqi_scsi_dev *device_to_find,
1598 struct pqi_scsi_dev **matching_device)
1599 {
1600 struct pqi_scsi_dev *device;
1601
1602 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1603 scsi_device_list_entry) {
1604 if (pqi_scsi3addr_equal(device_to_find->scsi3addr,
1605 device->scsi3addr)) {
1606 *matching_device = device;
1607 if (pqi_device_equal(device_to_find, device)) {
1608 if (device_to_find->volume_offline)
1609 return DEVICE_CHANGED;
1610 return DEVICE_SAME;
1611 }
1612 return DEVICE_CHANGED;
1613 }
1614 }
1615
1616 return DEVICE_NOT_FOUND;
1617 }
1618
1619 static inline const char *pqi_device_type(struct pqi_scsi_dev *device)
1620 {
1621 if (device->is_expander_smp_device)
1622 return "Enclosure SMP ";
1623
1624 return scsi_device_type(device->devtype);
1625 }
1626
1627 #define PQI_DEV_INFO_BUFFER_LENGTH 128
1628
1629 static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info,
1630 char *action, struct pqi_scsi_dev *device)
1631 {
1632 ssize_t count;
1633 char buffer[PQI_DEV_INFO_BUFFER_LENGTH];
1634
1635 count = snprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH,
1636 "%d:%d:", ctrl_info->scsi_host->host_no, device->bus);
1637
1638 if (device->target_lun_valid)
1639 count += snprintf(buffer + count,
1640 PQI_DEV_INFO_BUFFER_LENGTH - count,
1641 "%d:%d",
1642 device->target,
1643 device->lun);
1644 else
1645 count += snprintf(buffer + count,
1646 PQI_DEV_INFO_BUFFER_LENGTH - count,
1647 "-:-");
1648
1649 if (pqi_is_logical_device(device))
1650 count += snprintf(buffer + count,
1651 PQI_DEV_INFO_BUFFER_LENGTH - count,
1652 " %08x%08x",
1653 *((u32 *)&device->scsi3addr),
1654 *((u32 *)&device->scsi3addr[4]));
1655 else
1656 count += snprintf(buffer + count,
1657 PQI_DEV_INFO_BUFFER_LENGTH - count,
1658 " %016llx", device->sas_address);
1659
1660 count += snprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count,
1661 " %s %.8s %.16s ",
1662 pqi_device_type(device),
1663 device->vendor,
1664 device->model);
1665
1666 if (pqi_is_logical_device(device)) {
1667 if (device->devtype == TYPE_DISK)
1668 count += snprintf(buffer + count,
1669 PQI_DEV_INFO_BUFFER_LENGTH - count,
1670 "SSDSmartPathCap%c En%c %-12s",
1671 device->raid_bypass_configured ? '+' : '-',
1672 device->raid_bypass_enabled ? '+' : '-',
1673 pqi_raid_level_to_string(device->raid_level));
1674 } else {
1675 count += snprintf(buffer + count,
1676 PQI_DEV_INFO_BUFFER_LENGTH - count,
1677 "AIO%c", device->aio_enabled ? '+' : '-');
1678 if (device->devtype == TYPE_DISK ||
1679 device->devtype == TYPE_ZBC)
1680 count += snprintf(buffer + count,
1681 PQI_DEV_INFO_BUFFER_LENGTH - count,
1682 " qd=%-6d", device->queue_depth);
1683 }
1684
1685 dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer);
1686 }
1687
1688 /* Assumes the SCSI device list lock is held. */
1689
1690 static void pqi_scsi_update_device(struct pqi_scsi_dev *existing_device,
1691 struct pqi_scsi_dev *new_device)
1692 {
1693 existing_device->devtype = new_device->devtype;
1694 existing_device->device_type = new_device->device_type;
1695 existing_device->bus = new_device->bus;
1696 if (new_device->target_lun_valid) {
1697 existing_device->target = new_device->target;
1698 existing_device->lun = new_device->lun;
1699 existing_device->target_lun_valid = true;
1700 }
1701
1702 /* By definition, the scsi3addr and wwid fields are already the same. */
1703
1704 existing_device->is_physical_device = new_device->is_physical_device;
1705 existing_device->is_external_raid_device =
1706 new_device->is_external_raid_device;
1707 existing_device->is_expander_smp_device =
1708 new_device->is_expander_smp_device;
1709 existing_device->aio_enabled = new_device->aio_enabled;
1710 memcpy(existing_device->vendor, new_device->vendor,
1711 sizeof(existing_device->vendor));
1712 memcpy(existing_device->model, new_device->model,
1713 sizeof(existing_device->model));
1714 existing_device->sas_address = new_device->sas_address;
1715 existing_device->raid_level = new_device->raid_level;
1716 existing_device->queue_depth = new_device->queue_depth;
1717 existing_device->aio_handle = new_device->aio_handle;
1718 existing_device->volume_status = new_device->volume_status;
1719 existing_device->active_path_index = new_device->active_path_index;
1720 existing_device->path_map = new_device->path_map;
1721 existing_device->bay = new_device->bay;
1722 memcpy(existing_device->box, new_device->box,
1723 sizeof(existing_device->box));
1724 memcpy(existing_device->phys_connector, new_device->phys_connector,
1725 sizeof(existing_device->phys_connector));
1726 existing_device->offload_to_mirror = 0;
1727 kfree(existing_device->raid_map);
1728 existing_device->raid_map = new_device->raid_map;
1729 existing_device->raid_bypass_configured =
1730 new_device->raid_bypass_configured;
1731 existing_device->raid_bypass_enabled =
1732 new_device->raid_bypass_enabled;
1733 existing_device->device_offline = false;
1734
1735 /* To prevent this from being freed later. */
1736 new_device->raid_map = NULL;
1737 }
1738
1739 static inline void pqi_free_device(struct pqi_scsi_dev *device)
1740 {
1741 if (device) {
1742 kfree(device->raid_map);
1743 kfree(device);
1744 }
1745 }
1746
1747 /*
1748 * Called when exposing a new device to the OS fails in order to re-adjust
1749 * our internal SCSI device list to match the SCSI ML's view.
1750 */
1751
1752 static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info,
1753 struct pqi_scsi_dev *device)
1754 {
1755 unsigned long flags;
1756
1757 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
1758 list_del(&device->scsi_device_list_entry);
1759 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
1760
1761 /* Allow the device structure to be freed later. */
1762 device->keep_device = false;
1763 }
1764
1765 static inline bool pqi_is_device_added(struct pqi_scsi_dev *device)
1766 {
1767 if (device->is_expander_smp_device)
1768 return device->sas_port != NULL;
1769
1770 return device->sdev != NULL;
1771 }
1772
1773 static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info,
1774 struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices)
1775 {
1776 int rc;
1777 unsigned int i;
1778 unsigned long flags;
1779 enum pqi_find_result find_result;
1780 struct pqi_scsi_dev *device;
1781 struct pqi_scsi_dev *next;
1782 struct pqi_scsi_dev *matching_device;
1783 LIST_HEAD(add_list);
1784 LIST_HEAD(delete_list);
1785
1786 /*
1787 * The idea here is to do as little work as possible while holding the
1788 * spinlock. That's why we go to great pains to defer anything other
1789 * than updating the internal device list until after we release the
1790 * spinlock.
1791 */
1792
1793 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
1794
1795 /* Assume that all devices in the existing list have gone away. */
1796 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1797 scsi_device_list_entry)
1798 device->device_gone = true;
1799
1800 for (i = 0; i < num_new_devices; i++) {
1801 device = new_device_list[i];
1802
1803 find_result = pqi_scsi_find_entry(ctrl_info, device,
1804 &matching_device);
1805
1806 switch (find_result) {
1807 case DEVICE_SAME:
1808 /*
1809 * The newly found device is already in the existing
1810 * device list.
1811 */
1812 device->new_device = false;
1813 matching_device->device_gone = false;
1814 pqi_scsi_update_device(matching_device, device);
1815 break;
1816 case DEVICE_NOT_FOUND:
1817 /*
1818 * The newly found device is NOT in the existing device
1819 * list.
1820 */
1821 device->new_device = true;
1822 break;
1823 case DEVICE_CHANGED:
1824 /*
1825 * The original device has gone away and we need to add
1826 * the new device.
1827 */
1828 device->new_device = true;
1829 break;
1830 }
1831 }
1832
1833 /* Process all devices that have gone away. */
1834 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list,
1835 scsi_device_list_entry) {
1836 if (device->device_gone) {
1837 list_del(&device->scsi_device_list_entry);
1838 list_add_tail(&device->delete_list_entry, &delete_list);
1839 }
1840 }
1841
1842 /* Process all new devices. */
1843 for (i = 0; i < num_new_devices; i++) {
1844 device = new_device_list[i];
1845 if (!device->new_device)
1846 continue;
1847 if (device->volume_offline)
1848 continue;
1849 list_add_tail(&device->scsi_device_list_entry,
1850 &ctrl_info->scsi_device_list);
1851 list_add_tail(&device->add_list_entry, &add_list);
1852 /* To prevent this device structure from being freed later. */
1853 device->keep_device = true;
1854 }
1855
1856 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
1857
1858 if (pqi_ctrl_in_ofa(ctrl_info))
1859 pqi_ctrl_ofa_done(ctrl_info);
1860
1861 /* Remove all devices that have gone away. */
1862 list_for_each_entry_safe(device, next, &delete_list,
1863 delete_list_entry) {
1864 if (device->volume_offline) {
1865 pqi_dev_info(ctrl_info, "offline", device);
1866 pqi_show_volume_status(ctrl_info, device);
1867 } else {
1868 pqi_dev_info(ctrl_info, "removed", device);
1869 }
1870 if (pqi_is_device_added(device))
1871 pqi_remove_device(ctrl_info, device);
1872 list_del(&device->delete_list_entry);
1873 pqi_free_device(device);
1874 }
1875
1876 /*
1877 * Notify the SCSI ML if the queue depth of any existing device has
1878 * changed.
1879 */
1880 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1881 scsi_device_list_entry) {
1882 if (device->sdev && device->queue_depth !=
1883 device->advertised_queue_depth) {
1884 device->advertised_queue_depth = device->queue_depth;
1885 scsi_change_queue_depth(device->sdev,
1886 device->advertised_queue_depth);
1887 }
1888 }
1889
1890 /* Expose any new devices. */
1891 list_for_each_entry_safe(device, next, &add_list, add_list_entry) {
1892 if (!pqi_is_device_added(device)) {
1893 pqi_dev_info(ctrl_info, "added", device);
1894 rc = pqi_add_device(ctrl_info, device);
1895 if (rc) {
1896 dev_warn(&ctrl_info->pci_dev->dev,
1897 "scsi %d:%d:%d:%d addition failed, device not added\n",
1898 ctrl_info->scsi_host->host_no,
1899 device->bus, device->target,
1900 device->lun);
1901 pqi_fixup_botched_add(ctrl_info, device);
1902 }
1903 }
1904 }
1905 }
1906
1907 static bool pqi_is_supported_device(struct pqi_scsi_dev *device)
1908 {
1909 bool is_supported;
1910
1911 if (device->is_expander_smp_device)
1912 return true;
1913
1914 is_supported = false;
1915
1916 switch (device->devtype) {
1917 case TYPE_DISK:
1918 case TYPE_ZBC:
1919 case TYPE_TAPE:
1920 case TYPE_MEDIUM_CHANGER:
1921 case TYPE_ENCLOSURE:
1922 is_supported = true;
1923 break;
1924 case TYPE_RAID:
1925 /*
1926 * Only support the HBA controller itself as a RAID
1927 * controller. If it's a RAID controller other than
1928 * the HBA itself (an external RAID controller, for
1929 * example), we don't support it.
1930 */
1931 if (pqi_is_hba_lunid(device->scsi3addr))
1932 is_supported = true;
1933 break;
1934 }
1935
1936 return is_supported;
1937 }
1938
1939 static inline bool pqi_skip_device(u8 *scsi3addr)
1940 {
1941 /* Ignore all masked devices. */
1942 if (MASKED_DEVICE(scsi3addr))
1943 return true;
1944
1945 return false;
1946 }
1947
1948 static inline bool pqi_is_device_with_sas_address(struct pqi_scsi_dev *device)
1949 {
1950 if (!device->is_physical_device)
1951 return false;
1952
1953 if (device->is_expander_smp_device)
1954 return true;
1955
1956 switch (device->devtype) {
1957 case TYPE_DISK:
1958 case TYPE_ZBC:
1959 case TYPE_ENCLOSURE:
1960 return true;
1961 }
1962
1963 return false;
1964 }
1965
1966 static inline bool pqi_expose_device(struct pqi_scsi_dev *device)
1967 {
1968 return !device->is_physical_device ||
1969 !pqi_skip_device(device->scsi3addr);
1970 }
1971
1972 static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info)
1973 {
1974 int i;
1975 int rc;
1976 LIST_HEAD(new_device_list_head);
1977 struct report_phys_lun_extended *physdev_list = NULL;
1978 struct report_log_lun_extended *logdev_list = NULL;
1979 struct report_phys_lun_extended_entry *phys_lun_ext_entry;
1980 struct report_log_lun_extended_entry *log_lun_ext_entry;
1981 struct bmic_identify_physical_device *id_phys = NULL;
1982 u32 num_physicals;
1983 u32 num_logicals;
1984 struct pqi_scsi_dev **new_device_list = NULL;
1985 struct pqi_scsi_dev *device;
1986 struct pqi_scsi_dev *next;
1987 unsigned int num_new_devices;
1988 unsigned int num_valid_devices;
1989 bool is_physical_device;
1990 u8 *scsi3addr;
1991 static char *out_of_memory_msg =
1992 "failed to allocate memory, device discovery stopped";
1993
1994 rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list);
1995 if (rc)
1996 goto out;
1997
1998 if (physdev_list)
1999 num_physicals =
2000 get_unaligned_be32(&physdev_list->header.list_length)
2001 / sizeof(physdev_list->lun_entries[0]);
2002 else
2003 num_physicals = 0;
2004
2005 if (logdev_list)
2006 num_logicals =
2007 get_unaligned_be32(&logdev_list->header.list_length)
2008 / sizeof(logdev_list->lun_entries[0]);
2009 else
2010 num_logicals = 0;
2011
2012 if (num_physicals) {
2013 /*
2014 * We need this buffer for calls to pqi_get_physical_disk_info()
2015 * below. We allocate it here instead of inside
2016 * pqi_get_physical_disk_info() because it's a fairly large
2017 * buffer.
2018 */
2019 id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL);
2020 if (!id_phys) {
2021 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2022 out_of_memory_msg);
2023 rc = -ENOMEM;
2024 goto out;
2025 }
2026 }
2027
2028 num_new_devices = num_physicals + num_logicals;
2029
2030 new_device_list = kmalloc_array(num_new_devices,
2031 sizeof(*new_device_list),
2032 GFP_KERNEL);
2033 if (!new_device_list) {
2034 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg);
2035 rc = -ENOMEM;
2036 goto out;
2037 }
2038
2039 for (i = 0; i < num_new_devices; i++) {
2040 device = kzalloc(sizeof(*device), GFP_KERNEL);
2041 if (!device) {
2042 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2043 out_of_memory_msg);
2044 rc = -ENOMEM;
2045 goto out;
2046 }
2047 list_add_tail(&device->new_device_list_entry,
2048 &new_device_list_head);
2049 }
2050
2051 device = NULL;
2052 num_valid_devices = 0;
2053
2054 for (i = 0; i < num_new_devices; i++) {
2055
2056 if (i < num_physicals) {
2057 is_physical_device = true;
2058 phys_lun_ext_entry = &physdev_list->lun_entries[i];
2059 log_lun_ext_entry = NULL;
2060 scsi3addr = phys_lun_ext_entry->lunid;
2061 } else {
2062 is_physical_device = false;
2063 phys_lun_ext_entry = NULL;
2064 log_lun_ext_entry =
2065 &logdev_list->lun_entries[i - num_physicals];
2066 scsi3addr = log_lun_ext_entry->lunid;
2067 }
2068
2069 if (is_physical_device && pqi_skip_device(scsi3addr))
2070 continue;
2071
2072 if (device)
2073 device = list_next_entry(device, new_device_list_entry);
2074 else
2075 device = list_first_entry(&new_device_list_head,
2076 struct pqi_scsi_dev, new_device_list_entry);
2077
2078 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
2079 device->is_physical_device = is_physical_device;
2080 if (is_physical_device) {
2081 if (phys_lun_ext_entry->device_type ==
2082 SA_EXPANDER_SMP_DEVICE)
2083 device->is_expander_smp_device = true;
2084 } else {
2085 device->is_external_raid_device =
2086 pqi_is_external_raid_addr(scsi3addr);
2087 }
2088
2089 /* Gather information about the device. */
2090 rc = pqi_get_device_info(ctrl_info, device);
2091 if (rc == -ENOMEM) {
2092 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2093 out_of_memory_msg);
2094 goto out;
2095 }
2096 if (rc) {
2097 if (device->is_physical_device)
2098 dev_warn(&ctrl_info->pci_dev->dev,
2099 "obtaining device info failed, skipping physical device %016llx\n",
2100 get_unaligned_be64(
2101 &phys_lun_ext_entry->wwid));
2102 else
2103 dev_warn(&ctrl_info->pci_dev->dev,
2104 "obtaining device info failed, skipping logical device %08x%08x\n",
2105 *((u32 *)&device->scsi3addr),
2106 *((u32 *)&device->scsi3addr[4]));
2107 rc = 0;
2108 continue;
2109 }
2110
2111 if (!pqi_is_supported_device(device))
2112 continue;
2113
2114 pqi_assign_bus_target_lun(device);
2115
2116 if (device->is_physical_device) {
2117 device->wwid = phys_lun_ext_entry->wwid;
2118 if ((phys_lun_ext_entry->device_flags &
2119 REPORT_PHYS_LUN_DEV_FLAG_AIO_ENABLED) &&
2120 phys_lun_ext_entry->aio_handle) {
2121 device->aio_enabled = true;
2122 device->aio_handle =
2123 phys_lun_ext_entry->aio_handle;
2124 }
2125 if (device->devtype == TYPE_DISK ||
2126 device->devtype == TYPE_ZBC) {
2127 pqi_get_physical_disk_info(ctrl_info,
2128 device, id_phys);
2129 }
2130 } else {
2131 memcpy(device->volume_id, log_lun_ext_entry->volume_id,
2132 sizeof(device->volume_id));
2133 }
2134
2135 if (pqi_is_device_with_sas_address(device))
2136 device->sas_address = get_unaligned_be64(&device->wwid);
2137
2138 new_device_list[num_valid_devices++] = device;
2139 }
2140
2141 pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices);
2142
2143 out:
2144 list_for_each_entry_safe(device, next, &new_device_list_head,
2145 new_device_list_entry) {
2146 if (device->keep_device)
2147 continue;
2148 list_del(&device->new_device_list_entry);
2149 pqi_free_device(device);
2150 }
2151
2152 kfree(new_device_list);
2153 kfree(physdev_list);
2154 kfree(logdev_list);
2155 kfree(id_phys);
2156
2157 return rc;
2158 }
2159
2160 static void pqi_remove_all_scsi_devices(struct pqi_ctrl_info *ctrl_info)
2161 {
2162 unsigned long flags;
2163 struct pqi_scsi_dev *device;
2164
2165 while (1) {
2166 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
2167
2168 device = list_first_entry_or_null(&ctrl_info->scsi_device_list,
2169 struct pqi_scsi_dev, scsi_device_list_entry);
2170 if (device)
2171 list_del(&device->scsi_device_list_entry);
2172
2173 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
2174 flags);
2175
2176 if (!device)
2177 break;
2178
2179 if (pqi_is_device_added(device))
2180 pqi_remove_device(ctrl_info, device);
2181 pqi_free_device(device);
2182 }
2183 }
2184
2185 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info)
2186 {
2187 int rc;
2188
2189 if (pqi_ctrl_offline(ctrl_info))
2190 return -ENXIO;
2191
2192 mutex_lock(&ctrl_info->scan_mutex);
2193
2194 rc = pqi_update_scsi_devices(ctrl_info);
2195 if (rc)
2196 pqi_schedule_rescan_worker_delayed(ctrl_info);
2197
2198 mutex_unlock(&ctrl_info->scan_mutex);
2199
2200 return rc;
2201 }
2202
2203 static void pqi_scan_start(struct Scsi_Host *shost)
2204 {
2205 struct pqi_ctrl_info *ctrl_info;
2206
2207 ctrl_info = shost_to_hba(shost);
2208 if (pqi_ctrl_in_ofa(ctrl_info))
2209 return;
2210
2211 pqi_scan_scsi_devices(ctrl_info);
2212 }
2213
2214 /* Returns TRUE if scan is finished. */
2215
2216 static int pqi_scan_finished(struct Scsi_Host *shost,
2217 unsigned long elapsed_time)
2218 {
2219 struct pqi_ctrl_info *ctrl_info;
2220
2221 ctrl_info = shost_priv(shost);
2222
2223 return !mutex_is_locked(&ctrl_info->scan_mutex);
2224 }
2225
2226 static void pqi_wait_until_scan_finished(struct pqi_ctrl_info *ctrl_info)
2227 {
2228 mutex_lock(&ctrl_info->scan_mutex);
2229 mutex_unlock(&ctrl_info->scan_mutex);
2230 }
2231
2232 static void pqi_wait_until_lun_reset_finished(struct pqi_ctrl_info *ctrl_info)
2233 {
2234 mutex_lock(&ctrl_info->lun_reset_mutex);
2235 mutex_unlock(&ctrl_info->lun_reset_mutex);
2236 }
2237
2238 static void pqi_wait_until_ofa_finished(struct pqi_ctrl_info *ctrl_info)
2239 {
2240 mutex_lock(&ctrl_info->ofa_mutex);
2241 mutex_unlock(&ctrl_info->ofa_mutex);
2242 }
2243
2244 static inline void pqi_set_encryption_info(
2245 struct pqi_encryption_info *encryption_info, struct raid_map *raid_map,
2246 u64 first_block)
2247 {
2248 u32 volume_blk_size;
2249
2250 /*
2251 * Set the encryption tweak values based on logical block address.
2252 * If the block size is 512, the tweak value is equal to the LBA.
2253 * For other block sizes, tweak value is (LBA * block size) / 512.
2254 */
2255 volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size);
2256 if (volume_blk_size != 512)
2257 first_block = (first_block * volume_blk_size) / 512;
2258
2259 encryption_info->data_encryption_key_index =
2260 get_unaligned_le16(&raid_map->data_encryption_key_index);
2261 encryption_info->encrypt_tweak_lower = lower_32_bits(first_block);
2262 encryption_info->encrypt_tweak_upper = upper_32_bits(first_block);
2263 }
2264
2265 /*
2266 * Attempt to perform RAID bypass mapping for a logical volume I/O.
2267 */
2268
2269 #define PQI_RAID_BYPASS_INELIGIBLE 1
2270
2271 static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
2272 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
2273 struct pqi_queue_group *queue_group)
2274 {
2275 struct raid_map *raid_map;
2276 bool is_write = false;
2277 u32 map_index;
2278 u64 first_block;
2279 u64 last_block;
2280 u32 block_cnt;
2281 u32 blocks_per_row;
2282 u64 first_row;
2283 u64 last_row;
2284 u32 first_row_offset;
2285 u32 last_row_offset;
2286 u32 first_column;
2287 u32 last_column;
2288 u64 r0_first_row;
2289 u64 r0_last_row;
2290 u32 r5or6_blocks_per_row;
2291 u64 r5or6_first_row;
2292 u64 r5or6_last_row;
2293 u32 r5or6_first_row_offset;
2294 u32 r5or6_last_row_offset;
2295 u32 r5or6_first_column;
2296 u32 r5or6_last_column;
2297 u16 data_disks_per_row;
2298 u32 total_disks_per_row;
2299 u16 layout_map_count;
2300 u32 stripesize;
2301 u16 strip_size;
2302 u32 first_group;
2303 u32 last_group;
2304 u32 current_group;
2305 u32 map_row;
2306 u32 aio_handle;
2307 u64 disk_block;
2308 u32 disk_block_cnt;
2309 u8 cdb[16];
2310 u8 cdb_length;
2311 int offload_to_mirror;
2312 struct pqi_encryption_info *encryption_info_ptr;
2313 struct pqi_encryption_info encryption_info;
2314 #if BITS_PER_LONG == 32
2315 u64 tmpdiv;
2316 #endif
2317
2318 /* Check for valid opcode, get LBA and block count. */
2319 switch (scmd->cmnd[0]) {
2320 case WRITE_6:
2321 is_write = true;
2322 /* fall through */
2323 case READ_6:
2324 first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) |
2325 (scmd->cmnd[2] << 8) | scmd->cmnd[3]);
2326 block_cnt = (u32)scmd->cmnd[4];
2327 if (block_cnt == 0)
2328 block_cnt = 256;
2329 break;
2330 case WRITE_10:
2331 is_write = true;
2332 /* fall through */
2333 case READ_10:
2334 first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2335 block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]);
2336 break;
2337 case WRITE_12:
2338 is_write = true;
2339 /* fall through */
2340 case READ_12:
2341 first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2342 block_cnt = get_unaligned_be32(&scmd->cmnd[6]);
2343 break;
2344 case WRITE_16:
2345 is_write = true;
2346 /* fall through */
2347 case READ_16:
2348 first_block = get_unaligned_be64(&scmd->cmnd[2]);
2349 block_cnt = get_unaligned_be32(&scmd->cmnd[10]);
2350 break;
2351 default:
2352 /* Process via normal I/O path. */
2353 return PQI_RAID_BYPASS_INELIGIBLE;
2354 }
2355
2356 /* Check for write to non-RAID-0. */
2357 if (is_write && device->raid_level != SA_RAID_0)
2358 return PQI_RAID_BYPASS_INELIGIBLE;
2359
2360 if (unlikely(block_cnt == 0))
2361 return PQI_RAID_BYPASS_INELIGIBLE;
2362
2363 last_block = first_block + block_cnt - 1;
2364 raid_map = device->raid_map;
2365
2366 /* Check for invalid block or wraparound. */
2367 if (last_block >= get_unaligned_le64(&raid_map->volume_blk_cnt) ||
2368 last_block < first_block)
2369 return PQI_RAID_BYPASS_INELIGIBLE;
2370
2371 data_disks_per_row = get_unaligned_le16(&raid_map->data_disks_per_row);
2372 strip_size = get_unaligned_le16(&raid_map->strip_size);
2373 layout_map_count = get_unaligned_le16(&raid_map->layout_map_count);
2374
2375 /* Calculate stripe information for the request. */
2376 blocks_per_row = data_disks_per_row * strip_size;
2377 #if BITS_PER_LONG == 32
2378 tmpdiv = first_block;
2379 do_div(tmpdiv, blocks_per_row);
2380 first_row = tmpdiv;
2381 tmpdiv = last_block;
2382 do_div(tmpdiv, blocks_per_row);
2383 last_row = tmpdiv;
2384 first_row_offset = (u32)(first_block - (first_row * blocks_per_row));
2385 last_row_offset = (u32)(last_block - (last_row * blocks_per_row));
2386 tmpdiv = first_row_offset;
2387 do_div(tmpdiv, strip_size);
2388 first_column = tmpdiv;
2389 tmpdiv = last_row_offset;
2390 do_div(tmpdiv, strip_size);
2391 last_column = tmpdiv;
2392 #else
2393 first_row = first_block / blocks_per_row;
2394 last_row = last_block / blocks_per_row;
2395 first_row_offset = (u32)(first_block - (first_row * blocks_per_row));
2396 last_row_offset = (u32)(last_block - (last_row * blocks_per_row));
2397 first_column = first_row_offset / strip_size;
2398 last_column = last_row_offset / strip_size;
2399 #endif
2400
2401 /* If this isn't a single row/column then give to the controller. */
2402 if (first_row != last_row || first_column != last_column)
2403 return PQI_RAID_BYPASS_INELIGIBLE;
2404
2405 /* Proceeding with driver mapping. */
2406 total_disks_per_row = data_disks_per_row +
2407 get_unaligned_le16(&raid_map->metadata_disks_per_row);
2408 map_row = ((u32)(first_row >> raid_map->parity_rotation_shift)) %
2409 get_unaligned_le16(&raid_map->row_cnt);
2410 map_index = (map_row * total_disks_per_row) + first_column;
2411
2412 /* RAID 1 */
2413 if (device->raid_level == SA_RAID_1) {
2414 if (device->offload_to_mirror)
2415 map_index += data_disks_per_row;
2416 device->offload_to_mirror = !device->offload_to_mirror;
2417 } else if (device->raid_level == SA_RAID_ADM) {
2418 /* RAID ADM */
2419 /*
2420 * Handles N-way mirrors (R1-ADM) and R10 with # of drives
2421 * divisible by 3.
2422 */
2423 offload_to_mirror = device->offload_to_mirror;
2424 if (offload_to_mirror == 0) {
2425 /* use physical disk in the first mirrored group. */
2426 map_index %= data_disks_per_row;
2427 } else {
2428 do {
2429 /*
2430 * Determine mirror group that map_index
2431 * indicates.
2432 */
2433 current_group = map_index / data_disks_per_row;
2434
2435 if (offload_to_mirror != current_group) {
2436 if (current_group <
2437 layout_map_count - 1) {
2438 /*
2439 * Select raid index from
2440 * next group.
2441 */
2442 map_index += data_disks_per_row;
2443 current_group++;
2444 } else {
2445 /*
2446 * Select raid index from first
2447 * group.
2448 */
2449 map_index %= data_disks_per_row;
2450 current_group = 0;
2451 }
2452 }
2453 } while (offload_to_mirror != current_group);
2454 }
2455
2456 /* Set mirror group to use next time. */
2457 offload_to_mirror =
2458 (offload_to_mirror >= layout_map_count - 1) ?
2459 0 : offload_to_mirror + 1;
2460 WARN_ON(offload_to_mirror >= layout_map_count);
2461 device->offload_to_mirror = offload_to_mirror;
2462 /*
2463 * Avoid direct use of device->offload_to_mirror within this
2464 * function since multiple threads might simultaneously
2465 * increment it beyond the range of device->layout_map_count -1.
2466 */
2467 } else if ((device->raid_level == SA_RAID_5 ||
2468 device->raid_level == SA_RAID_6) && layout_map_count > 1) {
2469 /* RAID 50/60 */
2470 /* Verify first and last block are in same RAID group */
2471 r5or6_blocks_per_row = strip_size * data_disks_per_row;
2472 stripesize = r5or6_blocks_per_row * layout_map_count;
2473 #if BITS_PER_LONG == 32
2474 tmpdiv = first_block;
2475 first_group = do_div(tmpdiv, stripesize);
2476 tmpdiv = first_group;
2477 do_div(tmpdiv, r5or6_blocks_per_row);
2478 first_group = tmpdiv;
2479 tmpdiv = last_block;
2480 last_group = do_div(tmpdiv, stripesize);
2481 tmpdiv = last_group;
2482 do_div(tmpdiv, r5or6_blocks_per_row);
2483 last_group = tmpdiv;
2484 #else
2485 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
2486 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
2487 #endif
2488 if (first_group != last_group)
2489 return PQI_RAID_BYPASS_INELIGIBLE;
2490
2491 /* Verify request is in a single row of RAID 5/6 */
2492 #if BITS_PER_LONG == 32
2493 tmpdiv = first_block;
2494 do_div(tmpdiv, stripesize);
2495 first_row = r5or6_first_row = r0_first_row = tmpdiv;
2496 tmpdiv = last_block;
2497 do_div(tmpdiv, stripesize);
2498 r5or6_last_row = r0_last_row = tmpdiv;
2499 #else
2500 first_row = r5or6_first_row = r0_first_row =
2501 first_block / stripesize;
2502 r5or6_last_row = r0_last_row = last_block / stripesize;
2503 #endif
2504 if (r5or6_first_row != r5or6_last_row)
2505 return PQI_RAID_BYPASS_INELIGIBLE;
2506
2507 /* Verify request is in a single column */
2508 #if BITS_PER_LONG == 32
2509 tmpdiv = first_block;
2510 first_row_offset = do_div(tmpdiv, stripesize);
2511 tmpdiv = first_row_offset;
2512 first_row_offset = (u32)do_div(tmpdiv, r5or6_blocks_per_row);
2513 r5or6_first_row_offset = first_row_offset;
2514 tmpdiv = last_block;
2515 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
2516 tmpdiv = r5or6_last_row_offset;
2517 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
2518 tmpdiv = r5or6_first_row_offset;
2519 do_div(tmpdiv, strip_size);
2520 first_column = r5or6_first_column = tmpdiv;
2521 tmpdiv = r5or6_last_row_offset;
2522 do_div(tmpdiv, strip_size);
2523 r5or6_last_column = tmpdiv;
2524 #else
2525 first_row_offset = r5or6_first_row_offset =
2526 (u32)((first_block % stripesize) %
2527 r5or6_blocks_per_row);
2528
2529 r5or6_last_row_offset =
2530 (u32)((last_block % stripesize) %
2531 r5or6_blocks_per_row);
2532
2533 first_column = r5or6_first_row_offset / strip_size;
2534 r5or6_first_column = first_column;
2535 r5or6_last_column = r5or6_last_row_offset / strip_size;
2536 #endif
2537 if (r5or6_first_column != r5or6_last_column)
2538 return PQI_RAID_BYPASS_INELIGIBLE;
2539
2540 /* Request is eligible */
2541 map_row =
2542 ((u32)(first_row >> raid_map->parity_rotation_shift)) %
2543 get_unaligned_le16(&raid_map->row_cnt);
2544
2545 map_index = (first_group *
2546 (get_unaligned_le16(&raid_map->row_cnt) *
2547 total_disks_per_row)) +
2548 (map_row * total_disks_per_row) + first_column;
2549 }
2550
2551 aio_handle = raid_map->disk_data[map_index].aio_handle;
2552 disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) +
2553 first_row * strip_size +
2554 (first_row_offset - first_column * strip_size);
2555 disk_block_cnt = block_cnt;
2556
2557 /* Handle differing logical/physical block sizes. */
2558 if (raid_map->phys_blk_shift) {
2559 disk_block <<= raid_map->phys_blk_shift;
2560 disk_block_cnt <<= raid_map->phys_blk_shift;
2561 }
2562
2563 if (unlikely(disk_block_cnt > 0xffff))
2564 return PQI_RAID_BYPASS_INELIGIBLE;
2565
2566 /* Build the new CDB for the physical disk I/O. */
2567 if (disk_block > 0xffffffff) {
2568 cdb[0] = is_write ? WRITE_16 : READ_16;
2569 cdb[1] = 0;
2570 put_unaligned_be64(disk_block, &cdb[2]);
2571 put_unaligned_be32(disk_block_cnt, &cdb[10]);
2572 cdb[14] = 0;
2573 cdb[15] = 0;
2574 cdb_length = 16;
2575 } else {
2576 cdb[0] = is_write ? WRITE_10 : READ_10;
2577 cdb[1] = 0;
2578 put_unaligned_be32((u32)disk_block, &cdb[2]);
2579 cdb[6] = 0;
2580 put_unaligned_be16((u16)disk_block_cnt, &cdb[7]);
2581 cdb[9] = 0;
2582 cdb_length = 10;
2583 }
2584
2585 if (get_unaligned_le16(&raid_map->flags) &
2586 RAID_MAP_ENCRYPTION_ENABLED) {
2587 pqi_set_encryption_info(&encryption_info, raid_map,
2588 first_block);
2589 encryption_info_ptr = &encryption_info;
2590 } else {
2591 encryption_info_ptr = NULL;
2592 }
2593
2594 return pqi_aio_submit_io(ctrl_info, scmd, aio_handle,
2595 cdb, cdb_length, queue_group, encryption_info_ptr, true);
2596 }
2597
2598 #define PQI_STATUS_IDLE 0x0
2599
2600 #define PQI_CREATE_ADMIN_QUEUE_PAIR 1
2601 #define PQI_DELETE_ADMIN_QUEUE_PAIR 2
2602
2603 #define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0
2604 #define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1
2605 #define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2
2606 #define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3
2607 #define PQI_DEVICE_STATE_ERROR 0x4
2608
2609 #define PQI_MODE_READY_TIMEOUT_SECS 30
2610 #define PQI_MODE_READY_POLL_INTERVAL_MSECS 1
2611
2612 static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info)
2613 {
2614 struct pqi_device_registers __iomem *pqi_registers;
2615 unsigned long timeout;
2616 u64 signature;
2617 u8 status;
2618
2619 pqi_registers = ctrl_info->pqi_registers;
2620 timeout = (PQI_MODE_READY_TIMEOUT_SECS * PQI_HZ) + jiffies;
2621
2622 while (1) {
2623 signature = readq(&pqi_registers->signature);
2624 if (memcmp(&signature, PQI_DEVICE_SIGNATURE,
2625 sizeof(signature)) == 0)
2626 break;
2627 if (time_after(jiffies, timeout)) {
2628 dev_err(&ctrl_info->pci_dev->dev,
2629 "timed out waiting for PQI signature\n");
2630 return -ETIMEDOUT;
2631 }
2632 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2633 }
2634
2635 while (1) {
2636 status = readb(&pqi_registers->function_and_status_code);
2637 if (status == PQI_STATUS_IDLE)
2638 break;
2639 if (time_after(jiffies, timeout)) {
2640 dev_err(&ctrl_info->pci_dev->dev,
2641 "timed out waiting for PQI IDLE\n");
2642 return -ETIMEDOUT;
2643 }
2644 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2645 }
2646
2647 while (1) {
2648 if (readl(&pqi_registers->device_status) ==
2649 PQI_DEVICE_STATE_ALL_REGISTERS_READY)
2650 break;
2651 if (time_after(jiffies, timeout)) {
2652 dev_err(&ctrl_info->pci_dev->dev,
2653 "timed out waiting for PQI all registers ready\n");
2654 return -ETIMEDOUT;
2655 }
2656 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2657 }
2658
2659 return 0;
2660 }
2661
2662 static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request)
2663 {
2664 struct pqi_scsi_dev *device;
2665
2666 device = io_request->scmd->device->hostdata;
2667 device->raid_bypass_enabled = false;
2668 device->aio_enabled = false;
2669 }
2670
2671 static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path)
2672 {
2673 struct pqi_ctrl_info *ctrl_info;
2674 struct pqi_scsi_dev *device;
2675
2676 device = sdev->hostdata;
2677 if (device->device_offline)
2678 return;
2679
2680 device->device_offline = true;
2681 ctrl_info = shost_to_hba(sdev->host);
2682 pqi_schedule_rescan_worker(ctrl_info);
2683 dev_err(&ctrl_info->pci_dev->dev, "re-scanning %s scsi %d:%d:%d:%d\n",
2684 path, ctrl_info->scsi_host->host_no, device->bus,
2685 device->target, device->lun);
2686 }
2687
2688 static void pqi_process_raid_io_error(struct pqi_io_request *io_request)
2689 {
2690 u8 scsi_status;
2691 u8 host_byte;
2692 struct scsi_cmnd *scmd;
2693 struct pqi_raid_error_info *error_info;
2694 size_t sense_data_length;
2695 int residual_count;
2696 int xfer_count;
2697 struct scsi_sense_hdr sshdr;
2698
2699 scmd = io_request->scmd;
2700 if (!scmd)
2701 return;
2702
2703 error_info = io_request->error_info;
2704 scsi_status = error_info->status;
2705 host_byte = DID_OK;
2706
2707 switch (error_info->data_out_result) {
2708 case PQI_DATA_IN_OUT_GOOD:
2709 break;
2710 case PQI_DATA_IN_OUT_UNDERFLOW:
2711 xfer_count =
2712 get_unaligned_le32(&error_info->data_out_transferred);
2713 residual_count = scsi_bufflen(scmd) - xfer_count;
2714 scsi_set_resid(scmd, residual_count);
2715 if (xfer_count < scmd->underflow)
2716 host_byte = DID_SOFT_ERROR;
2717 break;
2718 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
2719 case PQI_DATA_IN_OUT_ABORTED:
2720 host_byte = DID_ABORT;
2721 break;
2722 case PQI_DATA_IN_OUT_TIMEOUT:
2723 host_byte = DID_TIME_OUT;
2724 break;
2725 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
2726 case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
2727 case PQI_DATA_IN_OUT_BUFFER_ERROR:
2728 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
2729 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
2730 case PQI_DATA_IN_OUT_ERROR:
2731 case PQI_DATA_IN_OUT_HARDWARE_ERROR:
2732 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
2733 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
2734 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
2735 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
2736 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
2737 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
2738 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
2739 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
2740 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
2741 default:
2742 host_byte = DID_ERROR;
2743 break;
2744 }
2745
2746 sense_data_length = get_unaligned_le16(&error_info->sense_data_length);
2747 if (sense_data_length == 0)
2748 sense_data_length =
2749 get_unaligned_le16(&error_info->response_data_length);
2750 if (sense_data_length) {
2751 if (sense_data_length > sizeof(error_info->data))
2752 sense_data_length = sizeof(error_info->data);
2753
2754 if (scsi_status == SAM_STAT_CHECK_CONDITION &&
2755 scsi_normalize_sense(error_info->data,
2756 sense_data_length, &sshdr) &&
2757 sshdr.sense_key == HARDWARE_ERROR &&
2758 sshdr.asc == 0x3e &&
2759 sshdr.ascq == 0x1) {
2760 struct pqi_ctrl_info *ctrl_info = shost_to_hba(scmd->device->host);
2761 struct pqi_scsi_dev *device = scmd->device->hostdata;
2762
2763 if (printk_ratelimit())
2764 scmd_printk(KERN_ERR, scmd, "received 'logical unit failure' from controller for scsi %d:%d:%d:%d\n",
2765 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun);
2766 pqi_take_device_offline(scmd->device, "RAID");
2767 host_byte = DID_NO_CONNECT;
2768 }
2769
2770 if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
2771 sense_data_length = SCSI_SENSE_BUFFERSIZE;
2772 memcpy(scmd->sense_buffer, error_info->data,
2773 sense_data_length);
2774 }
2775
2776 scmd->result = scsi_status;
2777 set_host_byte(scmd, host_byte);
2778 }
2779
2780 static void pqi_process_aio_io_error(struct pqi_io_request *io_request)
2781 {
2782 u8 scsi_status;
2783 u8 host_byte;
2784 struct scsi_cmnd *scmd;
2785 struct pqi_aio_error_info *error_info;
2786 size_t sense_data_length;
2787 int residual_count;
2788 int xfer_count;
2789 bool device_offline;
2790
2791 scmd = io_request->scmd;
2792 error_info = io_request->error_info;
2793 host_byte = DID_OK;
2794 sense_data_length = 0;
2795 device_offline = false;
2796
2797 switch (error_info->service_response) {
2798 case PQI_AIO_SERV_RESPONSE_COMPLETE:
2799 scsi_status = error_info->status;
2800 break;
2801 case PQI_AIO_SERV_RESPONSE_FAILURE:
2802 switch (error_info->status) {
2803 case PQI_AIO_STATUS_IO_ABORTED:
2804 scsi_status = SAM_STAT_TASK_ABORTED;
2805 break;
2806 case PQI_AIO_STATUS_UNDERRUN:
2807 scsi_status = SAM_STAT_GOOD;
2808 residual_count = get_unaligned_le32(
2809 &error_info->residual_count);
2810 scsi_set_resid(scmd, residual_count);
2811 xfer_count = scsi_bufflen(scmd) - residual_count;
2812 if (xfer_count < scmd->underflow)
2813 host_byte = DID_SOFT_ERROR;
2814 break;
2815 case PQI_AIO_STATUS_OVERRUN:
2816 scsi_status = SAM_STAT_GOOD;
2817 break;
2818 case PQI_AIO_STATUS_AIO_PATH_DISABLED:
2819 pqi_aio_path_disabled(io_request);
2820 scsi_status = SAM_STAT_GOOD;
2821 io_request->status = -EAGAIN;
2822 break;
2823 case PQI_AIO_STATUS_NO_PATH_TO_DEVICE:
2824 case PQI_AIO_STATUS_INVALID_DEVICE:
2825 if (!io_request->raid_bypass) {
2826 device_offline = true;
2827 pqi_take_device_offline(scmd->device, "AIO");
2828 host_byte = DID_NO_CONNECT;
2829 }
2830 scsi_status = SAM_STAT_CHECK_CONDITION;
2831 break;
2832 case PQI_AIO_STATUS_IO_ERROR:
2833 default:
2834 scsi_status = SAM_STAT_CHECK_CONDITION;
2835 break;
2836 }
2837 break;
2838 case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE:
2839 case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED:
2840 scsi_status = SAM_STAT_GOOD;
2841 break;
2842 case PQI_AIO_SERV_RESPONSE_TMF_REJECTED:
2843 case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN:
2844 default:
2845 scsi_status = SAM_STAT_CHECK_CONDITION;
2846 break;
2847 }
2848
2849 if (error_info->data_present) {
2850 sense_data_length =
2851 get_unaligned_le16(&error_info->data_length);
2852 if (sense_data_length) {
2853 if (sense_data_length > sizeof(error_info->data))
2854 sense_data_length = sizeof(error_info->data);
2855 if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
2856 sense_data_length = SCSI_SENSE_BUFFERSIZE;
2857 memcpy(scmd->sense_buffer, error_info->data,
2858 sense_data_length);
2859 }
2860 }
2861
2862 if (device_offline && sense_data_length == 0)
2863 scsi_build_sense_buffer(0, scmd->sense_buffer, HARDWARE_ERROR,
2864 0x3e, 0x1);
2865
2866 scmd->result = scsi_status;
2867 set_host_byte(scmd, host_byte);
2868 }
2869
2870 static void pqi_process_io_error(unsigned int iu_type,
2871 struct pqi_io_request *io_request)
2872 {
2873 switch (iu_type) {
2874 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
2875 pqi_process_raid_io_error(io_request);
2876 break;
2877 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
2878 pqi_process_aio_io_error(io_request);
2879 break;
2880 }
2881 }
2882
2883 static int pqi_interpret_task_management_response(
2884 struct pqi_task_management_response *response)
2885 {
2886 int rc;
2887
2888 switch (response->response_code) {
2889 case SOP_TMF_COMPLETE:
2890 case SOP_TMF_FUNCTION_SUCCEEDED:
2891 rc = 0;
2892 break;
2893 case SOP_TMF_REJECTED:
2894 rc = -EAGAIN;
2895 break;
2896 default:
2897 rc = -EIO;
2898 break;
2899 }
2900
2901 return rc;
2902 }
2903
2904 static unsigned int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info,
2905 struct pqi_queue_group *queue_group)
2906 {
2907 unsigned int num_responses;
2908 pqi_index_t oq_pi;
2909 pqi_index_t oq_ci;
2910 struct pqi_io_request *io_request;
2911 struct pqi_io_response *response;
2912 u16 request_id;
2913
2914 num_responses = 0;
2915 oq_ci = queue_group->oq_ci_copy;
2916
2917 while (1) {
2918 oq_pi = readl(queue_group->oq_pi);
2919 if (oq_pi == oq_ci)
2920 break;
2921
2922 num_responses++;
2923 response = queue_group->oq_element_array +
2924 (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
2925
2926 request_id = get_unaligned_le16(&response->request_id);
2927 WARN_ON(request_id >= ctrl_info->max_io_slots);
2928
2929 io_request = &ctrl_info->io_request_pool[request_id];
2930 WARN_ON(atomic_read(&io_request->refcount) == 0);
2931
2932 switch (response->header.iu_type) {
2933 case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS:
2934 case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS:
2935 if (io_request->scmd)
2936 io_request->scmd->result = 0;
2937 /* fall through */
2938 case PQI_RESPONSE_IU_GENERAL_MANAGEMENT:
2939 break;
2940 case PQI_RESPONSE_IU_VENDOR_GENERAL:
2941 io_request->status =
2942 get_unaligned_le16(
2943 &((struct pqi_vendor_general_response *)
2944 response)->status);
2945 break;
2946 case PQI_RESPONSE_IU_TASK_MANAGEMENT:
2947 io_request->status =
2948 pqi_interpret_task_management_response(
2949 (void *)response);
2950 break;
2951 case PQI_RESPONSE_IU_AIO_PATH_DISABLED:
2952 pqi_aio_path_disabled(io_request);
2953 io_request->status = -EAGAIN;
2954 break;
2955 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
2956 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
2957 io_request->error_info = ctrl_info->error_buffer +
2958 (get_unaligned_le16(&response->error_index) *
2959 PQI_ERROR_BUFFER_ELEMENT_LENGTH);
2960 pqi_process_io_error(response->header.iu_type,
2961 io_request);
2962 break;
2963 default:
2964 dev_err(&ctrl_info->pci_dev->dev,
2965 "unexpected IU type: 0x%x\n",
2966 response->header.iu_type);
2967 break;
2968 }
2969
2970 io_request->io_complete_callback(io_request,
2971 io_request->context);
2972
2973 /*
2974 * Note that the I/O request structure CANNOT BE TOUCHED after
2975 * returning from the I/O completion callback!
2976 */
2977
2978 oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq;
2979 }
2980
2981 if (num_responses) {
2982 queue_group->oq_ci_copy = oq_ci;
2983 writel(oq_ci, queue_group->oq_ci);
2984 }
2985
2986 return num_responses;
2987 }
2988
2989 static inline unsigned int pqi_num_elements_free(unsigned int pi,
2990 unsigned int ci, unsigned int elements_in_queue)
2991 {
2992 unsigned int num_elements_used;
2993
2994 if (pi >= ci)
2995 num_elements_used = pi - ci;
2996 else
2997 num_elements_used = elements_in_queue - ci + pi;
2998
2999 return elements_in_queue - num_elements_used - 1;
3000 }
3001
3002 static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info,
3003 struct pqi_event_acknowledge_request *iu, size_t iu_length)
3004 {
3005 pqi_index_t iq_pi;
3006 pqi_index_t iq_ci;
3007 unsigned long flags;
3008 void *next_element;
3009 struct pqi_queue_group *queue_group;
3010
3011 queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP];
3012 put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id);
3013
3014 while (1) {
3015 spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags);
3016
3017 iq_pi = queue_group->iq_pi_copy[RAID_PATH];
3018 iq_ci = readl(queue_group->iq_ci[RAID_PATH]);
3019
3020 if (pqi_num_elements_free(iq_pi, iq_ci,
3021 ctrl_info->num_elements_per_iq))
3022 break;
3023
3024 spin_unlock_irqrestore(
3025 &queue_group->submit_lock[RAID_PATH], flags);
3026
3027 if (pqi_ctrl_offline(ctrl_info))
3028 return;
3029 }
3030
3031 next_element = queue_group->iq_element_array[RAID_PATH] +
3032 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3033
3034 memcpy(next_element, iu, iu_length);
3035
3036 iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq;
3037 queue_group->iq_pi_copy[RAID_PATH] = iq_pi;
3038
3039 /*
3040 * This write notifies the controller that an IU is available to be
3041 * processed.
3042 */
3043 writel(iq_pi, queue_group->iq_pi[RAID_PATH]);
3044
3045 spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags);
3046 }
3047
3048 static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info,
3049 struct pqi_event *event)
3050 {
3051 struct pqi_event_acknowledge_request request;
3052
3053 memset(&request, 0, sizeof(request));
3054
3055 request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT;
3056 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
3057 &request.header.iu_length);
3058 request.event_type = event->event_type;
3059 request.event_id = event->event_id;
3060 request.additional_event_id = event->additional_event_id;
3061
3062 pqi_send_event_ack(ctrl_info, &request, sizeof(request));
3063 }
3064
3065 #define PQI_SOFT_RESET_STATUS_TIMEOUT_SECS 30
3066 #define PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS 1
3067
3068 static enum pqi_soft_reset_status pqi_poll_for_soft_reset_status(
3069 struct pqi_ctrl_info *ctrl_info)
3070 {
3071 unsigned long timeout;
3072 u8 status;
3073
3074 timeout = (PQI_SOFT_RESET_STATUS_TIMEOUT_SECS * PQI_HZ) + jiffies;
3075
3076 while (1) {
3077 status = pqi_read_soft_reset_status(ctrl_info);
3078 if (status & PQI_SOFT_RESET_INITIATE)
3079 return RESET_INITIATE_DRIVER;
3080
3081 if (status & PQI_SOFT_RESET_ABORT)
3082 return RESET_ABORT;
3083
3084 if (time_after(jiffies, timeout)) {
3085 dev_err(&ctrl_info->pci_dev->dev,
3086 "timed out waiting for soft reset status\n");
3087 return RESET_TIMEDOUT;
3088 }
3089
3090 if (!sis_is_firmware_running(ctrl_info))
3091 return RESET_NORESPONSE;
3092
3093 ssleep(PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS);
3094 }
3095 }
3096
3097 static void pqi_process_soft_reset(struct pqi_ctrl_info *ctrl_info,
3098 enum pqi_soft_reset_status reset_status)
3099 {
3100 int rc;
3101
3102 switch (reset_status) {
3103 case RESET_INITIATE_DRIVER:
3104 /* fall through */
3105 case RESET_TIMEDOUT:
3106 dev_info(&ctrl_info->pci_dev->dev,
3107 "resetting controller %u\n", ctrl_info->ctrl_id);
3108 sis_soft_reset(ctrl_info);
3109 /* fall through */
3110 case RESET_INITIATE_FIRMWARE:
3111 rc = pqi_ofa_ctrl_restart(ctrl_info);
3112 pqi_ofa_free_host_buffer(ctrl_info);
3113 dev_info(&ctrl_info->pci_dev->dev,
3114 "Online Firmware Activation for controller %u: %s\n",
3115 ctrl_info->ctrl_id, rc == 0 ? "SUCCESS" : "FAILED");
3116 break;
3117 case RESET_ABORT:
3118 pqi_ofa_ctrl_unquiesce(ctrl_info);
3119 dev_info(&ctrl_info->pci_dev->dev,
3120 "Online Firmware Activation for controller %u: %s\n",
3121 ctrl_info->ctrl_id, "ABORTED");
3122 break;
3123 case RESET_NORESPONSE:
3124 pqi_ofa_free_host_buffer(ctrl_info);
3125 pqi_take_ctrl_offline(ctrl_info);
3126 break;
3127 }
3128 }
3129
3130 static void pqi_ofa_process_event(struct pqi_ctrl_info *ctrl_info,
3131 struct pqi_event *event)
3132 {
3133 u16 event_id;
3134 enum pqi_soft_reset_status status;
3135
3136 event_id = get_unaligned_le16(&event->event_id);
3137
3138 mutex_lock(&ctrl_info->ofa_mutex);
3139
3140 if (event_id == PQI_EVENT_OFA_QUIESCE) {
3141 dev_info(&ctrl_info->pci_dev->dev,
3142 "Received Online Firmware Activation quiesce event for controller %u\n",
3143 ctrl_info->ctrl_id);
3144 pqi_ofa_ctrl_quiesce(ctrl_info);
3145 pqi_acknowledge_event(ctrl_info, event);
3146 if (ctrl_info->soft_reset_handshake_supported) {
3147 status = pqi_poll_for_soft_reset_status(ctrl_info);
3148 pqi_process_soft_reset(ctrl_info, status);
3149 } else {
3150 pqi_process_soft_reset(ctrl_info,
3151 RESET_INITIATE_FIRMWARE);
3152 }
3153
3154 } else if (event_id == PQI_EVENT_OFA_MEMORY_ALLOCATION) {
3155 pqi_acknowledge_event(ctrl_info, event);
3156 pqi_ofa_setup_host_buffer(ctrl_info,
3157 le32_to_cpu(event->ofa_bytes_requested));
3158 pqi_ofa_host_memory_update(ctrl_info);
3159 } else if (event_id == PQI_EVENT_OFA_CANCELLED) {
3160 pqi_ofa_free_host_buffer(ctrl_info);
3161 pqi_acknowledge_event(ctrl_info, event);
3162 dev_info(&ctrl_info->pci_dev->dev,
3163 "Online Firmware Activation(%u) cancel reason : %u\n",
3164 ctrl_info->ctrl_id, event->ofa_cancel_reason);
3165 }
3166
3167 mutex_unlock(&ctrl_info->ofa_mutex);
3168 }
3169
3170 static void pqi_event_worker(struct work_struct *work)
3171 {
3172 unsigned int i;
3173 struct pqi_ctrl_info *ctrl_info;
3174 struct pqi_event *event;
3175
3176 ctrl_info = container_of(work, struct pqi_ctrl_info, event_work);
3177
3178 pqi_ctrl_busy(ctrl_info);
3179 pqi_wait_if_ctrl_blocked(ctrl_info, NO_TIMEOUT);
3180 if (pqi_ctrl_offline(ctrl_info))
3181 goto out;
3182
3183 pqi_schedule_rescan_worker_delayed(ctrl_info);
3184
3185 event = ctrl_info->events;
3186 for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) {
3187 if (event->pending) {
3188 event->pending = false;
3189 if (event->event_type == PQI_EVENT_TYPE_OFA) {
3190 pqi_ctrl_unbusy(ctrl_info);
3191 pqi_ofa_process_event(ctrl_info, event);
3192 return;
3193 }
3194 pqi_acknowledge_event(ctrl_info, event);
3195 }
3196 event++;
3197 }
3198
3199 out:
3200 pqi_ctrl_unbusy(ctrl_info);
3201 }
3202
3203 #define PQI_HEARTBEAT_TIMER_INTERVAL (10 * PQI_HZ)
3204
3205 static void pqi_heartbeat_timer_handler(struct timer_list *t)
3206 {
3207 int num_interrupts;
3208 u32 heartbeat_count;
3209 struct pqi_ctrl_info *ctrl_info = from_timer(ctrl_info, t,
3210 heartbeat_timer);
3211
3212 pqi_check_ctrl_health(ctrl_info);
3213 if (pqi_ctrl_offline(ctrl_info))
3214 return;
3215
3216 num_interrupts = atomic_read(&ctrl_info->num_interrupts);
3217 heartbeat_count = pqi_read_heartbeat_counter(ctrl_info);
3218
3219 if (num_interrupts == ctrl_info->previous_num_interrupts) {
3220 if (heartbeat_count == ctrl_info->previous_heartbeat_count) {
3221 dev_err(&ctrl_info->pci_dev->dev,
3222 "no heartbeat detected - last heartbeat count: %u\n",
3223 heartbeat_count);
3224 pqi_take_ctrl_offline(ctrl_info);
3225 return;
3226 }
3227 } else {
3228 ctrl_info->previous_num_interrupts = num_interrupts;
3229 }
3230
3231 ctrl_info->previous_heartbeat_count = heartbeat_count;
3232 mod_timer(&ctrl_info->heartbeat_timer,
3233 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL);
3234 }
3235
3236 static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3237 {
3238 if (!ctrl_info->heartbeat_counter)
3239 return;
3240
3241 ctrl_info->previous_num_interrupts =
3242 atomic_read(&ctrl_info->num_interrupts);
3243 ctrl_info->previous_heartbeat_count =
3244 pqi_read_heartbeat_counter(ctrl_info);
3245
3246 ctrl_info->heartbeat_timer.expires =
3247 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL;
3248 add_timer(&ctrl_info->heartbeat_timer);
3249 }
3250
3251 static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3252 {
3253 del_timer_sync(&ctrl_info->heartbeat_timer);
3254 }
3255
3256 static inline int pqi_event_type_to_event_index(unsigned int event_type)
3257 {
3258 int index;
3259
3260 for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++)
3261 if (event_type == pqi_supported_event_types[index])
3262 return index;
3263
3264 return -1;
3265 }
3266
3267 static inline bool pqi_is_supported_event(unsigned int event_type)
3268 {
3269 return pqi_event_type_to_event_index(event_type) != -1;
3270 }
3271
3272 static void pqi_ofa_capture_event_payload(struct pqi_event *event,
3273 struct pqi_event_response *response)
3274 {
3275 u16 event_id;
3276
3277 event_id = get_unaligned_le16(&event->event_id);
3278
3279 if (event->event_type == PQI_EVENT_TYPE_OFA) {
3280 if (event_id == PQI_EVENT_OFA_MEMORY_ALLOCATION) {
3281 event->ofa_bytes_requested =
3282 response->data.ofa_memory_allocation.bytes_requested;
3283 } else if (event_id == PQI_EVENT_OFA_CANCELLED) {
3284 event->ofa_cancel_reason =
3285 response->data.ofa_cancelled.reason;
3286 }
3287 }
3288 }
3289
3290 static unsigned int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info)
3291 {
3292 unsigned int num_events;
3293 pqi_index_t oq_pi;
3294 pqi_index_t oq_ci;
3295 struct pqi_event_queue *event_queue;
3296 struct pqi_event_response *response;
3297 struct pqi_event *event;
3298 int event_index;
3299
3300 event_queue = &ctrl_info->event_queue;
3301 num_events = 0;
3302 oq_ci = event_queue->oq_ci_copy;
3303
3304 while (1) {
3305 oq_pi = readl(event_queue->oq_pi);
3306 if (oq_pi == oq_ci)
3307 break;
3308
3309 num_events++;
3310 response = event_queue->oq_element_array +
3311 (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH);
3312
3313 event_index =
3314 pqi_event_type_to_event_index(response->event_type);
3315
3316 if (event_index >= 0) {
3317 if (response->request_acknowlege) {
3318 event = &ctrl_info->events[event_index];
3319 event->pending = true;
3320 event->event_type = response->event_type;
3321 event->event_id = response->event_id;
3322 event->additional_event_id =
3323 response->additional_event_id;
3324 pqi_ofa_capture_event_payload(event, response);
3325 }
3326 }
3327
3328 oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS;
3329 }
3330
3331 if (num_events) {
3332 event_queue->oq_ci_copy = oq_ci;
3333 writel(oq_ci, event_queue->oq_ci);
3334 schedule_work(&ctrl_info->event_work);
3335 }
3336
3337 return num_events;
3338 }
3339
3340 #define PQI_LEGACY_INTX_MASK 0x1
3341
3342 static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info,
3343 bool enable_intx)
3344 {
3345 u32 intx_mask;
3346 struct pqi_device_registers __iomem *pqi_registers;
3347 volatile void __iomem *register_addr;
3348
3349 pqi_registers = ctrl_info->pqi_registers;
3350
3351 if (enable_intx)
3352 register_addr = &pqi_registers->legacy_intx_mask_clear;
3353 else
3354 register_addr = &pqi_registers->legacy_intx_mask_set;
3355
3356 intx_mask = readl(register_addr);
3357 intx_mask |= PQI_LEGACY_INTX_MASK;
3358 writel(intx_mask, register_addr);
3359 }
3360
3361 static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info,
3362 enum pqi_irq_mode new_mode)
3363 {
3364 switch (ctrl_info->irq_mode) {
3365 case IRQ_MODE_MSIX:
3366 switch (new_mode) {
3367 case IRQ_MODE_MSIX:
3368 break;
3369 case IRQ_MODE_INTX:
3370 pqi_configure_legacy_intx(ctrl_info, true);
3371 sis_enable_intx(ctrl_info);
3372 break;
3373 case IRQ_MODE_NONE:
3374 break;
3375 }
3376 break;
3377 case IRQ_MODE_INTX:
3378 switch (new_mode) {
3379 case IRQ_MODE_MSIX:
3380 pqi_configure_legacy_intx(ctrl_info, false);
3381 sis_enable_msix(ctrl_info);
3382 break;
3383 case IRQ_MODE_INTX:
3384 break;
3385 case IRQ_MODE_NONE:
3386 pqi_configure_legacy_intx(ctrl_info, false);
3387 break;
3388 }
3389 break;
3390 case IRQ_MODE_NONE:
3391 switch (new_mode) {
3392 case IRQ_MODE_MSIX:
3393 sis_enable_msix(ctrl_info);
3394 break;
3395 case IRQ_MODE_INTX:
3396 pqi_configure_legacy_intx(ctrl_info, true);
3397 sis_enable_intx(ctrl_info);
3398 break;
3399 case IRQ_MODE_NONE:
3400 break;
3401 }
3402 break;
3403 }
3404
3405 ctrl_info->irq_mode = new_mode;
3406 }
3407
3408 #define PQI_LEGACY_INTX_PENDING 0x1
3409
3410 static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info)
3411 {
3412 bool valid_irq;
3413 u32 intx_status;
3414
3415 switch (ctrl_info->irq_mode) {
3416 case IRQ_MODE_MSIX:
3417 valid_irq = true;
3418 break;
3419 case IRQ_MODE_INTX:
3420 intx_status =
3421 readl(&ctrl_info->pqi_registers->legacy_intx_status);
3422 if (intx_status & PQI_LEGACY_INTX_PENDING)
3423 valid_irq = true;
3424 else
3425 valid_irq = false;
3426 break;
3427 case IRQ_MODE_NONE:
3428 default:
3429 valid_irq = false;
3430 break;
3431 }
3432
3433 return valid_irq;
3434 }
3435
3436 static irqreturn_t pqi_irq_handler(int irq, void *data)
3437 {
3438 struct pqi_ctrl_info *ctrl_info;
3439 struct pqi_queue_group *queue_group;
3440 unsigned int num_responses_handled;
3441
3442 queue_group = data;
3443 ctrl_info = queue_group->ctrl_info;
3444
3445 if (!pqi_is_valid_irq(ctrl_info))
3446 return IRQ_NONE;
3447
3448 num_responses_handled = pqi_process_io_intr(ctrl_info, queue_group);
3449
3450 if (irq == ctrl_info->event_irq)
3451 num_responses_handled += pqi_process_event_intr(ctrl_info);
3452
3453 if (num_responses_handled)
3454 atomic_inc(&ctrl_info->num_interrupts);
3455
3456 pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL);
3457 pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL);
3458
3459 return IRQ_HANDLED;
3460 }
3461
3462 static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info)
3463 {
3464 struct pci_dev *pci_dev = ctrl_info->pci_dev;
3465 int i;
3466 int rc;
3467
3468 ctrl_info->event_irq = pci_irq_vector(pci_dev, 0);
3469
3470 for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) {
3471 rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0,
3472 DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]);
3473 if (rc) {
3474 dev_err(&pci_dev->dev,
3475 "irq %u init failed with error %d\n",
3476 pci_irq_vector(pci_dev, i), rc);
3477 return rc;
3478 }
3479 ctrl_info->num_msix_vectors_initialized++;
3480 }
3481
3482 return 0;
3483 }
3484
3485 static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info)
3486 {
3487 int i;
3488
3489 for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++)
3490 free_irq(pci_irq_vector(ctrl_info->pci_dev, i),
3491 &ctrl_info->queue_groups[i]);
3492
3493 ctrl_info->num_msix_vectors_initialized = 0;
3494 }
3495
3496 static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
3497 {
3498 int num_vectors_enabled;
3499
3500 num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev,
3501 PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups,
3502 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
3503 if (num_vectors_enabled < 0) {
3504 dev_err(&ctrl_info->pci_dev->dev,
3505 "MSI-X init failed with error %d\n",
3506 num_vectors_enabled);
3507 return num_vectors_enabled;
3508 }
3509
3510 ctrl_info->num_msix_vectors_enabled = num_vectors_enabled;
3511 ctrl_info->irq_mode = IRQ_MODE_MSIX;
3512 return 0;
3513 }
3514
3515 static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
3516 {
3517 if (ctrl_info->num_msix_vectors_enabled) {
3518 pci_free_irq_vectors(ctrl_info->pci_dev);
3519 ctrl_info->num_msix_vectors_enabled = 0;
3520 }
3521 }
3522
3523 static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info)
3524 {
3525 unsigned int i;
3526 size_t alloc_length;
3527 size_t element_array_length_per_iq;
3528 size_t element_array_length_per_oq;
3529 void *element_array;
3530 void __iomem *next_queue_index;
3531 void *aligned_pointer;
3532 unsigned int num_inbound_queues;
3533 unsigned int num_outbound_queues;
3534 unsigned int num_queue_indexes;
3535 struct pqi_queue_group *queue_group;
3536
3537 element_array_length_per_iq =
3538 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH *
3539 ctrl_info->num_elements_per_iq;
3540 element_array_length_per_oq =
3541 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH *
3542 ctrl_info->num_elements_per_oq;
3543 num_inbound_queues = ctrl_info->num_queue_groups * 2;
3544 num_outbound_queues = ctrl_info->num_queue_groups;
3545 num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1;
3546
3547 aligned_pointer = NULL;
3548
3549 for (i = 0; i < num_inbound_queues; i++) {
3550 aligned_pointer = PTR_ALIGN(aligned_pointer,
3551 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3552 aligned_pointer += element_array_length_per_iq;
3553 }
3554
3555 for (i = 0; i < num_outbound_queues; i++) {
3556 aligned_pointer = PTR_ALIGN(aligned_pointer,
3557 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3558 aligned_pointer += element_array_length_per_oq;
3559 }
3560
3561 aligned_pointer = PTR_ALIGN(aligned_pointer,
3562 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3563 aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS *
3564 PQI_EVENT_OQ_ELEMENT_LENGTH;
3565
3566 for (i = 0; i < num_queue_indexes; i++) {
3567 aligned_pointer = PTR_ALIGN(aligned_pointer,
3568 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3569 aligned_pointer += sizeof(pqi_index_t);
3570 }
3571
3572 alloc_length = (size_t)aligned_pointer +
3573 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
3574
3575 alloc_length += PQI_EXTRA_SGL_MEMORY;
3576
3577 ctrl_info->queue_memory_base =
3578 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
3579 &ctrl_info->queue_memory_base_dma_handle,
3580 GFP_KERNEL);
3581
3582 if (!ctrl_info->queue_memory_base)
3583 return -ENOMEM;
3584
3585 ctrl_info->queue_memory_length = alloc_length;
3586
3587 element_array = PTR_ALIGN(ctrl_info->queue_memory_base,
3588 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3589
3590 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3591 queue_group = &ctrl_info->queue_groups[i];
3592 queue_group->iq_element_array[RAID_PATH] = element_array;
3593 queue_group->iq_element_array_bus_addr[RAID_PATH] =
3594 ctrl_info->queue_memory_base_dma_handle +
3595 (element_array - ctrl_info->queue_memory_base);
3596 element_array += element_array_length_per_iq;
3597 element_array = PTR_ALIGN(element_array,
3598 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3599 queue_group->iq_element_array[AIO_PATH] = element_array;
3600 queue_group->iq_element_array_bus_addr[AIO_PATH] =
3601 ctrl_info->queue_memory_base_dma_handle +
3602 (element_array - ctrl_info->queue_memory_base);
3603 element_array += element_array_length_per_iq;
3604 element_array = PTR_ALIGN(element_array,
3605 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3606 }
3607
3608 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3609 queue_group = &ctrl_info->queue_groups[i];
3610 queue_group->oq_element_array = element_array;
3611 queue_group->oq_element_array_bus_addr =
3612 ctrl_info->queue_memory_base_dma_handle +
3613 (element_array - ctrl_info->queue_memory_base);
3614 element_array += element_array_length_per_oq;
3615 element_array = PTR_ALIGN(element_array,
3616 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3617 }
3618
3619 ctrl_info->event_queue.oq_element_array = element_array;
3620 ctrl_info->event_queue.oq_element_array_bus_addr =
3621 ctrl_info->queue_memory_base_dma_handle +
3622 (element_array - ctrl_info->queue_memory_base);
3623 element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS *
3624 PQI_EVENT_OQ_ELEMENT_LENGTH;
3625
3626 next_queue_index = (void __iomem *)PTR_ALIGN(element_array,
3627 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3628
3629 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3630 queue_group = &ctrl_info->queue_groups[i];
3631 queue_group->iq_ci[RAID_PATH] = next_queue_index;
3632 queue_group->iq_ci_bus_addr[RAID_PATH] =
3633 ctrl_info->queue_memory_base_dma_handle +
3634 (next_queue_index -
3635 (void __iomem *)ctrl_info->queue_memory_base);
3636 next_queue_index += sizeof(pqi_index_t);
3637 next_queue_index = PTR_ALIGN(next_queue_index,
3638 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3639 queue_group->iq_ci[AIO_PATH] = next_queue_index;
3640 queue_group->iq_ci_bus_addr[AIO_PATH] =
3641 ctrl_info->queue_memory_base_dma_handle +
3642 (next_queue_index -
3643 (void __iomem *)ctrl_info->queue_memory_base);
3644 next_queue_index += sizeof(pqi_index_t);
3645 next_queue_index = PTR_ALIGN(next_queue_index,
3646 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3647 queue_group->oq_pi = next_queue_index;
3648 queue_group->oq_pi_bus_addr =
3649 ctrl_info->queue_memory_base_dma_handle +
3650 (next_queue_index -
3651 (void __iomem *)ctrl_info->queue_memory_base);
3652 next_queue_index += sizeof(pqi_index_t);
3653 next_queue_index = PTR_ALIGN(next_queue_index,
3654 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3655 }
3656
3657 ctrl_info->event_queue.oq_pi = next_queue_index;
3658 ctrl_info->event_queue.oq_pi_bus_addr =
3659 ctrl_info->queue_memory_base_dma_handle +
3660 (next_queue_index -
3661 (void __iomem *)ctrl_info->queue_memory_base);
3662
3663 return 0;
3664 }
3665
3666 static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info)
3667 {
3668 unsigned int i;
3669 u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
3670 u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
3671
3672 /*
3673 * Initialize the backpointers to the controller structure in
3674 * each operational queue group structure.
3675 */
3676 for (i = 0; i < ctrl_info->num_queue_groups; i++)
3677 ctrl_info->queue_groups[i].ctrl_info = ctrl_info;
3678
3679 /*
3680 * Assign IDs to all operational queues. Note that the IDs
3681 * assigned to operational IQs are independent of the IDs
3682 * assigned to operational OQs.
3683 */
3684 ctrl_info->event_queue.oq_id = next_oq_id++;
3685 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3686 ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++;
3687 ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++;
3688 ctrl_info->queue_groups[i].oq_id = next_oq_id++;
3689 }
3690
3691 /*
3692 * Assign MSI-X table entry indexes to all queues. Note that the
3693 * interrupt for the event queue is shared with the first queue group.
3694 */
3695 ctrl_info->event_queue.int_msg_num = 0;
3696 for (i = 0; i < ctrl_info->num_queue_groups; i++)
3697 ctrl_info->queue_groups[i].int_msg_num = i;
3698
3699 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3700 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]);
3701 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]);
3702 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]);
3703 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]);
3704 }
3705 }
3706
3707 static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info)
3708 {
3709 size_t alloc_length;
3710 struct pqi_admin_queues_aligned *admin_queues_aligned;
3711 struct pqi_admin_queues *admin_queues;
3712
3713 alloc_length = sizeof(struct pqi_admin_queues_aligned) +
3714 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
3715
3716 ctrl_info->admin_queue_memory_base =
3717 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
3718 &ctrl_info->admin_queue_memory_base_dma_handle,
3719 GFP_KERNEL);
3720
3721 if (!ctrl_info->admin_queue_memory_base)
3722 return -ENOMEM;
3723
3724 ctrl_info->admin_queue_memory_length = alloc_length;
3725
3726 admin_queues = &ctrl_info->admin_queues;
3727 admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base,
3728 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3729 admin_queues->iq_element_array =
3730 &admin_queues_aligned->iq_element_array;
3731 admin_queues->oq_element_array =
3732 &admin_queues_aligned->oq_element_array;
3733 admin_queues->iq_ci = &admin_queues_aligned->iq_ci;
3734 admin_queues->oq_pi =
3735 (pqi_index_t __iomem *)&admin_queues_aligned->oq_pi;
3736
3737 admin_queues->iq_element_array_bus_addr =
3738 ctrl_info->admin_queue_memory_base_dma_handle +
3739 (admin_queues->iq_element_array -
3740 ctrl_info->admin_queue_memory_base);
3741 admin_queues->oq_element_array_bus_addr =
3742 ctrl_info->admin_queue_memory_base_dma_handle +
3743 (admin_queues->oq_element_array -
3744 ctrl_info->admin_queue_memory_base);
3745 admin_queues->iq_ci_bus_addr =
3746 ctrl_info->admin_queue_memory_base_dma_handle +
3747 ((void *)admin_queues->iq_ci -
3748 ctrl_info->admin_queue_memory_base);
3749 admin_queues->oq_pi_bus_addr =
3750 ctrl_info->admin_queue_memory_base_dma_handle +
3751 ((void __iomem *)admin_queues->oq_pi -
3752 (void __iomem *)ctrl_info->admin_queue_memory_base);
3753
3754 return 0;
3755 }
3756
3757 #define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES PQI_HZ
3758 #define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1
3759
3760 static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info)
3761 {
3762 struct pqi_device_registers __iomem *pqi_registers;
3763 struct pqi_admin_queues *admin_queues;
3764 unsigned long timeout;
3765 u8 status;
3766 u32 reg;
3767
3768 pqi_registers = ctrl_info->pqi_registers;
3769 admin_queues = &ctrl_info->admin_queues;
3770
3771 writeq((u64)admin_queues->iq_element_array_bus_addr,
3772 &pqi_registers->admin_iq_element_array_addr);
3773 writeq((u64)admin_queues->oq_element_array_bus_addr,
3774 &pqi_registers->admin_oq_element_array_addr);
3775 writeq((u64)admin_queues->iq_ci_bus_addr,
3776 &pqi_registers->admin_iq_ci_addr);
3777 writeq((u64)admin_queues->oq_pi_bus_addr,
3778 &pqi_registers->admin_oq_pi_addr);
3779
3780 reg = PQI_ADMIN_IQ_NUM_ELEMENTS |
3781 (PQI_ADMIN_OQ_NUM_ELEMENTS) << 8 |
3782 (admin_queues->int_msg_num << 16);
3783 writel(reg, &pqi_registers->admin_iq_num_elements);
3784 writel(PQI_CREATE_ADMIN_QUEUE_PAIR,
3785 &pqi_registers->function_and_status_code);
3786
3787 timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies;
3788 while (1) {
3789 status = readb(&pqi_registers->function_and_status_code);
3790 if (status == PQI_STATUS_IDLE)
3791 break;
3792 if (time_after(jiffies, timeout))
3793 return -ETIMEDOUT;
3794 msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS);
3795 }
3796
3797 /*
3798 * The offset registers are not initialized to the correct
3799 * offsets until *after* the create admin queue pair command
3800 * completes successfully.
3801 */
3802 admin_queues->iq_pi = ctrl_info->iomem_base +
3803 PQI_DEVICE_REGISTERS_OFFSET +
3804 readq(&pqi_registers->admin_iq_pi_offset);
3805 admin_queues->oq_ci = ctrl_info->iomem_base +
3806 PQI_DEVICE_REGISTERS_OFFSET +
3807 readq(&pqi_registers->admin_oq_ci_offset);
3808
3809 return 0;
3810 }
3811
3812 static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info,
3813 struct pqi_general_admin_request *request)
3814 {
3815 struct pqi_admin_queues *admin_queues;
3816 void *next_element;
3817 pqi_index_t iq_pi;
3818
3819 admin_queues = &ctrl_info->admin_queues;
3820 iq_pi = admin_queues->iq_pi_copy;
3821
3822 next_element = admin_queues->iq_element_array +
3823 (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH);
3824
3825 memcpy(next_element, request, sizeof(*request));
3826
3827 iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS;
3828 admin_queues->iq_pi_copy = iq_pi;
3829
3830 /*
3831 * This write notifies the controller that an IU is available to be
3832 * processed.
3833 */
3834 writel(iq_pi, admin_queues->iq_pi);
3835 }
3836
3837 #define PQI_ADMIN_REQUEST_TIMEOUT_SECS 60
3838
3839 static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info,
3840 struct pqi_general_admin_response *response)
3841 {
3842 struct pqi_admin_queues *admin_queues;
3843 pqi_index_t oq_pi;
3844 pqi_index_t oq_ci;
3845 unsigned long timeout;
3846
3847 admin_queues = &ctrl_info->admin_queues;
3848 oq_ci = admin_queues->oq_ci_copy;
3849
3850 timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * PQI_HZ) + jiffies;
3851
3852 while (1) {
3853 oq_pi = readl(admin_queues->oq_pi);
3854 if (oq_pi != oq_ci)
3855 break;
3856 if (time_after(jiffies, timeout)) {
3857 dev_err(&ctrl_info->pci_dev->dev,
3858 "timed out waiting for admin response\n");
3859 return -ETIMEDOUT;
3860 }
3861 if (!sis_is_firmware_running(ctrl_info))
3862 return -ENXIO;
3863 usleep_range(1000, 2000);
3864 }
3865
3866 memcpy(response, admin_queues->oq_element_array +
3867 (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response));
3868
3869 oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS;
3870 admin_queues->oq_ci_copy = oq_ci;
3871 writel(oq_ci, admin_queues->oq_ci);
3872
3873 return 0;
3874 }
3875
3876 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
3877 struct pqi_queue_group *queue_group, enum pqi_io_path path,
3878 struct pqi_io_request *io_request)
3879 {
3880 struct pqi_io_request *next;
3881 void *next_element;
3882 pqi_index_t iq_pi;
3883 pqi_index_t iq_ci;
3884 size_t iu_length;
3885 unsigned long flags;
3886 unsigned int num_elements_needed;
3887 unsigned int num_elements_to_end_of_queue;
3888 size_t copy_count;
3889 struct pqi_iu_header *request;
3890
3891 spin_lock_irqsave(&queue_group->submit_lock[path], flags);
3892
3893 if (io_request) {
3894 io_request->queue_group = queue_group;
3895 list_add_tail(&io_request->request_list_entry,
3896 &queue_group->request_list[path]);
3897 }
3898
3899 iq_pi = queue_group->iq_pi_copy[path];
3900
3901 list_for_each_entry_safe(io_request, next,
3902 &queue_group->request_list[path], request_list_entry) {
3903
3904 request = io_request->iu;
3905
3906 iu_length = get_unaligned_le16(&request->iu_length) +
3907 PQI_REQUEST_HEADER_LENGTH;
3908 num_elements_needed =
3909 DIV_ROUND_UP(iu_length,
3910 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3911
3912 iq_ci = readl(queue_group->iq_ci[path]);
3913
3914 if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci,
3915 ctrl_info->num_elements_per_iq))
3916 break;
3917
3918 put_unaligned_le16(queue_group->oq_id,
3919 &request->response_queue_id);
3920
3921 next_element = queue_group->iq_element_array[path] +
3922 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3923
3924 num_elements_to_end_of_queue =
3925 ctrl_info->num_elements_per_iq - iq_pi;
3926
3927 if (num_elements_needed <= num_elements_to_end_of_queue) {
3928 memcpy(next_element, request, iu_length);
3929 } else {
3930 copy_count = num_elements_to_end_of_queue *
3931 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
3932 memcpy(next_element, request, copy_count);
3933 memcpy(queue_group->iq_element_array[path],
3934 (u8 *)request + copy_count,
3935 iu_length - copy_count);
3936 }
3937
3938 iq_pi = (iq_pi + num_elements_needed) %
3939 ctrl_info->num_elements_per_iq;
3940
3941 list_del(&io_request->request_list_entry);
3942 }
3943
3944 if (iq_pi != queue_group->iq_pi_copy[path]) {
3945 queue_group->iq_pi_copy[path] = iq_pi;
3946 /*
3947 * This write notifies the controller that one or more IUs are
3948 * available to be processed.
3949 */
3950 writel(iq_pi, queue_group->iq_pi[path]);
3951 }
3952
3953 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags);
3954 }
3955
3956 #define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS 10
3957
3958 static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info,
3959 struct completion *wait)
3960 {
3961 int rc;
3962
3963 while (1) {
3964 if (wait_for_completion_io_timeout(wait,
3965 PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * PQI_HZ)) {
3966 rc = 0;
3967 break;
3968 }
3969
3970 pqi_check_ctrl_health(ctrl_info);
3971 if (pqi_ctrl_offline(ctrl_info)) {
3972 rc = -ENXIO;
3973 break;
3974 }
3975 }
3976
3977 return rc;
3978 }
3979
3980 static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request,
3981 void *context)
3982 {
3983 struct completion *waiting = context;
3984
3985 complete(waiting);
3986 }
3987
3988 static int pqi_process_raid_io_error_synchronous(struct pqi_raid_error_info
3989 *error_info)
3990 {
3991 int rc = -EIO;
3992
3993 switch (error_info->data_out_result) {
3994 case PQI_DATA_IN_OUT_GOOD:
3995 if (error_info->status == SAM_STAT_GOOD)
3996 rc = 0;
3997 break;
3998 case PQI_DATA_IN_OUT_UNDERFLOW:
3999 if (error_info->status == SAM_STAT_GOOD ||
4000 error_info->status == SAM_STAT_CHECK_CONDITION)
4001 rc = 0;
4002 break;
4003 case PQI_DATA_IN_OUT_ABORTED:
4004 rc = PQI_CMD_STATUS_ABORTED;
4005 break;
4006 }
4007
4008 return rc;
4009 }
4010
4011 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
4012 struct pqi_iu_header *request, unsigned int flags,
4013 struct pqi_raid_error_info *error_info, unsigned long timeout_msecs)
4014 {
4015 int rc = 0;
4016 struct pqi_io_request *io_request;
4017 unsigned long start_jiffies;
4018 unsigned long msecs_blocked;
4019 size_t iu_length;
4020 DECLARE_COMPLETION_ONSTACK(wait);
4021
4022 /*
4023 * Note that specifying PQI_SYNC_FLAGS_INTERRUPTABLE and a timeout value
4024 * are mutually exclusive.
4025 */
4026
4027 if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) {
4028 if (down_interruptible(&ctrl_info->sync_request_sem))
4029 return -ERESTARTSYS;
4030 } else {
4031 if (timeout_msecs == NO_TIMEOUT) {
4032 down(&ctrl_info->sync_request_sem);
4033 } else {
4034 start_jiffies = jiffies;
4035 if (down_timeout(&ctrl_info->sync_request_sem,
4036 msecs_to_jiffies(timeout_msecs)))
4037 return -ETIMEDOUT;
4038 msecs_blocked =
4039 jiffies_to_msecs(jiffies - start_jiffies);
4040 if (msecs_blocked >= timeout_msecs)
4041 return -ETIMEDOUT;
4042 timeout_msecs -= msecs_blocked;
4043 }
4044 }
4045
4046 pqi_ctrl_busy(ctrl_info);
4047 timeout_msecs = pqi_wait_if_ctrl_blocked(ctrl_info, timeout_msecs);
4048 if (timeout_msecs == 0) {
4049 pqi_ctrl_unbusy(ctrl_info);
4050 rc = -ETIMEDOUT;
4051 goto out;
4052 }
4053
4054 if (pqi_ctrl_offline(ctrl_info)) {
4055 pqi_ctrl_unbusy(ctrl_info);
4056 rc = -ENXIO;
4057 goto out;
4058 }
4059
4060 io_request = pqi_alloc_io_request(ctrl_info);
4061
4062 put_unaligned_le16(io_request->index,
4063 &(((struct pqi_raid_path_request *)request)->request_id));
4064
4065 if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO)
4066 ((struct pqi_raid_path_request *)request)->error_index =
4067 ((struct pqi_raid_path_request *)request)->request_id;
4068
4069 iu_length = get_unaligned_le16(&request->iu_length) +
4070 PQI_REQUEST_HEADER_LENGTH;
4071 memcpy(io_request->iu, request, iu_length);
4072
4073 io_request->io_complete_callback = pqi_raid_synchronous_complete;
4074 io_request->context = &wait;
4075
4076 pqi_start_io(ctrl_info,
4077 &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
4078 io_request);
4079
4080 pqi_ctrl_unbusy(ctrl_info);
4081
4082 if (timeout_msecs == NO_TIMEOUT) {
4083 pqi_wait_for_completion_io(ctrl_info, &wait);
4084 } else {
4085 if (!wait_for_completion_io_timeout(&wait,
4086 msecs_to_jiffies(timeout_msecs))) {
4087 dev_warn(&ctrl_info->pci_dev->dev,
4088 "command timed out\n");
4089 rc = -ETIMEDOUT;
4090 }
4091 }
4092
4093 if (error_info) {
4094 if (io_request->error_info)
4095 memcpy(error_info, io_request->error_info,
4096 sizeof(*error_info));
4097 else
4098 memset(error_info, 0, sizeof(*error_info));
4099 } else if (rc == 0 && io_request->error_info) {
4100 rc = pqi_process_raid_io_error_synchronous(
4101 io_request->error_info);
4102 }
4103
4104 pqi_free_io_request(io_request);
4105
4106 out:
4107 up(&ctrl_info->sync_request_sem);
4108
4109 return rc;
4110 }
4111
4112 static int pqi_validate_admin_response(
4113 struct pqi_general_admin_response *response, u8 expected_function_code)
4114 {
4115 if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN)
4116 return -EINVAL;
4117
4118 if (get_unaligned_le16(&response->header.iu_length) !=
4119 PQI_GENERAL_ADMIN_IU_LENGTH)
4120 return -EINVAL;
4121
4122 if (response->function_code != expected_function_code)
4123 return -EINVAL;
4124
4125 if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS)
4126 return -EINVAL;
4127
4128 return 0;
4129 }
4130
4131 static int pqi_submit_admin_request_synchronous(
4132 struct pqi_ctrl_info *ctrl_info,
4133 struct pqi_general_admin_request *request,
4134 struct pqi_general_admin_response *response)
4135 {
4136 int rc;
4137
4138 pqi_submit_admin_request(ctrl_info, request);
4139
4140 rc = pqi_poll_for_admin_response(ctrl_info, response);
4141
4142 if (rc == 0)
4143 rc = pqi_validate_admin_response(response,
4144 request->function_code);
4145
4146 return rc;
4147 }
4148
4149 static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info)
4150 {
4151 int rc;
4152 struct pqi_general_admin_request request;
4153 struct pqi_general_admin_response response;
4154 struct pqi_device_capability *capability;
4155 struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor;
4156
4157 capability = kmalloc(sizeof(*capability), GFP_KERNEL);
4158 if (!capability)
4159 return -ENOMEM;
4160
4161 memset(&request, 0, sizeof(request));
4162
4163 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4164 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4165 &request.header.iu_length);
4166 request.function_code =
4167 PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY;
4168 put_unaligned_le32(sizeof(*capability),
4169 &request.data.report_device_capability.buffer_length);
4170
4171 rc = pqi_map_single(ctrl_info->pci_dev,
4172 &request.data.report_device_capability.sg_descriptor,
4173 capability, sizeof(*capability),
4174 DMA_FROM_DEVICE);
4175 if (rc)
4176 goto out;
4177
4178 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4179 &response);
4180
4181 pqi_pci_unmap(ctrl_info->pci_dev,
4182 &request.data.report_device_capability.sg_descriptor, 1,
4183 DMA_FROM_DEVICE);
4184
4185 if (rc)
4186 goto out;
4187
4188 if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) {
4189 rc = -EIO;
4190 goto out;
4191 }
4192
4193 ctrl_info->max_inbound_queues =
4194 get_unaligned_le16(&capability->max_inbound_queues);
4195 ctrl_info->max_elements_per_iq =
4196 get_unaligned_le16(&capability->max_elements_per_iq);
4197 ctrl_info->max_iq_element_length =
4198 get_unaligned_le16(&capability->max_iq_element_length)
4199 * 16;
4200 ctrl_info->max_outbound_queues =
4201 get_unaligned_le16(&capability->max_outbound_queues);
4202 ctrl_info->max_elements_per_oq =
4203 get_unaligned_le16(&capability->max_elements_per_oq);
4204 ctrl_info->max_oq_element_length =
4205 get_unaligned_le16(&capability->max_oq_element_length)
4206 * 16;
4207
4208 sop_iu_layer_descriptor =
4209 &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP];
4210
4211 ctrl_info->max_inbound_iu_length_per_firmware =
4212 get_unaligned_le16(
4213 &sop_iu_layer_descriptor->max_inbound_iu_length);
4214 ctrl_info->inbound_spanning_supported =
4215 sop_iu_layer_descriptor->inbound_spanning_supported;
4216 ctrl_info->outbound_spanning_supported =
4217 sop_iu_layer_descriptor->outbound_spanning_supported;
4218
4219 out:
4220 kfree(capability);
4221
4222 return rc;
4223 }
4224
4225 static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info)
4226 {
4227 if (ctrl_info->max_iq_element_length <
4228 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4229 dev_err(&ctrl_info->pci_dev->dev,
4230 "max. inbound queue element length of %d is less than the required length of %d\n",
4231 ctrl_info->max_iq_element_length,
4232 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4233 return -EINVAL;
4234 }
4235
4236 if (ctrl_info->max_oq_element_length <
4237 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) {
4238 dev_err(&ctrl_info->pci_dev->dev,
4239 "max. outbound queue element length of %d is less than the required length of %d\n",
4240 ctrl_info->max_oq_element_length,
4241 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
4242 return -EINVAL;
4243 }
4244
4245 if (ctrl_info->max_inbound_iu_length_per_firmware <
4246 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4247 dev_err(&ctrl_info->pci_dev->dev,
4248 "max. inbound IU length of %u is less than the min. required length of %d\n",
4249 ctrl_info->max_inbound_iu_length_per_firmware,
4250 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4251 return -EINVAL;
4252 }
4253
4254 if (!ctrl_info->inbound_spanning_supported) {
4255 dev_err(&ctrl_info->pci_dev->dev,
4256 "the controller does not support inbound spanning\n");
4257 return -EINVAL;
4258 }
4259
4260 if (ctrl_info->outbound_spanning_supported) {
4261 dev_err(&ctrl_info->pci_dev->dev,
4262 "the controller supports outbound spanning but this driver does not\n");
4263 return -EINVAL;
4264 }
4265
4266 return 0;
4267 }
4268
4269 static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info)
4270 {
4271 int rc;
4272 struct pqi_event_queue *event_queue;
4273 struct pqi_general_admin_request request;
4274 struct pqi_general_admin_response response;
4275
4276 event_queue = &ctrl_info->event_queue;
4277
4278 /*
4279 * Create OQ (Outbound Queue - device to host queue) to dedicate
4280 * to events.
4281 */
4282 memset(&request, 0, sizeof(request));
4283 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4284 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4285 &request.header.iu_length);
4286 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4287 put_unaligned_le16(event_queue->oq_id,
4288 &request.data.create_operational_oq.queue_id);
4289 put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr,
4290 &request.data.create_operational_oq.element_array_addr);
4291 put_unaligned_le64((u64)event_queue->oq_pi_bus_addr,
4292 &request.data.create_operational_oq.pi_addr);
4293 put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS,
4294 &request.data.create_operational_oq.num_elements);
4295 put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16,
4296 &request.data.create_operational_oq.element_length);
4297 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4298 put_unaligned_le16(event_queue->int_msg_num,
4299 &request.data.create_operational_oq.int_msg_num);
4300
4301 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4302 &response);
4303 if (rc)
4304 return rc;
4305
4306 event_queue->oq_ci = ctrl_info->iomem_base +
4307 PQI_DEVICE_REGISTERS_OFFSET +
4308 get_unaligned_le64(
4309 &response.data.create_operational_oq.oq_ci_offset);
4310
4311 return 0;
4312 }
4313
4314 static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info,
4315 unsigned int group_number)
4316 {
4317 int rc;
4318 struct pqi_queue_group *queue_group;
4319 struct pqi_general_admin_request request;
4320 struct pqi_general_admin_response response;
4321
4322 queue_group = &ctrl_info->queue_groups[group_number];
4323
4324 /*
4325 * Create IQ (Inbound Queue - host to device queue) for
4326 * RAID path.
4327 */
4328 memset(&request, 0, sizeof(request));
4329 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4330 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4331 &request.header.iu_length);
4332 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4333 put_unaligned_le16(queue_group->iq_id[RAID_PATH],
4334 &request.data.create_operational_iq.queue_id);
4335 put_unaligned_le64(
4336 (u64)queue_group->iq_element_array_bus_addr[RAID_PATH],
4337 &request.data.create_operational_iq.element_array_addr);
4338 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH],
4339 &request.data.create_operational_iq.ci_addr);
4340 put_unaligned_le16(ctrl_info->num_elements_per_iq,
4341 &request.data.create_operational_iq.num_elements);
4342 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4343 &request.data.create_operational_iq.element_length);
4344 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4345
4346 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4347 &response);
4348 if (rc) {
4349 dev_err(&ctrl_info->pci_dev->dev,
4350 "error creating inbound RAID queue\n");
4351 return rc;
4352 }
4353
4354 queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base +
4355 PQI_DEVICE_REGISTERS_OFFSET +
4356 get_unaligned_le64(
4357 &response.data.create_operational_iq.iq_pi_offset);
4358
4359 /*
4360 * Create IQ (Inbound Queue - host to device queue) for
4361 * Advanced I/O (AIO) path.
4362 */
4363 memset(&request, 0, sizeof(request));
4364 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4365 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4366 &request.header.iu_length);
4367 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4368 put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4369 &request.data.create_operational_iq.queue_id);
4370 put_unaligned_le64((u64)queue_group->
4371 iq_element_array_bus_addr[AIO_PATH],
4372 &request.data.create_operational_iq.element_array_addr);
4373 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH],
4374 &request.data.create_operational_iq.ci_addr);
4375 put_unaligned_le16(ctrl_info->num_elements_per_iq,
4376 &request.data.create_operational_iq.num_elements);
4377 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4378 &request.data.create_operational_iq.element_length);
4379 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4380
4381 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4382 &response);
4383 if (rc) {
4384 dev_err(&ctrl_info->pci_dev->dev,
4385 "error creating inbound AIO queue\n");
4386 return rc;
4387 }
4388
4389 queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base +
4390 PQI_DEVICE_REGISTERS_OFFSET +
4391 get_unaligned_le64(
4392 &response.data.create_operational_iq.iq_pi_offset);
4393
4394 /*
4395 * Designate the 2nd IQ as the AIO path. By default, all IQs are
4396 * assumed to be for RAID path I/O unless we change the queue's
4397 * property.
4398 */
4399 memset(&request, 0, sizeof(request));
4400 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4401 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4402 &request.header.iu_length);
4403 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY;
4404 put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4405 &request.data.change_operational_iq_properties.queue_id);
4406 put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE,
4407 &request.data.change_operational_iq_properties.vendor_specific);
4408
4409 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4410 &response);
4411 if (rc) {
4412 dev_err(&ctrl_info->pci_dev->dev,
4413 "error changing queue property\n");
4414 return rc;
4415 }
4416
4417 /*
4418 * Create OQ (Outbound Queue - device to host queue).
4419 */
4420 memset(&request, 0, sizeof(request));
4421 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4422 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4423 &request.header.iu_length);
4424 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4425 put_unaligned_le16(queue_group->oq_id,
4426 &request.data.create_operational_oq.queue_id);
4427 put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr,
4428 &request.data.create_operational_oq.element_array_addr);
4429 put_unaligned_le64((u64)queue_group->oq_pi_bus_addr,
4430 &request.data.create_operational_oq.pi_addr);
4431 put_unaligned_le16(ctrl_info->num_elements_per_oq,
4432 &request.data.create_operational_oq.num_elements);
4433 put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16,
4434 &request.data.create_operational_oq.element_length);
4435 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4436 put_unaligned_le16(queue_group->int_msg_num,
4437 &request.data.create_operational_oq.int_msg_num);
4438
4439 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4440 &response);
4441 if (rc) {
4442 dev_err(&ctrl_info->pci_dev->dev,
4443 "error creating outbound queue\n");
4444 return rc;
4445 }
4446
4447 queue_group->oq_ci = ctrl_info->iomem_base +
4448 PQI_DEVICE_REGISTERS_OFFSET +
4449 get_unaligned_le64(
4450 &response.data.create_operational_oq.oq_ci_offset);
4451
4452 return 0;
4453 }
4454
4455 static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info)
4456 {
4457 int rc;
4458 unsigned int i;
4459
4460 rc = pqi_create_event_queue(ctrl_info);
4461 if (rc) {
4462 dev_err(&ctrl_info->pci_dev->dev,
4463 "error creating event queue\n");
4464 return rc;
4465 }
4466
4467 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4468 rc = pqi_create_queue_group(ctrl_info, i);
4469 if (rc) {
4470 dev_err(&ctrl_info->pci_dev->dev,
4471 "error creating queue group number %u/%u\n",
4472 i, ctrl_info->num_queue_groups);
4473 return rc;
4474 }
4475 }
4476
4477 return 0;
4478 }
4479
4480 #define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \
4481 (offsetof(struct pqi_event_config, descriptors) + \
4482 (PQI_MAX_EVENT_DESCRIPTORS * sizeof(struct pqi_event_descriptor)))
4483
4484 static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info,
4485 bool enable_events)
4486 {
4487 int rc;
4488 unsigned int i;
4489 struct pqi_event_config *event_config;
4490 struct pqi_event_descriptor *event_descriptor;
4491 struct pqi_general_management_request request;
4492
4493 event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4494 GFP_KERNEL);
4495 if (!event_config)
4496 return -ENOMEM;
4497
4498 memset(&request, 0, sizeof(request));
4499
4500 request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG;
4501 put_unaligned_le16(offsetof(struct pqi_general_management_request,
4502 data.report_event_configuration.sg_descriptors[1]) -
4503 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
4504 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4505 &request.data.report_event_configuration.buffer_length);
4506
4507 rc = pqi_map_single(ctrl_info->pci_dev,
4508 request.data.report_event_configuration.sg_descriptors,
4509 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4510 DMA_FROM_DEVICE);
4511 if (rc)
4512 goto out;
4513
4514 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
4515 0, NULL, NO_TIMEOUT);
4516
4517 pqi_pci_unmap(ctrl_info->pci_dev,
4518 request.data.report_event_configuration.sg_descriptors, 1,
4519 DMA_FROM_DEVICE);
4520
4521 if (rc)
4522 goto out;
4523
4524 for (i = 0; i < event_config->num_event_descriptors; i++) {
4525 event_descriptor = &event_config->descriptors[i];
4526 if (enable_events &&
4527 pqi_is_supported_event(event_descriptor->event_type))
4528 put_unaligned_le16(ctrl_info->event_queue.oq_id,
4529 &event_descriptor->oq_id);
4530 else
4531 put_unaligned_le16(0, &event_descriptor->oq_id);
4532 }
4533
4534 memset(&request, 0, sizeof(request));
4535
4536 request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG;
4537 put_unaligned_le16(offsetof(struct pqi_general_management_request,
4538 data.report_event_configuration.sg_descriptors[1]) -
4539 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
4540 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4541 &request.data.report_event_configuration.buffer_length);
4542
4543 rc = pqi_map_single(ctrl_info->pci_dev,
4544 request.data.report_event_configuration.sg_descriptors,
4545 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4546 DMA_TO_DEVICE);
4547 if (rc)
4548 goto out;
4549
4550 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0,
4551 NULL, NO_TIMEOUT);
4552
4553 pqi_pci_unmap(ctrl_info->pci_dev,
4554 request.data.report_event_configuration.sg_descriptors, 1,
4555 DMA_TO_DEVICE);
4556
4557 out:
4558 kfree(event_config);
4559
4560 return rc;
4561 }
4562
4563 static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info)
4564 {
4565 return pqi_configure_events(ctrl_info, true);
4566 }
4567
4568 static inline int pqi_disable_events(struct pqi_ctrl_info *ctrl_info)
4569 {
4570 return pqi_configure_events(ctrl_info, false);
4571 }
4572
4573 static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info)
4574 {
4575 unsigned int i;
4576 struct device *dev;
4577 size_t sg_chain_buffer_length;
4578 struct pqi_io_request *io_request;
4579
4580 if (!ctrl_info->io_request_pool)
4581 return;
4582
4583 dev = &ctrl_info->pci_dev->dev;
4584 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
4585 io_request = ctrl_info->io_request_pool;
4586
4587 for (i = 0; i < ctrl_info->max_io_slots; i++) {
4588 kfree(io_request->iu);
4589 if (!io_request->sg_chain_buffer)
4590 break;
4591 dma_free_coherent(dev, sg_chain_buffer_length,
4592 io_request->sg_chain_buffer,
4593 io_request->sg_chain_buffer_dma_handle);
4594 io_request++;
4595 }
4596
4597 kfree(ctrl_info->io_request_pool);
4598 ctrl_info->io_request_pool = NULL;
4599 }
4600
4601 static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info)
4602 {
4603 ctrl_info->error_buffer = dma_alloc_coherent(&ctrl_info->pci_dev->dev,
4604 ctrl_info->error_buffer_length,
4605 &ctrl_info->error_buffer_dma_handle,
4606 GFP_KERNEL);
4607
4608 if (!ctrl_info->error_buffer)
4609 return -ENOMEM;
4610
4611 return 0;
4612 }
4613
4614 static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info)
4615 {
4616 unsigned int i;
4617 void *sg_chain_buffer;
4618 size_t sg_chain_buffer_length;
4619 dma_addr_t sg_chain_buffer_dma_handle;
4620 struct device *dev;
4621 struct pqi_io_request *io_request;
4622
4623 ctrl_info->io_request_pool =
4624 kcalloc(ctrl_info->max_io_slots,
4625 sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL);
4626
4627 if (!ctrl_info->io_request_pool) {
4628 dev_err(&ctrl_info->pci_dev->dev,
4629 "failed to allocate I/O request pool\n");
4630 goto error;
4631 }
4632
4633 dev = &ctrl_info->pci_dev->dev;
4634 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
4635 io_request = ctrl_info->io_request_pool;
4636
4637 for (i = 0; i < ctrl_info->max_io_slots; i++) {
4638 io_request->iu =
4639 kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL);
4640
4641 if (!io_request->iu) {
4642 dev_err(&ctrl_info->pci_dev->dev,
4643 "failed to allocate IU buffers\n");
4644 goto error;
4645 }
4646
4647 sg_chain_buffer = dma_alloc_coherent(dev,
4648 sg_chain_buffer_length, &sg_chain_buffer_dma_handle,
4649 GFP_KERNEL);
4650
4651 if (!sg_chain_buffer) {
4652 dev_err(&ctrl_info->pci_dev->dev,
4653 "failed to allocate PQI scatter-gather chain buffers\n");
4654 goto error;
4655 }
4656
4657 io_request->index = i;
4658 io_request->sg_chain_buffer = sg_chain_buffer;
4659 io_request->sg_chain_buffer_dma_handle =
4660 sg_chain_buffer_dma_handle;
4661 io_request++;
4662 }
4663
4664 return 0;
4665
4666 error:
4667 pqi_free_all_io_requests(ctrl_info);
4668
4669 return -ENOMEM;
4670 }
4671
4672 /*
4673 * Calculate required resources that are sized based on max. outstanding
4674 * requests and max. transfer size.
4675 */
4676
4677 static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info)
4678 {
4679 u32 max_transfer_size;
4680 u32 max_sg_entries;
4681
4682 ctrl_info->scsi_ml_can_queue =
4683 ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS;
4684 ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests;
4685
4686 ctrl_info->error_buffer_length =
4687 ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH;
4688
4689 if (reset_devices)
4690 max_transfer_size = min(ctrl_info->max_transfer_size,
4691 PQI_MAX_TRANSFER_SIZE_KDUMP);
4692 else
4693 max_transfer_size = min(ctrl_info->max_transfer_size,
4694 PQI_MAX_TRANSFER_SIZE);
4695
4696 max_sg_entries = max_transfer_size / PAGE_SIZE;
4697
4698 /* +1 to cover when the buffer is not page-aligned. */
4699 max_sg_entries++;
4700
4701 max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries);
4702
4703 max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE;
4704
4705 ctrl_info->sg_chain_buffer_length =
4706 (max_sg_entries * sizeof(struct pqi_sg_descriptor)) +
4707 PQI_EXTRA_SGL_MEMORY;
4708 ctrl_info->sg_tablesize = max_sg_entries;
4709 ctrl_info->max_sectors = max_transfer_size / 512;
4710 }
4711
4712 static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info)
4713 {
4714 int num_queue_groups;
4715 u16 num_elements_per_iq;
4716 u16 num_elements_per_oq;
4717
4718 if (reset_devices) {
4719 num_queue_groups = 1;
4720 } else {
4721 int num_cpus;
4722 int max_queue_groups;
4723
4724 max_queue_groups = min(ctrl_info->max_inbound_queues / 2,
4725 ctrl_info->max_outbound_queues - 1);
4726 max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS);
4727
4728 num_cpus = num_online_cpus();
4729 num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors);
4730 num_queue_groups = min(num_queue_groups, max_queue_groups);
4731 }
4732
4733 ctrl_info->num_queue_groups = num_queue_groups;
4734 ctrl_info->max_hw_queue_index = num_queue_groups - 1;
4735
4736 /*
4737 * Make sure that the max. inbound IU length is an even multiple
4738 * of our inbound element length.
4739 */
4740 ctrl_info->max_inbound_iu_length =
4741 (ctrl_info->max_inbound_iu_length_per_firmware /
4742 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) *
4743 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
4744
4745 num_elements_per_iq =
4746 (ctrl_info->max_inbound_iu_length /
4747 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4748
4749 /* Add one because one element in each queue is unusable. */
4750 num_elements_per_iq++;
4751
4752 num_elements_per_iq = min(num_elements_per_iq,
4753 ctrl_info->max_elements_per_iq);
4754
4755 num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1;
4756 num_elements_per_oq = min(num_elements_per_oq,
4757 ctrl_info->max_elements_per_oq);
4758
4759 ctrl_info->num_elements_per_iq = num_elements_per_iq;
4760 ctrl_info->num_elements_per_oq = num_elements_per_oq;
4761
4762 ctrl_info->max_sg_per_iu =
4763 ((ctrl_info->max_inbound_iu_length -
4764 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) /
4765 sizeof(struct pqi_sg_descriptor)) +
4766 PQI_MAX_EMBEDDED_SG_DESCRIPTORS;
4767 }
4768
4769 static inline void pqi_set_sg_descriptor(
4770 struct pqi_sg_descriptor *sg_descriptor, struct scatterlist *sg)
4771 {
4772 u64 address = (u64)sg_dma_address(sg);
4773 unsigned int length = sg_dma_len(sg);
4774
4775 put_unaligned_le64(address, &sg_descriptor->address);
4776 put_unaligned_le32(length, &sg_descriptor->length);
4777 put_unaligned_le32(0, &sg_descriptor->flags);
4778 }
4779
4780 static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info,
4781 struct pqi_raid_path_request *request, struct scsi_cmnd *scmd,
4782 struct pqi_io_request *io_request)
4783 {
4784 int i;
4785 u16 iu_length;
4786 int sg_count;
4787 bool chained;
4788 unsigned int num_sg_in_iu;
4789 unsigned int max_sg_per_iu;
4790 struct scatterlist *sg;
4791 struct pqi_sg_descriptor *sg_descriptor;
4792
4793 sg_count = scsi_dma_map(scmd);
4794 if (sg_count < 0)
4795 return sg_count;
4796
4797 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
4798 PQI_REQUEST_HEADER_LENGTH;
4799
4800 if (sg_count == 0)
4801 goto out;
4802
4803 sg = scsi_sglist(scmd);
4804 sg_descriptor = request->sg_descriptors;
4805 max_sg_per_iu = ctrl_info->max_sg_per_iu - 1;
4806 chained = false;
4807 num_sg_in_iu = 0;
4808 i = 0;
4809
4810 while (1) {
4811 pqi_set_sg_descriptor(sg_descriptor, sg);
4812 if (!chained)
4813 num_sg_in_iu++;
4814 i++;
4815 if (i == sg_count)
4816 break;
4817 sg_descriptor++;
4818 if (i == max_sg_per_iu) {
4819 put_unaligned_le64(
4820 (u64)io_request->sg_chain_buffer_dma_handle,
4821 &sg_descriptor->address);
4822 put_unaligned_le32((sg_count - num_sg_in_iu)
4823 * sizeof(*sg_descriptor),
4824 &sg_descriptor->length);
4825 put_unaligned_le32(CISS_SG_CHAIN,
4826 &sg_descriptor->flags);
4827 chained = true;
4828 num_sg_in_iu++;
4829 sg_descriptor = io_request->sg_chain_buffer;
4830 }
4831 sg = sg_next(sg);
4832 }
4833
4834 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
4835 request->partial = chained;
4836 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
4837
4838 out:
4839 put_unaligned_le16(iu_length, &request->header.iu_length);
4840
4841 return 0;
4842 }
4843
4844 static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info,
4845 struct pqi_aio_path_request *request, struct scsi_cmnd *scmd,
4846 struct pqi_io_request *io_request)
4847 {
4848 int i;
4849 u16 iu_length;
4850 int sg_count;
4851 bool chained;
4852 unsigned int num_sg_in_iu;
4853 unsigned int max_sg_per_iu;
4854 struct scatterlist *sg;
4855 struct pqi_sg_descriptor *sg_descriptor;
4856
4857 sg_count = scsi_dma_map(scmd);
4858 if (sg_count < 0)
4859 return sg_count;
4860
4861 iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) -
4862 PQI_REQUEST_HEADER_LENGTH;
4863 num_sg_in_iu = 0;
4864
4865 if (sg_count == 0)
4866 goto out;
4867
4868 sg = scsi_sglist(scmd);
4869 sg_descriptor = request->sg_descriptors;
4870 max_sg_per_iu = ctrl_info->max_sg_per_iu - 1;
4871 chained = false;
4872 i = 0;
4873
4874 while (1) {
4875 pqi_set_sg_descriptor(sg_descriptor, sg);
4876 if (!chained)
4877 num_sg_in_iu++;
4878 i++;
4879 if (i == sg_count)
4880 break;
4881 sg_descriptor++;
4882 if (i == max_sg_per_iu) {
4883 put_unaligned_le64(
4884 (u64)io_request->sg_chain_buffer_dma_handle,
4885 &sg_descriptor->address);
4886 put_unaligned_le32((sg_count - num_sg_in_iu)
4887 * sizeof(*sg_descriptor),
4888 &sg_descriptor->length);
4889 put_unaligned_le32(CISS_SG_CHAIN,
4890 &sg_descriptor->flags);
4891 chained = true;
4892 num_sg_in_iu++;
4893 sg_descriptor = io_request->sg_chain_buffer;
4894 }
4895 sg = sg_next(sg);
4896 }
4897
4898 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
4899 request->partial = chained;
4900 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
4901
4902 out:
4903 put_unaligned_le16(iu_length, &request->header.iu_length);
4904 request->num_sg_descriptors = num_sg_in_iu;
4905
4906 return 0;
4907 }
4908
4909 static void pqi_raid_io_complete(struct pqi_io_request *io_request,
4910 void *context)
4911 {
4912 struct scsi_cmnd *scmd;
4913
4914 scmd = io_request->scmd;
4915 pqi_free_io_request(io_request);
4916 scsi_dma_unmap(scmd);
4917 pqi_scsi_done(scmd);
4918 }
4919
4920 static int pqi_raid_submit_scsi_cmd_with_io_request(
4921 struct pqi_ctrl_info *ctrl_info, struct pqi_io_request *io_request,
4922 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
4923 struct pqi_queue_group *queue_group)
4924 {
4925 int rc;
4926 size_t cdb_length;
4927 struct pqi_raid_path_request *request;
4928
4929 io_request->io_complete_callback = pqi_raid_io_complete;
4930 io_request->scmd = scmd;
4931
4932 request = io_request->iu;
4933 memset(request, 0,
4934 offsetof(struct pqi_raid_path_request, sg_descriptors));
4935
4936 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
4937 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
4938 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
4939 put_unaligned_le16(io_request->index, &request->request_id);
4940 request->error_index = request->request_id;
4941 memcpy(request->lun_number, device->scsi3addr,
4942 sizeof(request->lun_number));
4943
4944 cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb));
4945 memcpy(request->cdb, scmd->cmnd, cdb_length);
4946
4947 switch (cdb_length) {
4948 case 6:
4949 case 10:
4950 case 12:
4951 case 16:
4952 /* No bytes in the Additional CDB bytes field */
4953 request->additional_cdb_bytes_usage =
4954 SOP_ADDITIONAL_CDB_BYTES_0;
4955 break;
4956 case 20:
4957 /* 4 bytes in the Additional cdb field */
4958 request->additional_cdb_bytes_usage =
4959 SOP_ADDITIONAL_CDB_BYTES_4;
4960 break;
4961 case 24:
4962 /* 8 bytes in the Additional cdb field */
4963 request->additional_cdb_bytes_usage =
4964 SOP_ADDITIONAL_CDB_BYTES_8;
4965 break;
4966 case 28:
4967 /* 12 bytes in the Additional cdb field */
4968 request->additional_cdb_bytes_usage =
4969 SOP_ADDITIONAL_CDB_BYTES_12;
4970 break;
4971 case 32:
4972 default:
4973 /* 16 bytes in the Additional cdb field */
4974 request->additional_cdb_bytes_usage =
4975 SOP_ADDITIONAL_CDB_BYTES_16;
4976 break;
4977 }
4978
4979 switch (scmd->sc_data_direction) {
4980 case DMA_TO_DEVICE:
4981 request->data_direction = SOP_READ_FLAG;
4982 break;
4983 case DMA_FROM_DEVICE:
4984 request->data_direction = SOP_WRITE_FLAG;
4985 break;
4986 case DMA_NONE:
4987 request->data_direction = SOP_NO_DIRECTION_FLAG;
4988 break;
4989 case DMA_BIDIRECTIONAL:
4990 request->data_direction = SOP_BIDIRECTIONAL;
4991 break;
4992 default:
4993 dev_err(&ctrl_info->pci_dev->dev,
4994 "unknown data direction: %d\n",
4995 scmd->sc_data_direction);
4996 break;
4997 }
4998
4999 rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request);
5000 if (rc) {
5001 pqi_free_io_request(io_request);
5002 return SCSI_MLQUEUE_HOST_BUSY;
5003 }
5004
5005 pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request);
5006
5007 return 0;
5008 }
5009
5010 static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5011 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5012 struct pqi_queue_group *queue_group)
5013 {
5014 struct pqi_io_request *io_request;
5015
5016 io_request = pqi_alloc_io_request(ctrl_info);
5017
5018 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request,
5019 device, scmd, queue_group);
5020 }
5021
5022 static inline void pqi_schedule_bypass_retry(struct pqi_ctrl_info *ctrl_info)
5023 {
5024 if (!pqi_ctrl_blocked(ctrl_info))
5025 schedule_work(&ctrl_info->raid_bypass_retry_work);
5026 }
5027
5028 static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request)
5029 {
5030 struct scsi_cmnd *scmd;
5031 struct pqi_scsi_dev *device;
5032 struct pqi_ctrl_info *ctrl_info;
5033
5034 if (!io_request->raid_bypass)
5035 return false;
5036
5037 scmd = io_request->scmd;
5038 if ((scmd->result & 0xff) == SAM_STAT_GOOD)
5039 return false;
5040 if (host_byte(scmd->result) == DID_NO_CONNECT)
5041 return false;
5042
5043 device = scmd->device->hostdata;
5044 if (pqi_device_offline(device))
5045 return false;
5046
5047 ctrl_info = shost_to_hba(scmd->device->host);
5048 if (pqi_ctrl_offline(ctrl_info))
5049 return false;
5050
5051 return true;
5052 }
5053
5054 static inline void pqi_add_to_raid_bypass_retry_list(
5055 struct pqi_ctrl_info *ctrl_info,
5056 struct pqi_io_request *io_request, bool at_head)
5057 {
5058 unsigned long flags;
5059
5060 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5061 if (at_head)
5062 list_add(&io_request->request_list_entry,
5063 &ctrl_info->raid_bypass_retry_list);
5064 else
5065 list_add_tail(&io_request->request_list_entry,
5066 &ctrl_info->raid_bypass_retry_list);
5067 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5068 }
5069
5070 static void pqi_queued_raid_bypass_complete(struct pqi_io_request *io_request,
5071 void *context)
5072 {
5073 struct scsi_cmnd *scmd;
5074
5075 scmd = io_request->scmd;
5076 pqi_free_io_request(io_request);
5077 pqi_scsi_done(scmd);
5078 }
5079
5080 static void pqi_queue_raid_bypass_retry(struct pqi_io_request *io_request)
5081 {
5082 struct scsi_cmnd *scmd;
5083 struct pqi_ctrl_info *ctrl_info;
5084
5085 io_request->io_complete_callback = pqi_queued_raid_bypass_complete;
5086 scmd = io_request->scmd;
5087 scmd->result = 0;
5088 ctrl_info = shost_to_hba(scmd->device->host);
5089
5090 pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request, false);
5091 pqi_schedule_bypass_retry(ctrl_info);
5092 }
5093
5094 static int pqi_retry_raid_bypass(struct pqi_io_request *io_request)
5095 {
5096 struct scsi_cmnd *scmd;
5097 struct pqi_scsi_dev *device;
5098 struct pqi_ctrl_info *ctrl_info;
5099 struct pqi_queue_group *queue_group;
5100
5101 scmd = io_request->scmd;
5102 device = scmd->device->hostdata;
5103 if (pqi_device_in_reset(device)) {
5104 pqi_free_io_request(io_request);
5105 set_host_byte(scmd, DID_RESET);
5106 pqi_scsi_done(scmd);
5107 return 0;
5108 }
5109
5110 ctrl_info = shost_to_hba(scmd->device->host);
5111 queue_group = io_request->queue_group;
5112
5113 pqi_reinit_io_request(io_request);
5114
5115 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request,
5116 device, scmd, queue_group);
5117 }
5118
5119 static inline struct pqi_io_request *pqi_next_queued_raid_bypass_request(
5120 struct pqi_ctrl_info *ctrl_info)
5121 {
5122 unsigned long flags;
5123 struct pqi_io_request *io_request;
5124
5125 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5126 io_request = list_first_entry_or_null(
5127 &ctrl_info->raid_bypass_retry_list,
5128 struct pqi_io_request, request_list_entry);
5129 if (io_request)
5130 list_del(&io_request->request_list_entry);
5131 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5132
5133 return io_request;
5134 }
5135
5136 static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info)
5137 {
5138 int rc;
5139 struct pqi_io_request *io_request;
5140
5141 pqi_ctrl_busy(ctrl_info);
5142
5143 while (1) {
5144 if (pqi_ctrl_blocked(ctrl_info))
5145 break;
5146 io_request = pqi_next_queued_raid_bypass_request(ctrl_info);
5147 if (!io_request)
5148 break;
5149 rc = pqi_retry_raid_bypass(io_request);
5150 if (rc) {
5151 pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request,
5152 true);
5153 pqi_schedule_bypass_retry(ctrl_info);
5154 break;
5155 }
5156 }
5157
5158 pqi_ctrl_unbusy(ctrl_info);
5159 }
5160
5161 static void pqi_raid_bypass_retry_worker(struct work_struct *work)
5162 {
5163 struct pqi_ctrl_info *ctrl_info;
5164
5165 ctrl_info = container_of(work, struct pqi_ctrl_info,
5166 raid_bypass_retry_work);
5167 pqi_retry_raid_bypass_requests(ctrl_info);
5168 }
5169
5170 static void pqi_clear_all_queued_raid_bypass_retries(
5171 struct pqi_ctrl_info *ctrl_info)
5172 {
5173 unsigned long flags;
5174
5175 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5176 INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list);
5177 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5178 }
5179
5180 static void pqi_aio_io_complete(struct pqi_io_request *io_request,
5181 void *context)
5182 {
5183 struct scsi_cmnd *scmd;
5184
5185 scmd = io_request->scmd;
5186 scsi_dma_unmap(scmd);
5187 if (io_request->status == -EAGAIN)
5188 set_host_byte(scmd, DID_IMM_RETRY);
5189 else if (pqi_raid_bypass_retry_needed(io_request)) {
5190 pqi_queue_raid_bypass_retry(io_request);
5191 return;
5192 }
5193 pqi_free_io_request(io_request);
5194 pqi_scsi_done(scmd);
5195 }
5196
5197 static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5198 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5199 struct pqi_queue_group *queue_group)
5200 {
5201 return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle,
5202 scmd->cmnd, scmd->cmd_len, queue_group, NULL, false);
5203 }
5204
5205 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
5206 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
5207 unsigned int cdb_length, struct pqi_queue_group *queue_group,
5208 struct pqi_encryption_info *encryption_info, bool raid_bypass)
5209 {
5210 int rc;
5211 struct pqi_io_request *io_request;
5212 struct pqi_aio_path_request *request;
5213
5214 io_request = pqi_alloc_io_request(ctrl_info);
5215 io_request->io_complete_callback = pqi_aio_io_complete;
5216 io_request->scmd = scmd;
5217 io_request->raid_bypass = raid_bypass;
5218
5219 request = io_request->iu;
5220 memset(request, 0,
5221 offsetof(struct pqi_raid_path_request, sg_descriptors));
5222
5223 request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO;
5224 put_unaligned_le32(aio_handle, &request->nexus_id);
5225 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
5226 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5227 put_unaligned_le16(io_request->index, &request->request_id);
5228 request->error_index = request->request_id;
5229 if (cdb_length > sizeof(request->cdb))
5230 cdb_length = sizeof(request->cdb);
5231 request->cdb_length = cdb_length;
5232 memcpy(request->cdb, cdb, cdb_length);
5233
5234 switch (scmd->sc_data_direction) {
5235 case DMA_TO_DEVICE:
5236 request->data_direction = SOP_READ_FLAG;
5237 break;
5238 case DMA_FROM_DEVICE:
5239 request->data_direction = SOP_WRITE_FLAG;
5240 break;
5241 case DMA_NONE:
5242 request->data_direction = SOP_NO_DIRECTION_FLAG;
5243 break;
5244 case DMA_BIDIRECTIONAL:
5245 request->data_direction = SOP_BIDIRECTIONAL;
5246 break;
5247 default:
5248 dev_err(&ctrl_info->pci_dev->dev,
5249 "unknown data direction: %d\n",
5250 scmd->sc_data_direction);
5251 break;
5252 }
5253
5254 if (encryption_info) {
5255 request->encryption_enable = true;
5256 put_unaligned_le16(encryption_info->data_encryption_key_index,
5257 &request->data_encryption_key_index);
5258 put_unaligned_le32(encryption_info->encrypt_tweak_lower,
5259 &request->encrypt_tweak_lower);
5260 put_unaligned_le32(encryption_info->encrypt_tweak_upper,
5261 &request->encrypt_tweak_upper);
5262 }
5263
5264 rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request);
5265 if (rc) {
5266 pqi_free_io_request(io_request);
5267 return SCSI_MLQUEUE_HOST_BUSY;
5268 }
5269
5270 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request);
5271
5272 return 0;
5273 }
5274
5275 static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info,
5276 struct scsi_cmnd *scmd)
5277 {
5278 u16 hw_queue;
5279
5280 hw_queue = blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scmd->request));
5281 if (hw_queue > ctrl_info->max_hw_queue_index)
5282 hw_queue = 0;
5283
5284 return hw_queue;
5285 }
5286
5287 /*
5288 * This function gets called just before we hand the completed SCSI request
5289 * back to the SML.
5290 */
5291
5292 void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd)
5293 {
5294 struct pqi_scsi_dev *device;
5295
5296 if (!scmd->device) {
5297 set_host_byte(scmd, DID_NO_CONNECT);
5298 return;
5299 }
5300
5301 device = scmd->device->hostdata;
5302 if (!device) {
5303 set_host_byte(scmd, DID_NO_CONNECT);
5304 return;
5305 }
5306
5307 atomic_dec(&device->scsi_cmds_outstanding);
5308 }
5309
5310 static int pqi_scsi_queue_command(struct Scsi_Host *shost,
5311 struct scsi_cmnd *scmd)
5312 {
5313 int rc;
5314 struct pqi_ctrl_info *ctrl_info;
5315 struct pqi_scsi_dev *device;
5316 u16 hw_queue;
5317 struct pqi_queue_group *queue_group;
5318 bool raid_bypassed;
5319
5320 device = scmd->device->hostdata;
5321 ctrl_info = shost_to_hba(shost);
5322
5323 if (!device) {
5324 set_host_byte(scmd, DID_NO_CONNECT);
5325 pqi_scsi_done(scmd);
5326 return 0;
5327 }
5328
5329 atomic_inc(&device->scsi_cmds_outstanding);
5330
5331 if (pqi_ctrl_offline(ctrl_info) || pqi_device_in_remove(ctrl_info,
5332 device)) {
5333 set_host_byte(scmd, DID_NO_CONNECT);
5334 pqi_scsi_done(scmd);
5335 return 0;
5336 }
5337
5338 pqi_ctrl_busy(ctrl_info);
5339 if (pqi_ctrl_blocked(ctrl_info) || pqi_device_in_reset(device) ||
5340 pqi_ctrl_in_ofa(ctrl_info)) {
5341 rc = SCSI_MLQUEUE_HOST_BUSY;
5342 goto out;
5343 }
5344
5345 /*
5346 * This is necessary because the SML doesn't zero out this field during
5347 * error recovery.
5348 */
5349 scmd->result = 0;
5350
5351 hw_queue = pqi_get_hw_queue(ctrl_info, scmd);
5352 queue_group = &ctrl_info->queue_groups[hw_queue];
5353
5354 if (pqi_is_logical_device(device)) {
5355 raid_bypassed = false;
5356 if (device->raid_bypass_enabled &&
5357 !blk_rq_is_passthrough(scmd->request)) {
5358 rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device,
5359 scmd, queue_group);
5360 if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY)
5361 raid_bypassed = true;
5362 }
5363 if (!raid_bypassed)
5364 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd,
5365 queue_group);
5366 } else {
5367 if (device->aio_enabled)
5368 rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd,
5369 queue_group);
5370 else
5371 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd,
5372 queue_group);
5373 }
5374
5375 out:
5376 pqi_ctrl_unbusy(ctrl_info);
5377 if (rc)
5378 atomic_dec(&device->scsi_cmds_outstanding);
5379
5380 return rc;
5381 }
5382
5383 static int pqi_wait_until_queued_io_drained(struct pqi_ctrl_info *ctrl_info,
5384 struct pqi_queue_group *queue_group)
5385 {
5386 unsigned int path;
5387 unsigned long flags;
5388 bool list_is_empty;
5389
5390 for (path = 0; path < 2; path++) {
5391 while (1) {
5392 spin_lock_irqsave(
5393 &queue_group->submit_lock[path], flags);
5394 list_is_empty =
5395 list_empty(&queue_group->request_list[path]);
5396 spin_unlock_irqrestore(
5397 &queue_group->submit_lock[path], flags);
5398 if (list_is_empty)
5399 break;
5400 pqi_check_ctrl_health(ctrl_info);
5401 if (pqi_ctrl_offline(ctrl_info))
5402 return -ENXIO;
5403 usleep_range(1000, 2000);
5404 }
5405 }
5406
5407 return 0;
5408 }
5409
5410 static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info)
5411 {
5412 int rc;
5413 unsigned int i;
5414 unsigned int path;
5415 struct pqi_queue_group *queue_group;
5416 pqi_index_t iq_pi;
5417 pqi_index_t iq_ci;
5418
5419 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5420 queue_group = &ctrl_info->queue_groups[i];
5421
5422 rc = pqi_wait_until_queued_io_drained(ctrl_info, queue_group);
5423 if (rc)
5424 return rc;
5425
5426 for (path = 0; path < 2; path++) {
5427 iq_pi = queue_group->iq_pi_copy[path];
5428
5429 while (1) {
5430 iq_ci = readl(queue_group->iq_ci[path]);
5431 if (iq_ci == iq_pi)
5432 break;
5433 pqi_check_ctrl_health(ctrl_info);
5434 if (pqi_ctrl_offline(ctrl_info))
5435 return -ENXIO;
5436 usleep_range(1000, 2000);
5437 }
5438 }
5439 }
5440
5441 return 0;
5442 }
5443
5444 static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info,
5445 struct pqi_scsi_dev *device)
5446 {
5447 unsigned int i;
5448 unsigned int path;
5449 struct pqi_queue_group *queue_group;
5450 unsigned long flags;
5451 struct pqi_io_request *io_request;
5452 struct pqi_io_request *next;
5453 struct scsi_cmnd *scmd;
5454 struct pqi_scsi_dev *scsi_device;
5455
5456 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5457 queue_group = &ctrl_info->queue_groups[i];
5458
5459 for (path = 0; path < 2; path++) {
5460 spin_lock_irqsave(
5461 &queue_group->submit_lock[path], flags);
5462
5463 list_for_each_entry_safe(io_request, next,
5464 &queue_group->request_list[path],
5465 request_list_entry) {
5466 scmd = io_request->scmd;
5467 if (!scmd)
5468 continue;
5469
5470 scsi_device = scmd->device->hostdata;
5471 if (scsi_device != device)
5472 continue;
5473
5474 list_del(&io_request->request_list_entry);
5475 set_host_byte(scmd, DID_RESET);
5476 pqi_scsi_done(scmd);
5477 }
5478
5479 spin_unlock_irqrestore(
5480 &queue_group->submit_lock[path], flags);
5481 }
5482 }
5483 }
5484
5485 static void pqi_fail_io_queued_for_all_devices(struct pqi_ctrl_info *ctrl_info)
5486 {
5487 unsigned int i;
5488 unsigned int path;
5489 struct pqi_queue_group *queue_group;
5490 unsigned long flags;
5491 struct pqi_io_request *io_request;
5492 struct pqi_io_request *next;
5493 struct scsi_cmnd *scmd;
5494
5495 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5496 queue_group = &ctrl_info->queue_groups[i];
5497
5498 for (path = 0; path < 2; path++) {
5499 spin_lock_irqsave(&queue_group->submit_lock[path],
5500 flags);
5501
5502 list_for_each_entry_safe(io_request, next,
5503 &queue_group->request_list[path],
5504 request_list_entry) {
5505
5506 scmd = io_request->scmd;
5507 if (!scmd)
5508 continue;
5509
5510 list_del(&io_request->request_list_entry);
5511 set_host_byte(scmd, DID_RESET);
5512 pqi_scsi_done(scmd);
5513 }
5514
5515 spin_unlock_irqrestore(
5516 &queue_group->submit_lock[path], flags);
5517 }
5518 }
5519 }
5520
5521 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
5522 struct pqi_scsi_dev *device, unsigned long timeout_secs)
5523 {
5524 unsigned long timeout;
5525
5526 timeout = (timeout_secs * PQI_HZ) + jiffies;
5527
5528 while (atomic_read(&device->scsi_cmds_outstanding)) {
5529 pqi_check_ctrl_health(ctrl_info);
5530 if (pqi_ctrl_offline(ctrl_info))
5531 return -ENXIO;
5532 if (timeout_secs != NO_TIMEOUT) {
5533 if (time_after(jiffies, timeout)) {
5534 dev_err(&ctrl_info->pci_dev->dev,
5535 "timed out waiting for pending IO\n");
5536 return -ETIMEDOUT;
5537 }
5538 }
5539 usleep_range(1000, 2000);
5540 }
5541
5542 return 0;
5543 }
5544
5545 static int pqi_ctrl_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
5546 unsigned long timeout_secs)
5547 {
5548 bool io_pending;
5549 unsigned long flags;
5550 unsigned long timeout;
5551 struct pqi_scsi_dev *device;
5552
5553 timeout = (timeout_secs * PQI_HZ) + jiffies;
5554 while (1) {
5555 io_pending = false;
5556
5557 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
5558 list_for_each_entry(device, &ctrl_info->scsi_device_list,
5559 scsi_device_list_entry) {
5560 if (atomic_read(&device->scsi_cmds_outstanding)) {
5561 io_pending = true;
5562 break;
5563 }
5564 }
5565 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
5566 flags);
5567
5568 if (!io_pending)
5569 break;
5570
5571 pqi_check_ctrl_health(ctrl_info);
5572 if (pqi_ctrl_offline(ctrl_info))
5573 return -ENXIO;
5574
5575 if (timeout_secs != NO_TIMEOUT) {
5576 if (time_after(jiffies, timeout)) {
5577 dev_err(&ctrl_info->pci_dev->dev,
5578 "timed out waiting for pending IO\n");
5579 return -ETIMEDOUT;
5580 }
5581 }
5582 usleep_range(1000, 2000);
5583 }
5584
5585 return 0;
5586 }
5587
5588 static void pqi_lun_reset_complete(struct pqi_io_request *io_request,
5589 void *context)
5590 {
5591 struct completion *waiting = context;
5592
5593 complete(waiting);
5594 }
5595
5596 #define PQI_LUN_RESET_TIMEOUT_SECS 10
5597
5598 static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info,
5599 struct pqi_scsi_dev *device, struct completion *wait)
5600 {
5601 int rc;
5602
5603 while (1) {
5604 if (wait_for_completion_io_timeout(wait,
5605 PQI_LUN_RESET_TIMEOUT_SECS * PQI_HZ)) {
5606 rc = 0;
5607 break;
5608 }
5609
5610 pqi_check_ctrl_health(ctrl_info);
5611 if (pqi_ctrl_offline(ctrl_info)) {
5612 rc = -ENXIO;
5613 break;
5614 }
5615 }
5616
5617 return rc;
5618 }
5619
5620 static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info,
5621 struct pqi_scsi_dev *device)
5622 {
5623 int rc;
5624 struct pqi_io_request *io_request;
5625 DECLARE_COMPLETION_ONSTACK(wait);
5626 struct pqi_task_management_request *request;
5627
5628 io_request = pqi_alloc_io_request(ctrl_info);
5629 io_request->io_complete_callback = pqi_lun_reset_complete;
5630 io_request->context = &wait;
5631
5632 request = io_request->iu;
5633 memset(request, 0, sizeof(*request));
5634
5635 request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT;
5636 put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH,
5637 &request->header.iu_length);
5638 put_unaligned_le16(io_request->index, &request->request_id);
5639 memcpy(request->lun_number, device->scsi3addr,
5640 sizeof(request->lun_number));
5641 request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET;
5642
5643 pqi_start_io(ctrl_info,
5644 &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
5645 io_request);
5646
5647 rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, &wait);
5648 if (rc == 0)
5649 rc = io_request->status;
5650
5651 pqi_free_io_request(io_request);
5652
5653 return rc;
5654 }
5655
5656 /* Performs a reset at the LUN level. */
5657
5658 #define PQI_LUN_RESET_RETRIES 3
5659 #define PQI_LUN_RESET_RETRY_INTERVAL_MSECS 10000
5660 #define PQI_LUN_RESET_PENDING_IO_TIMEOUT_SECS 120
5661
5662 static int _pqi_device_reset(struct pqi_ctrl_info *ctrl_info,
5663 struct pqi_scsi_dev *device)
5664 {
5665 int rc;
5666 unsigned int retries;
5667 unsigned long timeout_secs;
5668
5669 for (retries = 0;;) {
5670 rc = pqi_lun_reset(ctrl_info, device);
5671 if (rc != -EAGAIN || ++retries > PQI_LUN_RESET_RETRIES)
5672 break;
5673 msleep(PQI_LUN_RESET_RETRY_INTERVAL_MSECS);
5674 }
5675
5676 timeout_secs = rc ? PQI_LUN_RESET_PENDING_IO_TIMEOUT_SECS : NO_TIMEOUT;
5677
5678 rc |= pqi_device_wait_for_pending_io(ctrl_info, device, timeout_secs);
5679
5680 return rc == 0 ? SUCCESS : FAILED;
5681 }
5682
5683 static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info,
5684 struct pqi_scsi_dev *device)
5685 {
5686 int rc;
5687
5688 mutex_lock(&ctrl_info->lun_reset_mutex);
5689
5690 pqi_ctrl_block_requests(ctrl_info);
5691 pqi_ctrl_wait_until_quiesced(ctrl_info);
5692 pqi_fail_io_queued_for_device(ctrl_info, device);
5693 rc = pqi_wait_until_inbound_queues_empty(ctrl_info);
5694 pqi_device_reset_start(device);
5695 pqi_ctrl_unblock_requests(ctrl_info);
5696
5697 if (rc)
5698 rc = FAILED;
5699 else
5700 rc = _pqi_device_reset(ctrl_info, device);
5701
5702 pqi_device_reset_done(device);
5703
5704 mutex_unlock(&ctrl_info->lun_reset_mutex);
5705
5706 return rc;
5707 }
5708
5709 static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd)
5710 {
5711 int rc;
5712 struct Scsi_Host *shost;
5713 struct pqi_ctrl_info *ctrl_info;
5714 struct pqi_scsi_dev *device;
5715
5716 shost = scmd->device->host;
5717 ctrl_info = shost_to_hba(shost);
5718 device = scmd->device->hostdata;
5719
5720 dev_err(&ctrl_info->pci_dev->dev,
5721 "resetting scsi %d:%d:%d:%d\n",
5722 shost->host_no, device->bus, device->target, device->lun);
5723
5724 pqi_check_ctrl_health(ctrl_info);
5725 if (pqi_ctrl_offline(ctrl_info)) {
5726 dev_err(&ctrl_info->pci_dev->dev,
5727 "controller %u offlined - cannot send device reset\n",
5728 ctrl_info->ctrl_id);
5729 rc = FAILED;
5730 goto out;
5731 }
5732
5733 pqi_wait_until_ofa_finished(ctrl_info);
5734
5735 rc = pqi_device_reset(ctrl_info, device);
5736
5737 out:
5738 dev_err(&ctrl_info->pci_dev->dev,
5739 "reset of scsi %d:%d:%d:%d: %s\n",
5740 shost->host_no, device->bus, device->target, device->lun,
5741 rc == SUCCESS ? "SUCCESS" : "FAILED");
5742
5743 return rc;
5744 }
5745
5746 static int pqi_slave_alloc(struct scsi_device *sdev)
5747 {
5748 struct pqi_scsi_dev *device;
5749 unsigned long flags;
5750 struct pqi_ctrl_info *ctrl_info;
5751 struct scsi_target *starget;
5752 struct sas_rphy *rphy;
5753
5754 ctrl_info = shost_to_hba(sdev->host);
5755
5756 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
5757
5758 if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) {
5759 starget = scsi_target(sdev);
5760 rphy = target_to_rphy(starget);
5761 device = pqi_find_device_by_sas_rphy(ctrl_info, rphy);
5762 if (device) {
5763 device->target = sdev_id(sdev);
5764 device->lun = sdev->lun;
5765 device->target_lun_valid = true;
5766 }
5767 } else {
5768 device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev),
5769 sdev_id(sdev), sdev->lun);
5770 }
5771
5772 if (device) {
5773 sdev->hostdata = device;
5774 device->sdev = sdev;
5775 if (device->queue_depth) {
5776 device->advertised_queue_depth = device->queue_depth;
5777 scsi_change_queue_depth(sdev,
5778 device->advertised_queue_depth);
5779 }
5780 if (pqi_is_logical_device(device))
5781 pqi_disable_write_same(sdev);
5782 else
5783 sdev->allow_restart = 1;
5784 }
5785
5786 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
5787
5788 return 0;
5789 }
5790
5791 static int pqi_map_queues(struct Scsi_Host *shost)
5792 {
5793 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
5794
5795 return blk_mq_pci_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT],
5796 ctrl_info->pci_dev, 0);
5797 }
5798
5799 static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info,
5800 void __user *arg)
5801 {
5802 struct pci_dev *pci_dev;
5803 u32 subsystem_vendor;
5804 u32 subsystem_device;
5805 cciss_pci_info_struct pciinfo;
5806
5807 if (!arg)
5808 return -EINVAL;
5809
5810 pci_dev = ctrl_info->pci_dev;
5811
5812 pciinfo.domain = pci_domain_nr(pci_dev->bus);
5813 pciinfo.bus = pci_dev->bus->number;
5814 pciinfo.dev_fn = pci_dev->devfn;
5815 subsystem_vendor = pci_dev->subsystem_vendor;
5816 subsystem_device = pci_dev->subsystem_device;
5817 pciinfo.board_id = ((subsystem_device << 16) & 0xffff0000) |
5818 subsystem_vendor;
5819
5820 if (copy_to_user(arg, &pciinfo, sizeof(pciinfo)))
5821 return -EFAULT;
5822
5823 return 0;
5824 }
5825
5826 static int pqi_getdrivver_ioctl(void __user *arg)
5827 {
5828 u32 version;
5829
5830 if (!arg)
5831 return -EINVAL;
5832
5833 version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) |
5834 (DRIVER_RELEASE << 16) | DRIVER_REVISION;
5835
5836 if (copy_to_user(arg, &version, sizeof(version)))
5837 return -EFAULT;
5838
5839 return 0;
5840 }
5841
5842 struct ciss_error_info {
5843 u8 scsi_status;
5844 int command_status;
5845 size_t sense_data_length;
5846 };
5847
5848 static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info,
5849 struct ciss_error_info *ciss_error_info)
5850 {
5851 int ciss_cmd_status;
5852 size_t sense_data_length;
5853
5854 switch (pqi_error_info->data_out_result) {
5855 case PQI_DATA_IN_OUT_GOOD:
5856 ciss_cmd_status = CISS_CMD_STATUS_SUCCESS;
5857 break;
5858 case PQI_DATA_IN_OUT_UNDERFLOW:
5859 ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN;
5860 break;
5861 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
5862 ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN;
5863 break;
5864 case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
5865 case PQI_DATA_IN_OUT_BUFFER_ERROR:
5866 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
5867 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
5868 case PQI_DATA_IN_OUT_ERROR:
5869 ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR;
5870 break;
5871 case PQI_DATA_IN_OUT_HARDWARE_ERROR:
5872 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
5873 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
5874 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
5875 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
5876 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
5877 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
5878 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
5879 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
5880 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
5881 ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR;
5882 break;
5883 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
5884 ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT;
5885 break;
5886 case PQI_DATA_IN_OUT_ABORTED:
5887 ciss_cmd_status = CISS_CMD_STATUS_ABORTED;
5888 break;
5889 case PQI_DATA_IN_OUT_TIMEOUT:
5890 ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT;
5891 break;
5892 default:
5893 ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS;
5894 break;
5895 }
5896
5897 sense_data_length =
5898 get_unaligned_le16(&pqi_error_info->sense_data_length);
5899 if (sense_data_length == 0)
5900 sense_data_length =
5901 get_unaligned_le16(&pqi_error_info->response_data_length);
5902 if (sense_data_length)
5903 if (sense_data_length > sizeof(pqi_error_info->data))
5904 sense_data_length = sizeof(pqi_error_info->data);
5905
5906 ciss_error_info->scsi_status = pqi_error_info->status;
5907 ciss_error_info->command_status = ciss_cmd_status;
5908 ciss_error_info->sense_data_length = sense_data_length;
5909 }
5910
5911 static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg)
5912 {
5913 int rc;
5914 char *kernel_buffer = NULL;
5915 u16 iu_length;
5916 size_t sense_data_length;
5917 IOCTL_Command_struct iocommand;
5918 struct pqi_raid_path_request request;
5919 struct pqi_raid_error_info pqi_error_info;
5920 struct ciss_error_info ciss_error_info;
5921
5922 if (pqi_ctrl_offline(ctrl_info))
5923 return -ENXIO;
5924 if (!arg)
5925 return -EINVAL;
5926 if (!capable(CAP_SYS_RAWIO))
5927 return -EPERM;
5928 if (copy_from_user(&iocommand, arg, sizeof(iocommand)))
5929 return -EFAULT;
5930 if (iocommand.buf_size < 1 &&
5931 iocommand.Request.Type.Direction != XFER_NONE)
5932 return -EINVAL;
5933 if (iocommand.Request.CDBLen > sizeof(request.cdb))
5934 return -EINVAL;
5935 if (iocommand.Request.Type.Type != TYPE_CMD)
5936 return -EINVAL;
5937
5938 switch (iocommand.Request.Type.Direction) {
5939 case XFER_NONE:
5940 case XFER_WRITE:
5941 case XFER_READ:
5942 case XFER_READ | XFER_WRITE:
5943 break;
5944 default:
5945 return -EINVAL;
5946 }
5947
5948 if (iocommand.buf_size > 0) {
5949 kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL);
5950 if (!kernel_buffer)
5951 return -ENOMEM;
5952 if (iocommand.Request.Type.Direction & XFER_WRITE) {
5953 if (copy_from_user(kernel_buffer, iocommand.buf,
5954 iocommand.buf_size)) {
5955 rc = -EFAULT;
5956 goto out;
5957 }
5958 } else {
5959 memset(kernel_buffer, 0, iocommand.buf_size);
5960 }
5961 }
5962
5963 memset(&request, 0, sizeof(request));
5964
5965 request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
5966 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
5967 PQI_REQUEST_HEADER_LENGTH;
5968 memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes,
5969 sizeof(request.lun_number));
5970 memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen);
5971 request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
5972
5973 switch (iocommand.Request.Type.Direction) {
5974 case XFER_NONE:
5975 request.data_direction = SOP_NO_DIRECTION_FLAG;
5976 break;
5977 case XFER_WRITE:
5978 request.data_direction = SOP_WRITE_FLAG;
5979 break;
5980 case XFER_READ:
5981 request.data_direction = SOP_READ_FLAG;
5982 break;
5983 case XFER_READ | XFER_WRITE:
5984 request.data_direction = SOP_BIDIRECTIONAL;
5985 break;
5986 }
5987
5988 request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5989
5990 if (iocommand.buf_size > 0) {
5991 put_unaligned_le32(iocommand.buf_size, &request.buffer_length);
5992
5993 rc = pqi_map_single(ctrl_info->pci_dev,
5994 &request.sg_descriptors[0], kernel_buffer,
5995 iocommand.buf_size, DMA_BIDIRECTIONAL);
5996 if (rc)
5997 goto out;
5998
5999 iu_length += sizeof(request.sg_descriptors[0]);
6000 }
6001
6002 put_unaligned_le16(iu_length, &request.header.iu_length);
6003
6004 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
6005 PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info, NO_TIMEOUT);
6006
6007 if (iocommand.buf_size > 0)
6008 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1,
6009 DMA_BIDIRECTIONAL);
6010
6011 memset(&iocommand.error_info, 0, sizeof(iocommand.error_info));
6012
6013 if (rc == 0) {
6014 pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info);
6015 iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status;
6016 iocommand.error_info.CommandStatus =
6017 ciss_error_info.command_status;
6018 sense_data_length = ciss_error_info.sense_data_length;
6019 if (sense_data_length) {
6020 if (sense_data_length >
6021 sizeof(iocommand.error_info.SenseInfo))
6022 sense_data_length =
6023 sizeof(iocommand.error_info.SenseInfo);
6024 memcpy(iocommand.error_info.SenseInfo,
6025 pqi_error_info.data, sense_data_length);
6026 iocommand.error_info.SenseLen = sense_data_length;
6027 }
6028 }
6029
6030 if (copy_to_user(arg, &iocommand, sizeof(iocommand))) {
6031 rc = -EFAULT;
6032 goto out;
6033 }
6034
6035 if (rc == 0 && iocommand.buf_size > 0 &&
6036 (iocommand.Request.Type.Direction & XFER_READ)) {
6037 if (copy_to_user(iocommand.buf, kernel_buffer,
6038 iocommand.buf_size)) {
6039 rc = -EFAULT;
6040 }
6041 }
6042
6043 out:
6044 kfree(kernel_buffer);
6045
6046 return rc;
6047 }
6048
6049 static int pqi_ioctl(struct scsi_device *sdev, unsigned int cmd,
6050 void __user *arg)
6051 {
6052 int rc;
6053 struct pqi_ctrl_info *ctrl_info;
6054
6055 ctrl_info = shost_to_hba(sdev->host);
6056
6057 if (pqi_ctrl_in_ofa(ctrl_info))
6058 return -EBUSY;
6059
6060 switch (cmd) {
6061 case CCISS_DEREGDISK:
6062 case CCISS_REGNEWDISK:
6063 case CCISS_REGNEWD:
6064 rc = pqi_scan_scsi_devices(ctrl_info);
6065 break;
6066 case CCISS_GETPCIINFO:
6067 rc = pqi_getpciinfo_ioctl(ctrl_info, arg);
6068 break;
6069 case CCISS_GETDRIVVER:
6070 rc = pqi_getdrivver_ioctl(arg);
6071 break;
6072 case CCISS_PASSTHRU:
6073 rc = pqi_passthru_ioctl(ctrl_info, arg);
6074 break;
6075 default:
6076 rc = -EINVAL;
6077 break;
6078 }
6079
6080 return rc;
6081 }
6082
6083 static ssize_t pqi_version_show(struct device *dev,
6084 struct device_attribute *attr, char *buffer)
6085 {
6086 ssize_t count = 0;
6087 struct Scsi_Host *shost;
6088 struct pqi_ctrl_info *ctrl_info;
6089
6090 shost = class_to_shost(dev);
6091 ctrl_info = shost_to_hba(shost);
6092
6093 count += snprintf(buffer + count, PAGE_SIZE - count,
6094 " driver: %s\n", DRIVER_VERSION BUILD_TIMESTAMP);
6095
6096 count += snprintf(buffer + count, PAGE_SIZE - count,
6097 "firmware: %s\n", ctrl_info->firmware_version);
6098
6099 return count;
6100 }
6101
6102 static ssize_t pqi_host_rescan_store(struct device *dev,
6103 struct device_attribute *attr, const char *buffer, size_t count)
6104 {
6105 struct Scsi_Host *shost = class_to_shost(dev);
6106
6107 pqi_scan_start(shost);
6108
6109 return count;
6110 }
6111
6112 static ssize_t pqi_lockup_action_show(struct device *dev,
6113 struct device_attribute *attr, char *buffer)
6114 {
6115 int count = 0;
6116 unsigned int i;
6117
6118 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6119 if (pqi_lockup_actions[i].action == pqi_lockup_action)
6120 count += snprintf(buffer + count, PAGE_SIZE - count,
6121 "[%s] ", pqi_lockup_actions[i].name);
6122 else
6123 count += snprintf(buffer + count, PAGE_SIZE - count,
6124 "%s ", pqi_lockup_actions[i].name);
6125 }
6126
6127 count += snprintf(buffer + count, PAGE_SIZE - count, "\n");
6128
6129 return count;
6130 }
6131
6132 static ssize_t pqi_lockup_action_store(struct device *dev,
6133 struct device_attribute *attr, const char *buffer, size_t count)
6134 {
6135 unsigned int i;
6136 char *action_name;
6137 char action_name_buffer[32];
6138
6139 strlcpy(action_name_buffer, buffer, sizeof(action_name_buffer));
6140 action_name = strstrip(action_name_buffer);
6141
6142 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6143 if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) {
6144 pqi_lockup_action = pqi_lockup_actions[i].action;
6145 return count;
6146 }
6147 }
6148
6149 return -EINVAL;
6150 }
6151
6152 static DEVICE_ATTR(version, 0444, pqi_version_show, NULL);
6153 static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store);
6154 static DEVICE_ATTR(lockup_action, 0644,
6155 pqi_lockup_action_show, pqi_lockup_action_store);
6156
6157 static struct device_attribute *pqi_shost_attrs[] = {
6158 &dev_attr_version,
6159 &dev_attr_rescan,
6160 &dev_attr_lockup_action,
6161 NULL
6162 };
6163
6164 static ssize_t pqi_unique_id_show(struct device *dev,
6165 struct device_attribute *attr, char *buffer)
6166 {
6167 struct pqi_ctrl_info *ctrl_info;
6168 struct scsi_device *sdev;
6169 struct pqi_scsi_dev *device;
6170 unsigned long flags;
6171 unsigned char uid[16];
6172
6173 sdev = to_scsi_device(dev);
6174 ctrl_info = shost_to_hba(sdev->host);
6175
6176 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6177
6178 device = sdev->hostdata;
6179 if (!device) {
6180 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6181 flags);
6182 return -ENODEV;
6183 }
6184 memcpy(uid, device->unique_id, sizeof(uid));
6185
6186 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6187
6188 return snprintf(buffer, PAGE_SIZE,
6189 "%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X\n",
6190 uid[0], uid[1], uid[2], uid[3],
6191 uid[4], uid[5], uid[6], uid[7],
6192 uid[8], uid[9], uid[10], uid[11],
6193 uid[12], uid[13], uid[14], uid[15]);
6194 }
6195
6196 static ssize_t pqi_lunid_show(struct device *dev,
6197 struct device_attribute *attr, char *buffer)
6198 {
6199 struct pqi_ctrl_info *ctrl_info;
6200 struct scsi_device *sdev;
6201 struct pqi_scsi_dev *device;
6202 unsigned long flags;
6203 u8 lunid[8];
6204
6205 sdev = to_scsi_device(dev);
6206 ctrl_info = shost_to_hba(sdev->host);
6207
6208 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6209
6210 device = sdev->hostdata;
6211 if (!device) {
6212 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6213 flags);
6214 return -ENODEV;
6215 }
6216 memcpy(lunid, device->scsi3addr, sizeof(lunid));
6217
6218 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6219
6220 return snprintf(buffer, PAGE_SIZE, "0x%8phN\n", lunid);
6221 }
6222
6223 #define MAX_PATHS 8
6224 static ssize_t pqi_path_info_show(struct device *dev,
6225 struct device_attribute *attr, char *buf)
6226 {
6227 struct pqi_ctrl_info *ctrl_info;
6228 struct scsi_device *sdev;
6229 struct pqi_scsi_dev *device;
6230 unsigned long flags;
6231 int i;
6232 int output_len = 0;
6233 u8 box;
6234 u8 bay;
6235 u8 path_map_index = 0;
6236 char *active;
6237 unsigned char phys_connector[2];
6238
6239 sdev = to_scsi_device(dev);
6240 ctrl_info = shost_to_hba(sdev->host);
6241
6242 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6243
6244 device = sdev->hostdata;
6245 if (!device) {
6246 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6247 flags);
6248 return -ENODEV;
6249 }
6250
6251 bay = device->bay;
6252 for (i = 0; i < MAX_PATHS; i++) {
6253 path_map_index = 1<<i;
6254 if (i == device->active_path_index)
6255 active = "Active";
6256 else if (device->path_map & path_map_index)
6257 active = "Inactive";
6258 else
6259 continue;
6260
6261 output_len += scnprintf(buf + output_len,
6262 PAGE_SIZE - output_len,
6263 "[%d:%d:%d:%d] %20.20s ",
6264 ctrl_info->scsi_host->host_no,
6265 device->bus, device->target,
6266 device->lun,
6267 scsi_device_type(device->devtype));
6268
6269 if (device->devtype == TYPE_RAID ||
6270 pqi_is_logical_device(device))
6271 goto end_buffer;
6272
6273 memcpy(&phys_connector, &device->phys_connector[i],
6274 sizeof(phys_connector));
6275 if (phys_connector[0] < '0')
6276 phys_connector[0] = '0';
6277 if (phys_connector[1] < '0')
6278 phys_connector[1] = '0';
6279
6280 output_len += scnprintf(buf + output_len,
6281 PAGE_SIZE - output_len,
6282 "PORT: %.2s ", phys_connector);
6283
6284 box = device->box[i];
6285 if (box != 0 && box != 0xFF)
6286 output_len += scnprintf(buf + output_len,
6287 PAGE_SIZE - output_len,
6288 "BOX: %hhu ", box);
6289
6290 if ((device->devtype == TYPE_DISK ||
6291 device->devtype == TYPE_ZBC) &&
6292 pqi_expose_device(device))
6293 output_len += scnprintf(buf + output_len,
6294 PAGE_SIZE - output_len,
6295 "BAY: %hhu ", bay);
6296
6297 end_buffer:
6298 output_len += scnprintf(buf + output_len,
6299 PAGE_SIZE - output_len,
6300 "%s\n", active);
6301 }
6302
6303 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6304 return output_len;
6305 }
6306
6307
6308 static ssize_t pqi_sas_address_show(struct device *dev,
6309 struct device_attribute *attr, char *buffer)
6310 {
6311 struct pqi_ctrl_info *ctrl_info;
6312 struct scsi_device *sdev;
6313 struct pqi_scsi_dev *device;
6314 unsigned long flags;
6315 u64 sas_address;
6316
6317 sdev = to_scsi_device(dev);
6318 ctrl_info = shost_to_hba(sdev->host);
6319
6320 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6321
6322 device = sdev->hostdata;
6323 if (pqi_is_logical_device(device)) {
6324 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6325 flags);
6326 return -ENODEV;
6327 }
6328 sas_address = device->sas_address;
6329
6330 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6331
6332 return snprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address);
6333 }
6334
6335 static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev,
6336 struct device_attribute *attr, char *buffer)
6337 {
6338 struct pqi_ctrl_info *ctrl_info;
6339 struct scsi_device *sdev;
6340 struct pqi_scsi_dev *device;
6341 unsigned long flags;
6342
6343 sdev = to_scsi_device(dev);
6344 ctrl_info = shost_to_hba(sdev->host);
6345
6346 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6347
6348 device = sdev->hostdata;
6349 buffer[0] = device->raid_bypass_enabled ? '1' : '0';
6350 buffer[1] = '\n';
6351 buffer[2] = '\0';
6352
6353 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6354
6355 return 2;
6356 }
6357
6358 static ssize_t pqi_raid_level_show(struct device *dev,
6359 struct device_attribute *attr, char *buffer)
6360 {
6361 struct pqi_ctrl_info *ctrl_info;
6362 struct scsi_device *sdev;
6363 struct pqi_scsi_dev *device;
6364 unsigned long flags;
6365 char *raid_level;
6366
6367 sdev = to_scsi_device(dev);
6368 ctrl_info = shost_to_hba(sdev->host);
6369
6370 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6371
6372 device = sdev->hostdata;
6373
6374 if (pqi_is_logical_device(device))
6375 raid_level = pqi_raid_level_to_string(device->raid_level);
6376 else
6377 raid_level = "N/A";
6378
6379 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6380
6381 return snprintf(buffer, PAGE_SIZE, "%s\n", raid_level);
6382 }
6383
6384 static DEVICE_ATTR(lunid, 0444, pqi_lunid_show, NULL);
6385 static DEVICE_ATTR(unique_id, 0444, pqi_unique_id_show, NULL);
6386 static DEVICE_ATTR(path_info, 0444, pqi_path_info_show, NULL);
6387 static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL);
6388 static DEVICE_ATTR(ssd_smart_path_enabled, 0444,
6389 pqi_ssd_smart_path_enabled_show, NULL);
6390 static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL);
6391
6392 static struct device_attribute *pqi_sdev_attrs[] = {
6393 &dev_attr_lunid,
6394 &dev_attr_unique_id,
6395 &dev_attr_path_info,
6396 &dev_attr_sas_address,
6397 &dev_attr_ssd_smart_path_enabled,
6398 &dev_attr_raid_level,
6399 NULL
6400 };
6401
6402 static struct scsi_host_template pqi_driver_template = {
6403 .module = THIS_MODULE,
6404 .name = DRIVER_NAME_SHORT,
6405 .proc_name = DRIVER_NAME_SHORT,
6406 .queuecommand = pqi_scsi_queue_command,
6407 .scan_start = pqi_scan_start,
6408 .scan_finished = pqi_scan_finished,
6409 .this_id = -1,
6410 .eh_device_reset_handler = pqi_eh_device_reset_handler,
6411 .ioctl = pqi_ioctl,
6412 .slave_alloc = pqi_slave_alloc,
6413 .map_queues = pqi_map_queues,
6414 .sdev_attrs = pqi_sdev_attrs,
6415 .shost_attrs = pqi_shost_attrs,
6416 };
6417
6418 static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info)
6419 {
6420 int rc;
6421 struct Scsi_Host *shost;
6422
6423 shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info));
6424 if (!shost) {
6425 dev_err(&ctrl_info->pci_dev->dev,
6426 "scsi_host_alloc failed for controller %u\n",
6427 ctrl_info->ctrl_id);
6428 return -ENOMEM;
6429 }
6430
6431 shost->io_port = 0;
6432 shost->n_io_port = 0;
6433 shost->this_id = -1;
6434 shost->max_channel = PQI_MAX_BUS;
6435 shost->max_cmd_len = MAX_COMMAND_SIZE;
6436 shost->max_lun = ~0;
6437 shost->max_id = ~0;
6438 shost->max_sectors = ctrl_info->max_sectors;
6439 shost->can_queue = ctrl_info->scsi_ml_can_queue;
6440 shost->cmd_per_lun = shost->can_queue;
6441 shost->sg_tablesize = ctrl_info->sg_tablesize;
6442 shost->transportt = pqi_sas_transport_template;
6443 shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0);
6444 shost->unique_id = shost->irq;
6445 shost->nr_hw_queues = ctrl_info->num_queue_groups;
6446 shost->hostdata[0] = (unsigned long)ctrl_info;
6447
6448 rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev);
6449 if (rc) {
6450 dev_err(&ctrl_info->pci_dev->dev,
6451 "scsi_add_host failed for controller %u\n",
6452 ctrl_info->ctrl_id);
6453 goto free_host;
6454 }
6455
6456 rc = pqi_add_sas_host(shost, ctrl_info);
6457 if (rc) {
6458 dev_err(&ctrl_info->pci_dev->dev,
6459 "add SAS host failed for controller %u\n",
6460 ctrl_info->ctrl_id);
6461 goto remove_host;
6462 }
6463
6464 ctrl_info->scsi_host = shost;
6465
6466 return 0;
6467
6468 remove_host:
6469 scsi_remove_host(shost);
6470 free_host:
6471 scsi_host_put(shost);
6472
6473 return rc;
6474 }
6475
6476 static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info)
6477 {
6478 struct Scsi_Host *shost;
6479
6480 pqi_delete_sas_host(ctrl_info);
6481
6482 shost = ctrl_info->scsi_host;
6483 if (!shost)
6484 return;
6485
6486 scsi_remove_host(shost);
6487 scsi_host_put(shost);
6488 }
6489
6490 static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info)
6491 {
6492 int rc = 0;
6493 struct pqi_device_registers __iomem *pqi_registers;
6494 unsigned long timeout;
6495 unsigned int timeout_msecs;
6496 union pqi_reset_register reset_reg;
6497
6498 pqi_registers = ctrl_info->pqi_registers;
6499 timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100;
6500 timeout = msecs_to_jiffies(timeout_msecs) + jiffies;
6501
6502 while (1) {
6503 msleep(PQI_RESET_POLL_INTERVAL_MSECS);
6504 reset_reg.all_bits = readl(&pqi_registers->device_reset);
6505 if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED)
6506 break;
6507 pqi_check_ctrl_health(ctrl_info);
6508 if (pqi_ctrl_offline(ctrl_info)) {
6509 rc = -ENXIO;
6510 break;
6511 }
6512 if (time_after(jiffies, timeout)) {
6513 rc = -ETIMEDOUT;
6514 break;
6515 }
6516 }
6517
6518 return rc;
6519 }
6520
6521 static int pqi_reset(struct pqi_ctrl_info *ctrl_info)
6522 {
6523 int rc;
6524 union pqi_reset_register reset_reg;
6525
6526 if (ctrl_info->pqi_reset_quiesce_supported) {
6527 rc = sis_pqi_reset_quiesce(ctrl_info);
6528 if (rc) {
6529 dev_err(&ctrl_info->pci_dev->dev,
6530 "PQI reset failed during quiesce with error %d\n",
6531 rc);
6532 return rc;
6533 }
6534 }
6535
6536 reset_reg.all_bits = 0;
6537 reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET;
6538 reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET;
6539
6540 writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset);
6541
6542 rc = pqi_wait_for_pqi_reset_completion(ctrl_info);
6543 if (rc)
6544 dev_err(&ctrl_info->pci_dev->dev,
6545 "PQI reset failed with error %d\n", rc);
6546
6547 return rc;
6548 }
6549
6550 static int pqi_get_ctrl_firmware_version(struct pqi_ctrl_info *ctrl_info)
6551 {
6552 int rc;
6553 struct bmic_identify_controller *identify;
6554
6555 identify = kmalloc(sizeof(*identify), GFP_KERNEL);
6556 if (!identify)
6557 return -ENOMEM;
6558
6559 rc = pqi_identify_controller(ctrl_info, identify);
6560 if (rc)
6561 goto out;
6562
6563 memcpy(ctrl_info->firmware_version, identify->firmware_version,
6564 sizeof(identify->firmware_version));
6565 ctrl_info->firmware_version[sizeof(identify->firmware_version)] = '\0';
6566 snprintf(ctrl_info->firmware_version +
6567 strlen(ctrl_info->firmware_version),
6568 sizeof(ctrl_info->firmware_version),
6569 "-%u", get_unaligned_le16(&identify->firmware_build_number));
6570
6571 out:
6572 kfree(identify);
6573
6574 return rc;
6575 }
6576
6577 struct pqi_config_table_section_info {
6578 struct pqi_ctrl_info *ctrl_info;
6579 void *section;
6580 u32 section_offset;
6581 void __iomem *section_iomem_addr;
6582 };
6583
6584 static inline bool pqi_is_firmware_feature_supported(
6585 struct pqi_config_table_firmware_features *firmware_features,
6586 unsigned int bit_position)
6587 {
6588 unsigned int byte_index;
6589
6590 byte_index = bit_position / BITS_PER_BYTE;
6591
6592 if (byte_index >= le16_to_cpu(firmware_features->num_elements))
6593 return false;
6594
6595 return firmware_features->features_supported[byte_index] &
6596 (1 << (bit_position % BITS_PER_BYTE)) ? true : false;
6597 }
6598
6599 static inline bool pqi_is_firmware_feature_enabled(
6600 struct pqi_config_table_firmware_features *firmware_features,
6601 void __iomem *firmware_features_iomem_addr,
6602 unsigned int bit_position)
6603 {
6604 unsigned int byte_index;
6605 u8 __iomem *features_enabled_iomem_addr;
6606
6607 byte_index = (bit_position / BITS_PER_BYTE) +
6608 (le16_to_cpu(firmware_features->num_elements) * 2);
6609
6610 features_enabled_iomem_addr = firmware_features_iomem_addr +
6611 offsetof(struct pqi_config_table_firmware_features,
6612 features_supported) + byte_index;
6613
6614 return *((__force u8 *)features_enabled_iomem_addr) &
6615 (1 << (bit_position % BITS_PER_BYTE)) ? true : false;
6616 }
6617
6618 static inline void pqi_request_firmware_feature(
6619 struct pqi_config_table_firmware_features *firmware_features,
6620 unsigned int bit_position)
6621 {
6622 unsigned int byte_index;
6623
6624 byte_index = (bit_position / BITS_PER_BYTE) +
6625 le16_to_cpu(firmware_features->num_elements);
6626
6627 firmware_features->features_supported[byte_index] |=
6628 (1 << (bit_position % BITS_PER_BYTE));
6629 }
6630
6631 static int pqi_config_table_update(struct pqi_ctrl_info *ctrl_info,
6632 u16 first_section, u16 last_section)
6633 {
6634 struct pqi_vendor_general_request request;
6635
6636 memset(&request, 0, sizeof(request));
6637
6638 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
6639 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
6640 &request.header.iu_length);
6641 put_unaligned_le16(PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE,
6642 &request.function_code);
6643 put_unaligned_le16(first_section,
6644 &request.data.config_table_update.first_section);
6645 put_unaligned_le16(last_section,
6646 &request.data.config_table_update.last_section);
6647
6648 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
6649 0, NULL, NO_TIMEOUT);
6650 }
6651
6652 static int pqi_enable_firmware_features(struct pqi_ctrl_info *ctrl_info,
6653 struct pqi_config_table_firmware_features *firmware_features,
6654 void __iomem *firmware_features_iomem_addr)
6655 {
6656 void *features_requested;
6657 void __iomem *features_requested_iomem_addr;
6658
6659 features_requested = firmware_features->features_supported +
6660 le16_to_cpu(firmware_features->num_elements);
6661
6662 features_requested_iomem_addr = firmware_features_iomem_addr +
6663 (features_requested - (void *)firmware_features);
6664
6665 memcpy_toio(features_requested_iomem_addr, features_requested,
6666 le16_to_cpu(firmware_features->num_elements));
6667
6668 return pqi_config_table_update(ctrl_info,
6669 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES,
6670 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES);
6671 }
6672
6673 struct pqi_firmware_feature {
6674 char *feature_name;
6675 unsigned int feature_bit;
6676 bool supported;
6677 bool enabled;
6678 void (*feature_status)(struct pqi_ctrl_info *ctrl_info,
6679 struct pqi_firmware_feature *firmware_feature);
6680 };
6681
6682 static void pqi_firmware_feature_status(struct pqi_ctrl_info *ctrl_info,
6683 struct pqi_firmware_feature *firmware_feature)
6684 {
6685 if (!firmware_feature->supported) {
6686 dev_info(&ctrl_info->pci_dev->dev, "%s not supported by controller\n",
6687 firmware_feature->feature_name);
6688 return;
6689 }
6690
6691 if (firmware_feature->enabled) {
6692 dev_info(&ctrl_info->pci_dev->dev,
6693 "%s enabled\n", firmware_feature->feature_name);
6694 return;
6695 }
6696
6697 dev_err(&ctrl_info->pci_dev->dev, "failed to enable %s\n",
6698 firmware_feature->feature_name);
6699 }
6700
6701 static inline void pqi_firmware_feature_update(struct pqi_ctrl_info *ctrl_info,
6702 struct pqi_firmware_feature *firmware_feature)
6703 {
6704 if (firmware_feature->feature_status)
6705 firmware_feature->feature_status(ctrl_info, firmware_feature);
6706 }
6707
6708 static DEFINE_MUTEX(pqi_firmware_features_mutex);
6709
6710 static struct pqi_firmware_feature pqi_firmware_features[] = {
6711 {
6712 .feature_name = "Online Firmware Activation",
6713 .feature_bit = PQI_FIRMWARE_FEATURE_OFA,
6714 .feature_status = pqi_firmware_feature_status,
6715 },
6716 {
6717 .feature_name = "Serial Management Protocol",
6718 .feature_bit = PQI_FIRMWARE_FEATURE_SMP,
6719 .feature_status = pqi_firmware_feature_status,
6720 },
6721 {
6722 .feature_name = "New Soft Reset Handshake",
6723 .feature_bit = PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE,
6724 .feature_status = pqi_firmware_feature_status,
6725 },
6726 };
6727
6728 static void pqi_process_firmware_features(
6729 struct pqi_config_table_section_info *section_info)
6730 {
6731 int rc;
6732 struct pqi_ctrl_info *ctrl_info;
6733 struct pqi_config_table_firmware_features *firmware_features;
6734 void __iomem *firmware_features_iomem_addr;
6735 unsigned int i;
6736 unsigned int num_features_supported;
6737
6738 ctrl_info = section_info->ctrl_info;
6739 firmware_features = section_info->section;
6740 firmware_features_iomem_addr = section_info->section_iomem_addr;
6741
6742 for (i = 0, num_features_supported = 0;
6743 i < ARRAY_SIZE(pqi_firmware_features); i++) {
6744 if (pqi_is_firmware_feature_supported(firmware_features,
6745 pqi_firmware_features[i].feature_bit)) {
6746 pqi_firmware_features[i].supported = true;
6747 num_features_supported++;
6748 } else {
6749 pqi_firmware_feature_update(ctrl_info,
6750 &pqi_firmware_features[i]);
6751 }
6752 }
6753
6754 if (num_features_supported == 0)
6755 return;
6756
6757 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6758 if (!pqi_firmware_features[i].supported)
6759 continue;
6760 pqi_request_firmware_feature(firmware_features,
6761 pqi_firmware_features[i].feature_bit);
6762 }
6763
6764 rc = pqi_enable_firmware_features(ctrl_info, firmware_features,
6765 firmware_features_iomem_addr);
6766 if (rc) {
6767 dev_err(&ctrl_info->pci_dev->dev,
6768 "failed to enable firmware features in PQI configuration table\n");
6769 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6770 if (!pqi_firmware_features[i].supported)
6771 continue;
6772 pqi_firmware_feature_update(ctrl_info,
6773 &pqi_firmware_features[i]);
6774 }
6775 return;
6776 }
6777
6778 ctrl_info->soft_reset_handshake_supported = false;
6779 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6780 if (!pqi_firmware_features[i].supported)
6781 continue;
6782 if (pqi_is_firmware_feature_enabled(firmware_features,
6783 firmware_features_iomem_addr,
6784 pqi_firmware_features[i].feature_bit)) {
6785 pqi_firmware_features[i].enabled = true;
6786 if (pqi_firmware_features[i].feature_bit ==
6787 PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE)
6788 ctrl_info->soft_reset_handshake_supported =
6789 true;
6790 }
6791 pqi_firmware_feature_update(ctrl_info,
6792 &pqi_firmware_features[i]);
6793 }
6794 }
6795
6796 static void pqi_init_firmware_features(void)
6797 {
6798 unsigned int i;
6799
6800 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6801 pqi_firmware_features[i].supported = false;
6802 pqi_firmware_features[i].enabled = false;
6803 }
6804 }
6805
6806 static void pqi_process_firmware_features_section(
6807 struct pqi_config_table_section_info *section_info)
6808 {
6809 mutex_lock(&pqi_firmware_features_mutex);
6810 pqi_init_firmware_features();
6811 pqi_process_firmware_features(section_info);
6812 mutex_unlock(&pqi_firmware_features_mutex);
6813 }
6814
6815 static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info)
6816 {
6817 u32 table_length;
6818 u32 section_offset;
6819 void __iomem *table_iomem_addr;
6820 struct pqi_config_table *config_table;
6821 struct pqi_config_table_section_header *section;
6822 struct pqi_config_table_section_info section_info;
6823
6824 table_length = ctrl_info->config_table_length;
6825 if (table_length == 0)
6826 return 0;
6827
6828 config_table = kmalloc(table_length, GFP_KERNEL);
6829 if (!config_table) {
6830 dev_err(&ctrl_info->pci_dev->dev,
6831 "failed to allocate memory for PQI configuration table\n");
6832 return -ENOMEM;
6833 }
6834
6835 /*
6836 * Copy the config table contents from I/O memory space into the
6837 * temporary buffer.
6838 */
6839 table_iomem_addr = ctrl_info->iomem_base +
6840 ctrl_info->config_table_offset;
6841 memcpy_fromio(config_table, table_iomem_addr, table_length);
6842
6843 section_info.ctrl_info = ctrl_info;
6844 section_offset =
6845 get_unaligned_le32(&config_table->first_section_offset);
6846
6847 while (section_offset) {
6848 section = (void *)config_table + section_offset;
6849
6850 section_info.section = section;
6851 section_info.section_offset = section_offset;
6852 section_info.section_iomem_addr =
6853 table_iomem_addr + section_offset;
6854
6855 switch (get_unaligned_le16(&section->section_id)) {
6856 case PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES:
6857 pqi_process_firmware_features_section(&section_info);
6858 break;
6859 case PQI_CONFIG_TABLE_SECTION_HEARTBEAT:
6860 if (pqi_disable_heartbeat)
6861 dev_warn(&ctrl_info->pci_dev->dev,
6862 "heartbeat disabled by module parameter\n");
6863 else
6864 ctrl_info->heartbeat_counter =
6865 table_iomem_addr +
6866 section_offset +
6867 offsetof(
6868 struct pqi_config_table_heartbeat,
6869 heartbeat_counter);
6870 break;
6871 case PQI_CONFIG_TABLE_SECTION_SOFT_RESET:
6872 ctrl_info->soft_reset_status =
6873 table_iomem_addr +
6874 section_offset +
6875 offsetof(struct pqi_config_table_soft_reset,
6876 soft_reset_status);
6877 break;
6878 }
6879
6880 section_offset =
6881 get_unaligned_le16(&section->next_section_offset);
6882 }
6883
6884 kfree(config_table);
6885
6886 return 0;
6887 }
6888
6889 /* Switches the controller from PQI mode back into SIS mode. */
6890
6891 static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info)
6892 {
6893 int rc;
6894
6895 pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE);
6896 rc = pqi_reset(ctrl_info);
6897 if (rc)
6898 return rc;
6899 rc = sis_reenable_sis_mode(ctrl_info);
6900 if (rc) {
6901 dev_err(&ctrl_info->pci_dev->dev,
6902 "re-enabling SIS mode failed with error %d\n", rc);
6903 return rc;
6904 }
6905 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
6906
6907 return 0;
6908 }
6909
6910 /*
6911 * If the controller isn't already in SIS mode, this function forces it into
6912 * SIS mode.
6913 */
6914
6915 static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info)
6916 {
6917 if (!sis_is_firmware_running(ctrl_info))
6918 return -ENXIO;
6919
6920 if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE)
6921 return 0;
6922
6923 if (sis_is_kernel_up(ctrl_info)) {
6924 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
6925 return 0;
6926 }
6927
6928 return pqi_revert_to_sis_mode(ctrl_info);
6929 }
6930
6931 static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info)
6932 {
6933 int rc;
6934
6935 rc = pqi_force_sis_mode(ctrl_info);
6936 if (rc)
6937 return rc;
6938
6939 /*
6940 * Wait until the controller is ready to start accepting SIS
6941 * commands.
6942 */
6943 rc = sis_wait_for_ctrl_ready(ctrl_info);
6944 if (rc)
6945 return rc;
6946
6947 /*
6948 * Get the controller properties. This allows us to determine
6949 * whether or not it supports PQI mode.
6950 */
6951 rc = sis_get_ctrl_properties(ctrl_info);
6952 if (rc) {
6953 dev_err(&ctrl_info->pci_dev->dev,
6954 "error obtaining controller properties\n");
6955 return rc;
6956 }
6957
6958 rc = sis_get_pqi_capabilities(ctrl_info);
6959 if (rc) {
6960 dev_err(&ctrl_info->pci_dev->dev,
6961 "error obtaining controller capabilities\n");
6962 return rc;
6963 }
6964
6965 if (reset_devices) {
6966 if (ctrl_info->max_outstanding_requests >
6967 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP)
6968 ctrl_info->max_outstanding_requests =
6969 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP;
6970 } else {
6971 if (ctrl_info->max_outstanding_requests >
6972 PQI_MAX_OUTSTANDING_REQUESTS)
6973 ctrl_info->max_outstanding_requests =
6974 PQI_MAX_OUTSTANDING_REQUESTS;
6975 }
6976
6977 pqi_calculate_io_resources(ctrl_info);
6978
6979 rc = pqi_alloc_error_buffer(ctrl_info);
6980 if (rc) {
6981 dev_err(&ctrl_info->pci_dev->dev,
6982 "failed to allocate PQI error buffer\n");
6983 return rc;
6984 }
6985
6986 /*
6987 * If the function we are about to call succeeds, the
6988 * controller will transition from legacy SIS mode
6989 * into PQI mode.
6990 */
6991 rc = sis_init_base_struct_addr(ctrl_info);
6992 if (rc) {
6993 dev_err(&ctrl_info->pci_dev->dev,
6994 "error initializing PQI mode\n");
6995 return rc;
6996 }
6997
6998 /* Wait for the controller to complete the SIS -> PQI transition. */
6999 rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
7000 if (rc) {
7001 dev_err(&ctrl_info->pci_dev->dev,
7002 "transition to PQI mode failed\n");
7003 return rc;
7004 }
7005
7006 /* From here on, we are running in PQI mode. */
7007 ctrl_info->pqi_mode_enabled = true;
7008 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7009
7010 rc = pqi_alloc_admin_queues(ctrl_info);
7011 if (rc) {
7012 dev_err(&ctrl_info->pci_dev->dev,
7013 "failed to allocate admin queues\n");
7014 return rc;
7015 }
7016
7017 rc = pqi_create_admin_queues(ctrl_info);
7018 if (rc) {
7019 dev_err(&ctrl_info->pci_dev->dev,
7020 "error creating admin queues\n");
7021 return rc;
7022 }
7023
7024 rc = pqi_report_device_capability(ctrl_info);
7025 if (rc) {
7026 dev_err(&ctrl_info->pci_dev->dev,
7027 "obtaining device capability failed\n");
7028 return rc;
7029 }
7030
7031 rc = pqi_validate_device_capability(ctrl_info);
7032 if (rc)
7033 return rc;
7034
7035 pqi_calculate_queue_resources(ctrl_info);
7036
7037 rc = pqi_enable_msix_interrupts(ctrl_info);
7038 if (rc)
7039 return rc;
7040
7041 if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) {
7042 ctrl_info->max_msix_vectors =
7043 ctrl_info->num_msix_vectors_enabled;
7044 pqi_calculate_queue_resources(ctrl_info);
7045 }
7046
7047 rc = pqi_alloc_io_resources(ctrl_info);
7048 if (rc)
7049 return rc;
7050
7051 rc = pqi_alloc_operational_queues(ctrl_info);
7052 if (rc) {
7053 dev_err(&ctrl_info->pci_dev->dev,
7054 "failed to allocate operational queues\n");
7055 return rc;
7056 }
7057
7058 pqi_init_operational_queues(ctrl_info);
7059
7060 rc = pqi_request_irqs(ctrl_info);
7061 if (rc)
7062 return rc;
7063
7064 rc = pqi_create_queues(ctrl_info);
7065 if (rc)
7066 return rc;
7067
7068 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
7069
7070 ctrl_info->controller_online = true;
7071
7072 rc = pqi_process_config_table(ctrl_info);
7073 if (rc)
7074 return rc;
7075
7076 pqi_start_heartbeat_timer(ctrl_info);
7077
7078 rc = pqi_enable_events(ctrl_info);
7079 if (rc) {
7080 dev_err(&ctrl_info->pci_dev->dev,
7081 "error enabling events\n");
7082 return rc;
7083 }
7084
7085 /* Register with the SCSI subsystem. */
7086 rc = pqi_register_scsi(ctrl_info);
7087 if (rc)
7088 return rc;
7089
7090 rc = pqi_get_ctrl_firmware_version(ctrl_info);
7091 if (rc) {
7092 dev_err(&ctrl_info->pci_dev->dev,
7093 "error obtaining firmware version\n");
7094 return rc;
7095 }
7096
7097 rc = pqi_set_diag_rescan(ctrl_info);
7098 if (rc) {
7099 dev_err(&ctrl_info->pci_dev->dev,
7100 "error enabling multi-lun rescan\n");
7101 return rc;
7102 }
7103
7104 rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
7105 if (rc) {
7106 dev_err(&ctrl_info->pci_dev->dev,
7107 "error updating host wellness\n");
7108 return rc;
7109 }
7110
7111 pqi_schedule_update_time_worker(ctrl_info);
7112
7113 pqi_scan_scsi_devices(ctrl_info);
7114
7115 return 0;
7116 }
7117
7118 static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info)
7119 {
7120 unsigned int i;
7121 struct pqi_admin_queues *admin_queues;
7122 struct pqi_event_queue *event_queue;
7123
7124 admin_queues = &ctrl_info->admin_queues;
7125 admin_queues->iq_pi_copy = 0;
7126 admin_queues->oq_ci_copy = 0;
7127 writel(0, admin_queues->oq_pi);
7128
7129 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
7130 ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0;
7131 ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0;
7132 ctrl_info->queue_groups[i].oq_ci_copy = 0;
7133
7134 writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]);
7135 writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]);
7136 writel(0, ctrl_info->queue_groups[i].oq_pi);
7137 }
7138
7139 event_queue = &ctrl_info->event_queue;
7140 writel(0, event_queue->oq_pi);
7141 event_queue->oq_ci_copy = 0;
7142 }
7143
7144 static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info)
7145 {
7146 int rc;
7147
7148 rc = pqi_force_sis_mode(ctrl_info);
7149 if (rc)
7150 return rc;
7151
7152 /*
7153 * Wait until the controller is ready to start accepting SIS
7154 * commands.
7155 */
7156 rc = sis_wait_for_ctrl_ready_resume(ctrl_info);
7157 if (rc)
7158 return rc;
7159
7160 /*
7161 * Get the controller properties. This allows us to determine
7162 * whether or not it supports PQI mode.
7163 */
7164 rc = sis_get_ctrl_properties(ctrl_info);
7165 if (rc) {
7166 dev_err(&ctrl_info->pci_dev->dev,
7167 "error obtaining controller properties\n");
7168 return rc;
7169 }
7170
7171 rc = sis_get_pqi_capabilities(ctrl_info);
7172 if (rc) {
7173 dev_err(&ctrl_info->pci_dev->dev,
7174 "error obtaining controller capabilities\n");
7175 return rc;
7176 }
7177
7178 /*
7179 * If the function we are about to call succeeds, the
7180 * controller will transition from legacy SIS mode
7181 * into PQI mode.
7182 */
7183 rc = sis_init_base_struct_addr(ctrl_info);
7184 if (rc) {
7185 dev_err(&ctrl_info->pci_dev->dev,
7186 "error initializing PQI mode\n");
7187 return rc;
7188 }
7189
7190 /* Wait for the controller to complete the SIS -> PQI transition. */
7191 rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
7192 if (rc) {
7193 dev_err(&ctrl_info->pci_dev->dev,
7194 "transition to PQI mode failed\n");
7195 return rc;
7196 }
7197
7198 /* From here on, we are running in PQI mode. */
7199 ctrl_info->pqi_mode_enabled = true;
7200 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7201
7202 pqi_reinit_queues(ctrl_info);
7203
7204 rc = pqi_create_admin_queues(ctrl_info);
7205 if (rc) {
7206 dev_err(&ctrl_info->pci_dev->dev,
7207 "error creating admin queues\n");
7208 return rc;
7209 }
7210
7211 rc = pqi_create_queues(ctrl_info);
7212 if (rc)
7213 return rc;
7214
7215 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
7216
7217 ctrl_info->controller_online = true;
7218 pqi_ctrl_unblock_requests(ctrl_info);
7219
7220 rc = pqi_process_config_table(ctrl_info);
7221 if (rc)
7222 return rc;
7223
7224 pqi_start_heartbeat_timer(ctrl_info);
7225
7226 rc = pqi_enable_events(ctrl_info);
7227 if (rc) {
7228 dev_err(&ctrl_info->pci_dev->dev,
7229 "error enabling events\n");
7230 return rc;
7231 }
7232
7233 rc = pqi_get_ctrl_firmware_version(ctrl_info);
7234 if (rc) {
7235 dev_err(&ctrl_info->pci_dev->dev,
7236 "error obtaining firmware version\n");
7237 return rc;
7238 }
7239
7240 rc = pqi_set_diag_rescan(ctrl_info);
7241 if (rc) {
7242 dev_err(&ctrl_info->pci_dev->dev,
7243 "error enabling multi-lun rescan\n");
7244 return rc;
7245 }
7246
7247 rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
7248 if (rc) {
7249 dev_err(&ctrl_info->pci_dev->dev,
7250 "error updating host wellness\n");
7251 return rc;
7252 }
7253
7254 pqi_schedule_update_time_worker(ctrl_info);
7255
7256 pqi_scan_scsi_devices(ctrl_info);
7257
7258 return 0;
7259 }
7260
7261 static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev,
7262 u16 timeout)
7263 {
7264 return pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2,
7265 PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout);
7266 }
7267
7268 static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info)
7269 {
7270 int rc;
7271 u64 mask;
7272
7273 rc = pci_enable_device(ctrl_info->pci_dev);
7274 if (rc) {
7275 dev_err(&ctrl_info->pci_dev->dev,
7276 "failed to enable PCI device\n");
7277 return rc;
7278 }
7279
7280 if (sizeof(dma_addr_t) > 4)
7281 mask = DMA_BIT_MASK(64);
7282 else
7283 mask = DMA_BIT_MASK(32);
7284
7285 rc = dma_set_mask(&ctrl_info->pci_dev->dev, mask);
7286 if (rc) {
7287 dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n");
7288 goto disable_device;
7289 }
7290
7291 rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT);
7292 if (rc) {
7293 dev_err(&ctrl_info->pci_dev->dev,
7294 "failed to obtain PCI resources\n");
7295 goto disable_device;
7296 }
7297
7298 ctrl_info->iomem_base = ioremap_nocache(pci_resource_start(
7299 ctrl_info->pci_dev, 0),
7300 sizeof(struct pqi_ctrl_registers));
7301 if (!ctrl_info->iomem_base) {
7302 dev_err(&ctrl_info->pci_dev->dev,
7303 "failed to map memory for controller registers\n");
7304 rc = -ENOMEM;
7305 goto release_regions;
7306 }
7307
7308 #define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6
7309
7310 /* Increase the PCIe completion timeout. */
7311 rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev,
7312 PCI_EXP_COMP_TIMEOUT_65_TO_210_MS);
7313 if (rc) {
7314 dev_err(&ctrl_info->pci_dev->dev,
7315 "failed to set PCIe completion timeout\n");
7316 goto release_regions;
7317 }
7318
7319 /* Enable bus mastering. */
7320 pci_set_master(ctrl_info->pci_dev);
7321
7322 ctrl_info->registers = ctrl_info->iomem_base;
7323 ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers;
7324
7325 pci_set_drvdata(ctrl_info->pci_dev, ctrl_info);
7326
7327 return 0;
7328
7329 release_regions:
7330 pci_release_regions(ctrl_info->pci_dev);
7331 disable_device:
7332 pci_disable_device(ctrl_info->pci_dev);
7333
7334 return rc;
7335 }
7336
7337 static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info)
7338 {
7339 iounmap(ctrl_info->iomem_base);
7340 pci_release_regions(ctrl_info->pci_dev);
7341 if (pci_is_enabled(ctrl_info->pci_dev))
7342 pci_disable_device(ctrl_info->pci_dev);
7343 pci_set_drvdata(ctrl_info->pci_dev, NULL);
7344 }
7345
7346 static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node)
7347 {
7348 struct pqi_ctrl_info *ctrl_info;
7349
7350 ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info),
7351 GFP_KERNEL, numa_node);
7352 if (!ctrl_info)
7353 return NULL;
7354
7355 mutex_init(&ctrl_info->scan_mutex);
7356 mutex_init(&ctrl_info->lun_reset_mutex);
7357 mutex_init(&ctrl_info->ofa_mutex);
7358
7359 INIT_LIST_HEAD(&ctrl_info->scsi_device_list);
7360 spin_lock_init(&ctrl_info->scsi_device_list_lock);
7361
7362 INIT_WORK(&ctrl_info->event_work, pqi_event_worker);
7363 atomic_set(&ctrl_info->num_interrupts, 0);
7364
7365 INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker);
7366 INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker);
7367
7368 timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0);
7369 INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker);
7370
7371 sema_init(&ctrl_info->sync_request_sem,
7372 PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS);
7373 init_waitqueue_head(&ctrl_info->block_requests_wait);
7374
7375 INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list);
7376 spin_lock_init(&ctrl_info->raid_bypass_retry_list_lock);
7377 INIT_WORK(&ctrl_info->raid_bypass_retry_work,
7378 pqi_raid_bypass_retry_worker);
7379
7380 ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1;
7381 ctrl_info->irq_mode = IRQ_MODE_NONE;
7382 ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS;
7383
7384 return ctrl_info;
7385 }
7386
7387 static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info)
7388 {
7389 kfree(ctrl_info);
7390 }
7391
7392 static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info)
7393 {
7394 pqi_free_irqs(ctrl_info);
7395 pqi_disable_msix_interrupts(ctrl_info);
7396 }
7397
7398 static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info)
7399 {
7400 pqi_stop_heartbeat_timer(ctrl_info);
7401 pqi_free_interrupts(ctrl_info);
7402 if (ctrl_info->queue_memory_base)
7403 dma_free_coherent(&ctrl_info->pci_dev->dev,
7404 ctrl_info->queue_memory_length,
7405 ctrl_info->queue_memory_base,
7406 ctrl_info->queue_memory_base_dma_handle);
7407 if (ctrl_info->admin_queue_memory_base)
7408 dma_free_coherent(&ctrl_info->pci_dev->dev,
7409 ctrl_info->admin_queue_memory_length,
7410 ctrl_info->admin_queue_memory_base,
7411 ctrl_info->admin_queue_memory_base_dma_handle);
7412 pqi_free_all_io_requests(ctrl_info);
7413 if (ctrl_info->error_buffer)
7414 dma_free_coherent(&ctrl_info->pci_dev->dev,
7415 ctrl_info->error_buffer_length,
7416 ctrl_info->error_buffer,
7417 ctrl_info->error_buffer_dma_handle);
7418 if (ctrl_info->iomem_base)
7419 pqi_cleanup_pci_init(ctrl_info);
7420 pqi_free_ctrl_info(ctrl_info);
7421 }
7422
7423 static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info)
7424 {
7425 pqi_cancel_rescan_worker(ctrl_info);
7426 pqi_cancel_update_time_worker(ctrl_info);
7427 pqi_remove_all_scsi_devices(ctrl_info);
7428 pqi_unregister_scsi(ctrl_info);
7429 if (ctrl_info->pqi_mode_enabled)
7430 pqi_revert_to_sis_mode(ctrl_info);
7431 pqi_free_ctrl_resources(ctrl_info);
7432 }
7433
7434 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info)
7435 {
7436 pqi_cancel_update_time_worker(ctrl_info);
7437 pqi_cancel_rescan_worker(ctrl_info);
7438 pqi_wait_until_lun_reset_finished(ctrl_info);
7439 pqi_wait_until_scan_finished(ctrl_info);
7440 pqi_ctrl_ofa_start(ctrl_info);
7441 pqi_ctrl_block_requests(ctrl_info);
7442 pqi_ctrl_wait_until_quiesced(ctrl_info);
7443 pqi_ctrl_wait_for_pending_io(ctrl_info, PQI_PENDING_IO_TIMEOUT_SECS);
7444 pqi_fail_io_queued_for_all_devices(ctrl_info);
7445 pqi_wait_until_inbound_queues_empty(ctrl_info);
7446 pqi_stop_heartbeat_timer(ctrl_info);
7447 ctrl_info->pqi_mode_enabled = false;
7448 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
7449 }
7450
7451 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info)
7452 {
7453 pqi_ofa_free_host_buffer(ctrl_info);
7454 ctrl_info->pqi_mode_enabled = true;
7455 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7456 ctrl_info->controller_online = true;
7457 pqi_ctrl_unblock_requests(ctrl_info);
7458 pqi_start_heartbeat_timer(ctrl_info);
7459 pqi_schedule_update_time_worker(ctrl_info);
7460 pqi_clear_soft_reset_status(ctrl_info,
7461 PQI_SOFT_RESET_ABORT);
7462 pqi_scan_scsi_devices(ctrl_info);
7463 }
7464
7465 static int pqi_ofa_alloc_mem(struct pqi_ctrl_info *ctrl_info,
7466 u32 total_size, u32 chunk_size)
7467 {
7468 u32 sg_count;
7469 u32 size;
7470 int i;
7471 struct pqi_sg_descriptor *mem_descriptor = NULL;
7472 struct device *dev;
7473 struct pqi_ofa_memory *ofap;
7474
7475 dev = &ctrl_info->pci_dev->dev;
7476
7477 sg_count = (total_size + chunk_size - 1);
7478 sg_count /= chunk_size;
7479
7480 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7481
7482 if (sg_count*chunk_size < total_size)
7483 goto out;
7484
7485 ctrl_info->pqi_ofa_chunk_virt_addr =
7486 kcalloc(sg_count, sizeof(void *), GFP_KERNEL);
7487 if (!ctrl_info->pqi_ofa_chunk_virt_addr)
7488 goto out;
7489
7490 for (size = 0, i = 0; size < total_size; size += chunk_size, i++) {
7491 dma_addr_t dma_handle;
7492
7493 ctrl_info->pqi_ofa_chunk_virt_addr[i] =
7494 dma_alloc_coherent(dev, chunk_size, &dma_handle,
7495 GFP_KERNEL);
7496
7497 if (!ctrl_info->pqi_ofa_chunk_virt_addr[i])
7498 break;
7499
7500 mem_descriptor = &ofap->sg_descriptor[i];
7501 put_unaligned_le64 ((u64) dma_handle, &mem_descriptor->address);
7502 put_unaligned_le32 (chunk_size, &mem_descriptor->length);
7503 }
7504
7505 if (!size || size < total_size)
7506 goto out_free_chunks;
7507
7508 put_unaligned_le32(CISS_SG_LAST, &mem_descriptor->flags);
7509 put_unaligned_le16(sg_count, &ofap->num_memory_descriptors);
7510 put_unaligned_le32(size, &ofap->bytes_allocated);
7511
7512 return 0;
7513
7514 out_free_chunks:
7515 while (--i >= 0) {
7516 mem_descriptor = &ofap->sg_descriptor[i];
7517 dma_free_coherent(dev, chunk_size,
7518 ctrl_info->pqi_ofa_chunk_virt_addr[i],
7519 get_unaligned_le64(&mem_descriptor->address));
7520 }
7521 kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
7522
7523 out:
7524 put_unaligned_le32 (0, &ofap->bytes_allocated);
7525 return -ENOMEM;
7526 }
7527
7528 static int pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info *ctrl_info)
7529 {
7530 u32 total_size;
7531 u32 min_chunk_size;
7532 u32 chunk_sz;
7533
7534 total_size = le32_to_cpu(
7535 ctrl_info->pqi_ofa_mem_virt_addr->bytes_allocated);
7536 min_chunk_size = total_size / PQI_OFA_MAX_SG_DESCRIPTORS;
7537
7538 for (chunk_sz = total_size; chunk_sz >= min_chunk_size; chunk_sz /= 2)
7539 if (!pqi_ofa_alloc_mem(ctrl_info, total_size, chunk_sz))
7540 return 0;
7541
7542 return -ENOMEM;
7543 }
7544
7545 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info,
7546 u32 bytes_requested)
7547 {
7548 struct pqi_ofa_memory *pqi_ofa_memory;
7549 struct device *dev;
7550
7551 dev = &ctrl_info->pci_dev->dev;
7552 pqi_ofa_memory = dma_alloc_coherent(dev,
7553 PQI_OFA_MEMORY_DESCRIPTOR_LENGTH,
7554 &ctrl_info->pqi_ofa_mem_dma_handle,
7555 GFP_KERNEL);
7556
7557 if (!pqi_ofa_memory)
7558 return;
7559
7560 put_unaligned_le16(PQI_OFA_VERSION, &pqi_ofa_memory->version);
7561 memcpy(&pqi_ofa_memory->signature, PQI_OFA_SIGNATURE,
7562 sizeof(pqi_ofa_memory->signature));
7563 pqi_ofa_memory->bytes_allocated = cpu_to_le32(bytes_requested);
7564
7565 ctrl_info->pqi_ofa_mem_virt_addr = pqi_ofa_memory;
7566
7567 if (pqi_ofa_alloc_host_buffer(ctrl_info) < 0) {
7568 dev_err(dev, "Failed to allocate host buffer of size = %u",
7569 bytes_requested);
7570 }
7571 }
7572
7573 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info)
7574 {
7575 int i;
7576 struct pqi_sg_descriptor *mem_descriptor;
7577 struct pqi_ofa_memory *ofap;
7578
7579 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7580
7581 if (!ofap)
7582 return;
7583
7584 if (!ofap->bytes_allocated)
7585 goto out;
7586
7587 mem_descriptor = ofap->sg_descriptor;
7588
7589 for (i = 0; i < get_unaligned_le16(&ofap->num_memory_descriptors);
7590 i++) {
7591 dma_free_coherent(&ctrl_info->pci_dev->dev,
7592 get_unaligned_le32(&mem_descriptor[i].length),
7593 ctrl_info->pqi_ofa_chunk_virt_addr[i],
7594 get_unaligned_le64(&mem_descriptor[i].address));
7595 }
7596 kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
7597
7598 out:
7599 dma_free_coherent(&ctrl_info->pci_dev->dev,
7600 PQI_OFA_MEMORY_DESCRIPTOR_LENGTH, ofap,
7601 ctrl_info->pqi_ofa_mem_dma_handle);
7602 ctrl_info->pqi_ofa_mem_virt_addr = NULL;
7603 }
7604
7605 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info)
7606 {
7607 struct pqi_vendor_general_request request;
7608 size_t size;
7609 struct pqi_ofa_memory *ofap;
7610
7611 memset(&request, 0, sizeof(request));
7612
7613 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7614
7615 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
7616 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
7617 &request.header.iu_length);
7618 put_unaligned_le16(PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE,
7619 &request.function_code);
7620
7621 if (ofap) {
7622 size = offsetof(struct pqi_ofa_memory, sg_descriptor) +
7623 get_unaligned_le16(&ofap->num_memory_descriptors) *
7624 sizeof(struct pqi_sg_descriptor);
7625
7626 put_unaligned_le64((u64)ctrl_info->pqi_ofa_mem_dma_handle,
7627 &request.data.ofa_memory_allocation.buffer_address);
7628 put_unaligned_le32(size,
7629 &request.data.ofa_memory_allocation.buffer_length);
7630
7631 }
7632
7633 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
7634 0, NULL, NO_TIMEOUT);
7635 }
7636
7637 #define PQI_POST_RESET_DELAY_B4_MSGU_READY 5000
7638
7639 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info)
7640 {
7641 msleep(PQI_POST_RESET_DELAY_B4_MSGU_READY);
7642 return pqi_ctrl_init_resume(ctrl_info);
7643 }
7644
7645 static void pqi_perform_lockup_action(void)
7646 {
7647 switch (pqi_lockup_action) {
7648 case PANIC:
7649 panic("FATAL: Smart Family Controller lockup detected");
7650 break;
7651 case REBOOT:
7652 emergency_restart();
7653 break;
7654 case NONE:
7655 default:
7656 break;
7657 }
7658 }
7659
7660 static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = {
7661 .data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR,
7662 .status = SAM_STAT_CHECK_CONDITION,
7663 };
7664
7665 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info)
7666 {
7667 unsigned int i;
7668 struct pqi_io_request *io_request;
7669 struct scsi_cmnd *scmd;
7670
7671 for (i = 0; i < ctrl_info->max_io_slots; i++) {
7672 io_request = &ctrl_info->io_request_pool[i];
7673 if (atomic_read(&io_request->refcount) == 0)
7674 continue;
7675
7676 scmd = io_request->scmd;
7677 if (scmd) {
7678 set_host_byte(scmd, DID_NO_CONNECT);
7679 } else {
7680 io_request->status = -ENXIO;
7681 io_request->error_info =
7682 &pqi_ctrl_offline_raid_error_info;
7683 }
7684
7685 io_request->io_complete_callback(io_request,
7686 io_request->context);
7687 }
7688 }
7689
7690 static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info)
7691 {
7692 pqi_perform_lockup_action();
7693 pqi_stop_heartbeat_timer(ctrl_info);
7694 pqi_free_interrupts(ctrl_info);
7695 pqi_cancel_rescan_worker(ctrl_info);
7696 pqi_cancel_update_time_worker(ctrl_info);
7697 pqi_ctrl_wait_until_quiesced(ctrl_info);
7698 pqi_fail_all_outstanding_requests(ctrl_info);
7699 pqi_clear_all_queued_raid_bypass_retries(ctrl_info);
7700 pqi_ctrl_unblock_requests(ctrl_info);
7701 }
7702
7703 static void pqi_ctrl_offline_worker(struct work_struct *work)
7704 {
7705 struct pqi_ctrl_info *ctrl_info;
7706
7707 ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work);
7708 pqi_take_ctrl_offline_deferred(ctrl_info);
7709 }
7710
7711 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info)
7712 {
7713 if (!ctrl_info->controller_online)
7714 return;
7715
7716 ctrl_info->controller_online = false;
7717 ctrl_info->pqi_mode_enabled = false;
7718 pqi_ctrl_block_requests(ctrl_info);
7719 if (!pqi_disable_ctrl_shutdown)
7720 sis_shutdown_ctrl(ctrl_info);
7721 pci_disable_device(ctrl_info->pci_dev);
7722 dev_err(&ctrl_info->pci_dev->dev, "controller offline\n");
7723 schedule_work(&ctrl_info->ctrl_offline_work);
7724 }
7725
7726 static void pqi_print_ctrl_info(struct pci_dev *pci_dev,
7727 const struct pci_device_id *id)
7728 {
7729 char *ctrl_description;
7730
7731 if (id->driver_data)
7732 ctrl_description = (char *)id->driver_data;
7733 else
7734 ctrl_description = "Microsemi Smart Family Controller";
7735
7736 dev_info(&pci_dev->dev, "%s found\n", ctrl_description);
7737 }
7738
7739 static int pqi_pci_probe(struct pci_dev *pci_dev,
7740 const struct pci_device_id *id)
7741 {
7742 int rc;
7743 int node, cp_node;
7744 struct pqi_ctrl_info *ctrl_info;
7745
7746 pqi_print_ctrl_info(pci_dev, id);
7747
7748 if (pqi_disable_device_id_wildcards &&
7749 id->subvendor == PCI_ANY_ID &&
7750 id->subdevice == PCI_ANY_ID) {
7751 dev_warn(&pci_dev->dev,
7752 "controller not probed because device ID wildcards are disabled\n");
7753 return -ENODEV;
7754 }
7755
7756 if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID)
7757 dev_warn(&pci_dev->dev,
7758 "controller device ID matched using wildcards\n");
7759
7760 node = dev_to_node(&pci_dev->dev);
7761 if (node == NUMA_NO_NODE) {
7762 cp_node = cpu_to_node(0);
7763 if (cp_node == NUMA_NO_NODE)
7764 cp_node = 0;
7765 set_dev_node(&pci_dev->dev, cp_node);
7766 }
7767
7768 ctrl_info = pqi_alloc_ctrl_info(node);
7769 if (!ctrl_info) {
7770 dev_err(&pci_dev->dev,
7771 "failed to allocate controller info block\n");
7772 return -ENOMEM;
7773 }
7774
7775 ctrl_info->pci_dev = pci_dev;
7776
7777 rc = pqi_pci_init(ctrl_info);
7778 if (rc)
7779 goto error;
7780
7781 rc = pqi_ctrl_init(ctrl_info);
7782 if (rc)
7783 goto error;
7784
7785 return 0;
7786
7787 error:
7788 pqi_remove_ctrl(ctrl_info);
7789
7790 return rc;
7791 }
7792
7793 static void pqi_pci_remove(struct pci_dev *pci_dev)
7794 {
7795 struct pqi_ctrl_info *ctrl_info;
7796
7797 ctrl_info = pci_get_drvdata(pci_dev);
7798 if (!ctrl_info)
7799 return;
7800
7801 ctrl_info->in_shutdown = true;
7802
7803 pqi_remove_ctrl(ctrl_info);
7804 }
7805
7806 static void pqi_shutdown(struct pci_dev *pci_dev)
7807 {
7808 int rc;
7809 struct pqi_ctrl_info *ctrl_info;
7810
7811 ctrl_info = pci_get_drvdata(pci_dev);
7812 if (!ctrl_info)
7813 goto error;
7814
7815 /*
7816 * Write all data in the controller's battery-backed cache to
7817 * storage.
7818 */
7819 rc = pqi_flush_cache(ctrl_info, SHUTDOWN);
7820 pqi_free_interrupts(ctrl_info);
7821 pqi_reset(ctrl_info);
7822 if (rc == 0)
7823 return;
7824
7825 error:
7826 dev_warn(&pci_dev->dev,
7827 "unable to flush controller cache\n");
7828 }
7829
7830 static void pqi_process_lockup_action_param(void)
7831 {
7832 unsigned int i;
7833
7834 if (!pqi_lockup_action_param)
7835 return;
7836
7837 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
7838 if (strcmp(pqi_lockup_action_param,
7839 pqi_lockup_actions[i].name) == 0) {
7840 pqi_lockup_action = pqi_lockup_actions[i].action;
7841 return;
7842 }
7843 }
7844
7845 pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n",
7846 DRIVER_NAME_SHORT, pqi_lockup_action_param);
7847 }
7848
7849 static void pqi_process_module_params(void)
7850 {
7851 pqi_process_lockup_action_param();
7852 }
7853
7854 static __maybe_unused int pqi_suspend(struct pci_dev *pci_dev, pm_message_t state)
7855 {
7856 struct pqi_ctrl_info *ctrl_info;
7857
7858 ctrl_info = pci_get_drvdata(pci_dev);
7859
7860 pqi_disable_events(ctrl_info);
7861 pqi_cancel_update_time_worker(ctrl_info);
7862 pqi_cancel_rescan_worker(ctrl_info);
7863 pqi_wait_until_scan_finished(ctrl_info);
7864 pqi_wait_until_lun_reset_finished(ctrl_info);
7865 pqi_wait_until_ofa_finished(ctrl_info);
7866 pqi_flush_cache(ctrl_info, SUSPEND);
7867 pqi_ctrl_block_requests(ctrl_info);
7868 pqi_ctrl_wait_until_quiesced(ctrl_info);
7869 pqi_wait_until_inbound_queues_empty(ctrl_info);
7870 pqi_ctrl_wait_for_pending_io(ctrl_info, NO_TIMEOUT);
7871 pqi_stop_heartbeat_timer(ctrl_info);
7872
7873 if (state.event == PM_EVENT_FREEZE)
7874 return 0;
7875
7876 pci_save_state(pci_dev);
7877 pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
7878
7879 ctrl_info->controller_online = false;
7880 ctrl_info->pqi_mode_enabled = false;
7881
7882 return 0;
7883 }
7884
7885 static __maybe_unused int pqi_resume(struct pci_dev *pci_dev)
7886 {
7887 int rc;
7888 struct pqi_ctrl_info *ctrl_info;
7889
7890 ctrl_info = pci_get_drvdata(pci_dev);
7891
7892 if (pci_dev->current_state != PCI_D0) {
7893 ctrl_info->max_hw_queue_index = 0;
7894 pqi_free_interrupts(ctrl_info);
7895 pqi_change_irq_mode(ctrl_info, IRQ_MODE_INTX);
7896 rc = request_irq(pci_irq_vector(pci_dev, 0), pqi_irq_handler,
7897 IRQF_SHARED, DRIVER_NAME_SHORT,
7898 &ctrl_info->queue_groups[0]);
7899 if (rc) {
7900 dev_err(&ctrl_info->pci_dev->dev,
7901 "irq %u init failed with error %d\n",
7902 pci_dev->irq, rc);
7903 return rc;
7904 }
7905 pqi_start_heartbeat_timer(ctrl_info);
7906 pqi_ctrl_unblock_requests(ctrl_info);
7907 return 0;
7908 }
7909
7910 pci_set_power_state(pci_dev, PCI_D0);
7911 pci_restore_state(pci_dev);
7912
7913 return pqi_ctrl_init_resume(ctrl_info);
7914 }
7915
7916 /* Define the PCI IDs for the controllers that we support. */
7917 static const struct pci_device_id pqi_pci_id_table[] = {
7918 {
7919 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7920 0x105b, 0x1211)
7921 },
7922 {
7923 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7924 0x105b, 0x1321)
7925 },
7926 {
7927 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7928 0x152d, 0x8a22)
7929 },
7930 {
7931 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7932 0x152d, 0x8a23)
7933 },
7934 {
7935 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7936 0x152d, 0x8a24)
7937 },
7938 {
7939 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7940 0x152d, 0x8a36)
7941 },
7942 {
7943 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7944 0x152d, 0x8a37)
7945 },
7946 {
7947 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7948 0x193d, 0x1104)
7949 },
7950 {
7951 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7952 0x193d, 0x1105)
7953 },
7954 {
7955 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7956 0x193d, 0x1106)
7957 },
7958 {
7959 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7960 0x193d, 0x1107)
7961 },
7962 {
7963 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7964 0x193d, 0x8460)
7965 },
7966 {
7967 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7968 0x193d, 0x8461)
7969 },
7970 {
7971 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7972 0x193d, 0xc460)
7973 },
7974 {
7975 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7976 0x193d, 0xc461)
7977 },
7978 {
7979 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7980 0x193d, 0xf460)
7981 },
7982 {
7983 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7984 0x193d, 0xf461)
7985 },
7986 {
7987 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7988 0x1bd4, 0x0045)
7989 },
7990 {
7991 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7992 0x1bd4, 0x0046)
7993 },
7994 {
7995 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
7996 0x1bd4, 0x0047)
7997 },
7998 {
7999 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8000 0x1bd4, 0x0048)
8001 },
8002 {
8003 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8004 0x1bd4, 0x004a)
8005 },
8006 {
8007 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8008 0x1bd4, 0x004b)
8009 },
8010 {
8011 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8012 0x1bd4, 0x004c)
8013 },
8014 {
8015 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8016 0x19e5, 0xd227)
8017 },
8018 {
8019 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8020 0x19e5, 0xd228)
8021 },
8022 {
8023 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8024 0x19e5, 0xd229)
8025 },
8026 {
8027 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8028 0x19e5, 0xd22a)
8029 },
8030 {
8031 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8032 0x19e5, 0xd22b)
8033 },
8034 {
8035 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8036 0x19e5, 0xd22c)
8037 },
8038 {
8039 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8040 PCI_VENDOR_ID_ADAPTEC2, 0x0110)
8041 },
8042 {
8043 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8044 PCI_VENDOR_ID_ADAPTEC2, 0x0608)
8045 },
8046 {
8047 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8048 PCI_VENDOR_ID_ADAPTEC2, 0x0800)
8049 },
8050 {
8051 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8052 PCI_VENDOR_ID_ADAPTEC2, 0x0801)
8053 },
8054 {
8055 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8056 PCI_VENDOR_ID_ADAPTEC2, 0x0802)
8057 },
8058 {
8059 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8060 PCI_VENDOR_ID_ADAPTEC2, 0x0803)
8061 },
8062 {
8063 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8064 PCI_VENDOR_ID_ADAPTEC2, 0x0804)
8065 },
8066 {
8067 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8068 PCI_VENDOR_ID_ADAPTEC2, 0x0805)
8069 },
8070 {
8071 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8072 PCI_VENDOR_ID_ADAPTEC2, 0x0806)
8073 },
8074 {
8075 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8076 PCI_VENDOR_ID_ADAPTEC2, 0x0807)
8077 },
8078 {
8079 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8080 PCI_VENDOR_ID_ADAPTEC2, 0x0900)
8081 },
8082 {
8083 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8084 PCI_VENDOR_ID_ADAPTEC2, 0x0901)
8085 },
8086 {
8087 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8088 PCI_VENDOR_ID_ADAPTEC2, 0x0902)
8089 },
8090 {
8091 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8092 PCI_VENDOR_ID_ADAPTEC2, 0x0903)
8093 },
8094 {
8095 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8096 PCI_VENDOR_ID_ADAPTEC2, 0x0904)
8097 },
8098 {
8099 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8100 PCI_VENDOR_ID_ADAPTEC2, 0x0905)
8101 },
8102 {
8103 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8104 PCI_VENDOR_ID_ADAPTEC2, 0x0906)
8105 },
8106 {
8107 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8108 PCI_VENDOR_ID_ADAPTEC2, 0x0907)
8109 },
8110 {
8111 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8112 PCI_VENDOR_ID_ADAPTEC2, 0x0908)
8113 },
8114 {
8115 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8116 PCI_VENDOR_ID_ADAPTEC2, 0x090a)
8117 },
8118 {
8119 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8120 PCI_VENDOR_ID_ADAPTEC2, 0x1200)
8121 },
8122 {
8123 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8124 PCI_VENDOR_ID_ADAPTEC2, 0x1201)
8125 },
8126 {
8127 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8128 PCI_VENDOR_ID_ADAPTEC2, 0x1202)
8129 },
8130 {
8131 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8132 PCI_VENDOR_ID_ADAPTEC2, 0x1280)
8133 },
8134 {
8135 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8136 PCI_VENDOR_ID_ADAPTEC2, 0x1281)
8137 },
8138 {
8139 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8140 PCI_VENDOR_ID_ADAPTEC2, 0x1282)
8141 },
8142 {
8143 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8144 PCI_VENDOR_ID_ADAPTEC2, 0x1300)
8145 },
8146 {
8147 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8148 PCI_VENDOR_ID_ADAPTEC2, 0x1301)
8149 },
8150 {
8151 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8152 PCI_VENDOR_ID_ADAPTEC2, 0x1302)
8153 },
8154 {
8155 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8156 PCI_VENDOR_ID_ADAPTEC2, 0x1303)
8157 },
8158 {
8159 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8160 PCI_VENDOR_ID_ADAPTEC2, 0x1380)
8161 },
8162 {
8163 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8164 PCI_VENDOR_ID_ADVANTECH, 0x8312)
8165 },
8166 {
8167 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8168 PCI_VENDOR_ID_DELL, 0x1fe0)
8169 },
8170 {
8171 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8172 PCI_VENDOR_ID_HP, 0x0600)
8173 },
8174 {
8175 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8176 PCI_VENDOR_ID_HP, 0x0601)
8177 },
8178 {
8179 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8180 PCI_VENDOR_ID_HP, 0x0602)
8181 },
8182 {
8183 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8184 PCI_VENDOR_ID_HP, 0x0603)
8185 },
8186 {
8187 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8188 PCI_VENDOR_ID_HP, 0x0609)
8189 },
8190 {
8191 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8192 PCI_VENDOR_ID_HP, 0x0650)
8193 },
8194 {
8195 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8196 PCI_VENDOR_ID_HP, 0x0651)
8197 },
8198 {
8199 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8200 PCI_VENDOR_ID_HP, 0x0652)
8201 },
8202 {
8203 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8204 PCI_VENDOR_ID_HP, 0x0653)
8205 },
8206 {
8207 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8208 PCI_VENDOR_ID_HP, 0x0654)
8209 },
8210 {
8211 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8212 PCI_VENDOR_ID_HP, 0x0655)
8213 },
8214 {
8215 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8216 PCI_VENDOR_ID_HP, 0x0700)
8217 },
8218 {
8219 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8220 PCI_VENDOR_ID_HP, 0x0701)
8221 },
8222 {
8223 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8224 PCI_VENDOR_ID_HP, 0x1001)
8225 },
8226 {
8227 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8228 PCI_VENDOR_ID_HP, 0x1100)
8229 },
8230 {
8231 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8232 PCI_VENDOR_ID_HP, 0x1101)
8233 },
8234 {
8235 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8236 PCI_ANY_ID, PCI_ANY_ID)
8237 },
8238 { 0 }
8239 };
8240
8241 MODULE_DEVICE_TABLE(pci, pqi_pci_id_table);
8242
8243 static struct pci_driver pqi_pci_driver = {
8244 .name = DRIVER_NAME_SHORT,
8245 .id_table = pqi_pci_id_table,
8246 .probe = pqi_pci_probe,
8247 .remove = pqi_pci_remove,
8248 .shutdown = pqi_shutdown,
8249 #if defined(CONFIG_PM)
8250 .suspend = pqi_suspend,
8251 .resume = pqi_resume,
8252 #endif
8253 };
8254
8255 static int __init pqi_init(void)
8256 {
8257 int rc;
8258
8259 pr_info(DRIVER_NAME "\n");
8260
8261 pqi_sas_transport_template =
8262 sas_attach_transport(&pqi_sas_transport_functions);
8263 if (!pqi_sas_transport_template)
8264 return -ENODEV;
8265
8266 pqi_process_module_params();
8267
8268 rc = pci_register_driver(&pqi_pci_driver);
8269 if (rc)
8270 sas_release_transport(pqi_sas_transport_template);
8271
8272 return rc;
8273 }
8274
8275 static void __exit pqi_cleanup(void)
8276 {
8277 pci_unregister_driver(&pqi_pci_driver);
8278 sas_release_transport(pqi_sas_transport_template);
8279 }
8280
8281 module_init(pqi_init);
8282 module_exit(pqi_cleanup);
8283
8284 static void __attribute__((unused)) verify_structures(void)
8285 {
8286 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8287 sis_host_to_ctrl_doorbell) != 0x20);
8288 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8289 sis_interrupt_mask) != 0x34);
8290 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8291 sis_ctrl_to_host_doorbell) != 0x9c);
8292 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8293 sis_ctrl_to_host_doorbell_clear) != 0xa0);
8294 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8295 sis_driver_scratch) != 0xb0);
8296 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8297 sis_firmware_status) != 0xbc);
8298 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8299 sis_mailbox) != 0x1000);
8300 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8301 pqi_registers) != 0x4000);
8302
8303 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8304 iu_type) != 0x0);
8305 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8306 iu_length) != 0x2);
8307 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8308 response_queue_id) != 0x4);
8309 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8310 work_area) != 0x6);
8311 BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8);
8312
8313 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8314 status) != 0x0);
8315 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8316 service_response) != 0x1);
8317 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8318 data_present) != 0x2);
8319 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8320 reserved) != 0x3);
8321 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8322 residual_count) != 0x4);
8323 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8324 data_length) != 0x8);
8325 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8326 reserved1) != 0xa);
8327 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8328 data) != 0xc);
8329 BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c);
8330
8331 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8332 data_in_result) != 0x0);
8333 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8334 data_out_result) != 0x1);
8335 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8336 reserved) != 0x2);
8337 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8338 status) != 0x5);
8339 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8340 status_qualifier) != 0x6);
8341 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8342 sense_data_length) != 0x8);
8343 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8344 response_data_length) != 0xa);
8345 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8346 data_in_transferred) != 0xc);
8347 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8348 data_out_transferred) != 0x10);
8349 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8350 data) != 0x14);
8351 BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114);
8352
8353 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8354 signature) != 0x0);
8355 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8356 function_and_status_code) != 0x8);
8357 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8358 max_admin_iq_elements) != 0x10);
8359 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8360 max_admin_oq_elements) != 0x11);
8361 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8362 admin_iq_element_length) != 0x12);
8363 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8364 admin_oq_element_length) != 0x13);
8365 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8366 max_reset_timeout) != 0x14);
8367 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8368 legacy_intx_status) != 0x18);
8369 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8370 legacy_intx_mask_set) != 0x1c);
8371 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8372 legacy_intx_mask_clear) != 0x20);
8373 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8374 device_status) != 0x40);
8375 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8376 admin_iq_pi_offset) != 0x48);
8377 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8378 admin_oq_ci_offset) != 0x50);
8379 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8380 admin_iq_element_array_addr) != 0x58);
8381 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8382 admin_oq_element_array_addr) != 0x60);
8383 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8384 admin_iq_ci_addr) != 0x68);
8385 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8386 admin_oq_pi_addr) != 0x70);
8387 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8388 admin_iq_num_elements) != 0x78);
8389 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8390 admin_oq_num_elements) != 0x79);
8391 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8392 admin_queue_int_msg_num) != 0x7a);
8393 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8394 device_error) != 0x80);
8395 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8396 error_details) != 0x88);
8397 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8398 device_reset) != 0x90);
8399 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8400 power_action) != 0x94);
8401 BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100);
8402
8403 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8404 header.iu_type) != 0);
8405 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8406 header.iu_length) != 2);
8407 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8408 header.work_area) != 6);
8409 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8410 request_id) != 8);
8411 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8412 function_code) != 10);
8413 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8414 data.report_device_capability.buffer_length) != 44);
8415 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8416 data.report_device_capability.sg_descriptor) != 48);
8417 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8418 data.create_operational_iq.queue_id) != 12);
8419 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8420 data.create_operational_iq.element_array_addr) != 16);
8421 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8422 data.create_operational_iq.ci_addr) != 24);
8423 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8424 data.create_operational_iq.num_elements) != 32);
8425 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8426 data.create_operational_iq.element_length) != 34);
8427 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8428 data.create_operational_iq.queue_protocol) != 36);
8429 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8430 data.create_operational_oq.queue_id) != 12);
8431 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8432 data.create_operational_oq.element_array_addr) != 16);
8433 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8434 data.create_operational_oq.pi_addr) != 24);
8435 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8436 data.create_operational_oq.num_elements) != 32);
8437 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8438 data.create_operational_oq.element_length) != 34);
8439 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8440 data.create_operational_oq.queue_protocol) != 36);
8441 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8442 data.create_operational_oq.int_msg_num) != 40);
8443 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8444 data.create_operational_oq.coalescing_count) != 42);
8445 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8446 data.create_operational_oq.min_coalescing_time) != 44);
8447 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8448 data.create_operational_oq.max_coalescing_time) != 48);
8449 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8450 data.delete_operational_queue.queue_id) != 12);
8451 BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64);
8452 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request,
8453 data.create_operational_iq) != 64 - 11);
8454 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request,
8455 data.create_operational_oq) != 64 - 11);
8456 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request,
8457 data.delete_operational_queue) != 64 - 11);
8458
8459 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8460 header.iu_type) != 0);
8461 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8462 header.iu_length) != 2);
8463 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8464 header.work_area) != 6);
8465 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8466 request_id) != 8);
8467 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8468 function_code) != 10);
8469 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8470 status) != 11);
8471 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8472 data.create_operational_iq.status_descriptor) != 12);
8473 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8474 data.create_operational_iq.iq_pi_offset) != 16);
8475 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8476 data.create_operational_oq.status_descriptor) != 12);
8477 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8478 data.create_operational_oq.oq_ci_offset) != 16);
8479 BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64);
8480
8481 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8482 header.iu_type) != 0);
8483 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8484 header.iu_length) != 2);
8485 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8486 header.response_queue_id) != 4);
8487 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8488 header.work_area) != 6);
8489 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8490 request_id) != 8);
8491 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8492 nexus_id) != 10);
8493 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8494 buffer_length) != 12);
8495 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8496 lun_number) != 16);
8497 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8498 protocol_specific) != 24);
8499 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8500 error_index) != 27);
8501 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8502 cdb) != 32);
8503 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8504 sg_descriptors) != 64);
8505 BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) !=
8506 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
8507
8508 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8509 header.iu_type) != 0);
8510 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8511 header.iu_length) != 2);
8512 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8513 header.response_queue_id) != 4);
8514 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8515 header.work_area) != 6);
8516 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8517 request_id) != 8);
8518 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8519 nexus_id) != 12);
8520 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8521 buffer_length) != 16);
8522 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8523 data_encryption_key_index) != 22);
8524 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8525 encrypt_tweak_lower) != 24);
8526 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8527 encrypt_tweak_upper) != 28);
8528 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8529 cdb) != 32);
8530 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8531 error_index) != 48);
8532 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8533 num_sg_descriptors) != 50);
8534 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8535 cdb_length) != 51);
8536 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8537 lun_number) != 52);
8538 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8539 sg_descriptors) != 64);
8540 BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) !=
8541 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
8542
8543 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8544 header.iu_type) != 0);
8545 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8546 header.iu_length) != 2);
8547 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8548 request_id) != 8);
8549 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8550 error_index) != 10);
8551
8552 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8553 header.iu_type) != 0);
8554 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8555 header.iu_length) != 2);
8556 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8557 header.response_queue_id) != 4);
8558 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8559 request_id) != 8);
8560 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8561 data.report_event_configuration.buffer_length) != 12);
8562 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8563 data.report_event_configuration.sg_descriptors) != 16);
8564 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8565 data.set_event_configuration.global_event_oq_id) != 10);
8566 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8567 data.set_event_configuration.buffer_length) != 12);
8568 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8569 data.set_event_configuration.sg_descriptors) != 16);
8570
8571 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
8572 max_inbound_iu_length) != 6);
8573 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
8574 max_outbound_iu_length) != 14);
8575 BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16);
8576
8577 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8578 data_length) != 0);
8579 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8580 iq_arbitration_priority_support_bitmask) != 8);
8581 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8582 maximum_aw_a) != 9);
8583 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8584 maximum_aw_b) != 10);
8585 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8586 maximum_aw_c) != 11);
8587 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8588 max_inbound_queues) != 16);
8589 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8590 max_elements_per_iq) != 18);
8591 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8592 max_iq_element_length) != 24);
8593 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8594 min_iq_element_length) != 26);
8595 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8596 max_outbound_queues) != 30);
8597 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8598 max_elements_per_oq) != 32);
8599 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8600 intr_coalescing_time_granularity) != 34);
8601 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8602 max_oq_element_length) != 36);
8603 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8604 min_oq_element_length) != 38);
8605 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8606 iu_layer_descriptors) != 64);
8607 BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576);
8608
8609 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
8610 event_type) != 0);
8611 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
8612 oq_id) != 2);
8613 BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4);
8614
8615 BUILD_BUG_ON(offsetof(struct pqi_event_config,
8616 num_event_descriptors) != 2);
8617 BUILD_BUG_ON(offsetof(struct pqi_event_config,
8618 descriptors) != 4);
8619
8620 BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS !=
8621 ARRAY_SIZE(pqi_supported_event_types));
8622
8623 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8624 header.iu_type) != 0);
8625 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8626 header.iu_length) != 2);
8627 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8628 event_type) != 8);
8629 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8630 event_id) != 10);
8631 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8632 additional_event_id) != 12);
8633 BUILD_BUG_ON(offsetof(struct pqi_event_response,
8634 data) != 16);
8635 BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32);
8636
8637 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
8638 header.iu_type) != 0);
8639 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
8640 header.iu_length) != 2);
8641 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
8642 event_type) != 8);
8643 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
8644 event_id) != 10);
8645 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
8646 additional_event_id) != 12);
8647 BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16);
8648
8649 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8650 header.iu_type) != 0);
8651 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8652 header.iu_length) != 2);
8653 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8654 request_id) != 8);
8655 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8656 nexus_id) != 10);
8657 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8658 lun_number) != 16);
8659 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8660 protocol_specific) != 24);
8661 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8662 outbound_queue_id_to_manage) != 26);
8663 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8664 request_id_to_manage) != 28);
8665 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
8666 task_management_function) != 30);
8667 BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32);
8668
8669 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8670 header.iu_type) != 0);
8671 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8672 header.iu_length) != 2);
8673 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8674 request_id) != 8);
8675 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8676 nexus_id) != 10);
8677 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8678 additional_response_info) != 12);
8679 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
8680 response_code) != 15);
8681 BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16);
8682
8683 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8684 configured_logical_drive_count) != 0);
8685 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8686 configuration_signature) != 1);
8687 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8688 firmware_version) != 5);
8689 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8690 extended_logical_unit_count) != 154);
8691 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8692 firmware_build_number) != 190);
8693 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
8694 controller_mode) != 292);
8695
8696 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8697 phys_bay_in_box) != 115);
8698 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8699 device_type) != 120);
8700 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8701 redundant_path_present_map) != 1736);
8702 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8703 active_path_number) != 1738);
8704 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8705 alternate_paths_phys_connector) != 1739);
8706 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8707 alternate_paths_phys_box_on_port) != 1755);
8708 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
8709 current_queue_depth_limit) != 1796);
8710 BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560);
8711
8712 BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255);
8713 BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255);
8714 BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH %
8715 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
8716 BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH %
8717 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
8718 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560);
8719 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH %
8720 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
8721 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560);
8722 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH %
8723 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
8724
8725 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS);
8726 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >=
8727 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP);
8728 }
Linux with added FPC-III support