drivers/net/cxgb3/cxgb3_ctl_defs.h

   1 /*
   2  * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #ifndef _CXGB3_OFFLOAD_CTL_DEFS_H
  33 #define _CXGB3_OFFLOAD_CTL_DEFS_H
  34
  35 enum {
  36         GET_MAX_OUTSTANDING_WR  = 0,
  37         GET_TX_MAX_CHUNK        = 1,
  38         GET_TID_RANGE           = 2,
  39         GET_STID_RANGE          = 3,
  40         GET_RTBL_RANGE          = 4,
  41         GET_L2T_CAPACITY        = 5,
  42         GET_MTUS                = 6,
  43         GET_WR_LEN              = 7,
  44         GET_IFF_FROM_MAC        = 8,
  45         GET_DDP_PARAMS          = 9,
  46         GET_PORTS               = 10,
  47
  48         ULP_ISCSI_GET_PARAMS    = 11,
  49         ULP_ISCSI_SET_PARAMS    = 12,
  50
  51         RDMA_GET_PARAMS         = 13,
  52         RDMA_CQ_OP              = 14,
  53         RDMA_CQ_SETUP           = 15,
  54         RDMA_CQ_DISABLE         = 16,
  55         RDMA_CTRL_QP_SETUP      = 17,
  56         RDMA_GET_MEM            = 18,
  57
  58         GET_RX_PAGE_INFO        = 50,
  59 };
  60
  61 /*
  62  * Structure used to describe a TID range.  Valid TIDs are [base, base+num).
  63  */
  64 struct tid_range {
  65         unsigned int base;      /* first TID */
  66         unsigned int num;       /* number of TIDs in range */
  67 };
  68
  69 /*
  70  * Structure used to request the size and contents of the MTU table.
  71  */
  72 struct mtutab {
  73         unsigned int size;      /* # of entries in the MTU table */
  74         const unsigned short *mtus;     /* the MTU table values */
  75 };
  76
  77 struct net_device;
  78
  79 /*
  80  * Structure used to request the adapter net_device owning a given MAC address.
  81  */
  82 struct iff_mac {
  83         struct net_device *dev; /* the net_device */
  84         const unsigned char *mac_addr;  /* MAC address to lookup */
  85         u16 vlan_tag;
  86 };
  87
  88 struct pci_dev;
  89
  90 /*
  91  * Structure used to request the TCP DDP parameters.
  92  */
  93 struct ddp_params {
  94         unsigned int llimit;    /* TDDP region start address */
  95         unsigned int ulimit;    /* TDDP region end address */
  96         unsigned int tag_mask;  /* TDDP tag mask */
  97         struct pci_dev *pdev;
  98 };
  99
 100 struct adap_ports {
 101         unsigned int nports;    /* number of ports on this adapter */
 102         struct net_device *lldevs[2];
 103 };
 104
 105 /*
 106  * Structure used to return information to the iscsi layer.
 107  */
 108 struct ulp_iscsi_info {
 109         unsigned int offset;
 110         unsigned int llimit;
 111         unsigned int ulimit;
 112         unsigned int tagmask;
 113         unsigned int pgsz3;
 114         unsigned int pgsz2;
 115         unsigned int pgsz1;
 116         unsigned int pgsz0;
 117         unsigned int max_rxsz;
 118         unsigned int max_txsz;
 119         struct pci_dev *pdev;
 120 };
 121
 122 /*
 123  * Structure used to return information to the RDMA layer.
 124  */
 125 struct rdma_info {
 126         unsigned int tpt_base;  /* TPT base address */
 127         unsigned int tpt_top;   /* TPT last entry address */
 128         unsigned int pbl_base;  /* PBL base address */
 129         unsigned int pbl_top;   /* PBL last entry address */
 130         unsigned int rqt_base;  /* RQT base address */
 131         unsigned int rqt_top;   /* RQT last entry address */
 132         unsigned int udbell_len;        /* user doorbell region length */
 133         unsigned long udbell_physbase;  /* user doorbell physical start addr */
 134         void __iomem *kdb_addr; /* kernel doorbell register address */
 135         struct pci_dev *pdev;   /* associated PCI device */
 136 };
 137
 138 /*
 139  * Structure used to request an operation on an RDMA completion queue.
 140  */
 141 struct rdma_cq_op {
 142         unsigned int id;
 143         unsigned int op;
 144         unsigned int credits;
 145 };
 146
 147 /*
 148  * Structure used to setup RDMA completion queues.
 149  */
 150 struct rdma_cq_setup {
 151         unsigned int id;
 152         unsigned long long base_addr;
 153         unsigned int size;
 154         unsigned int credits;
 155         unsigned int credit_thres;
 156         unsigned int ovfl_mode;
 157 };
 158
 159 /*
 160  * Structure used to setup the RDMA control egress context.
 161  */
 162 struct rdma_ctrlqp_setup {
 163         unsigned long long base_addr;
 164         unsigned int size;
 165 };
 166
 167 /*
 168  * Offload TX/RX page information.
 169  */
 170 struct ofld_page_info {
 171         unsigned int page_size;  /* Page size, should be a power of 2 */
 172         unsigned int num;        /* Number of pages */
 173 };
 174 #endif                          /* _CXGB3_OFFLOAD_CTL_DEFS_H */