KVM: SVM: clean up nestec vmload/vmsave paths
[linux/fpc-iii.git] / arch / blackfin / mach-bf537 / boards / minotaur.c
blob399f81da7b933f5a189a3aef59e4f4ece80f7d5c
1 /*
2 */
4 #include <linux/device.h>
5 #include <linux/platform_device.h>
6 #include <linux/mtd/mtd.h>
7 #include <linux/mtd/partitions.h>
8 #include <linux/spi/spi.h>
9 #include <linux/spi/flash.h>
10 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
11 #include <linux/usb/isp1362.h>
12 #endif
13 #include <linux/ata_platform.h>
14 #include <linux/irq.h>
15 #include <linux/interrupt.h>
16 #include <linux/usb/sl811.h>
17 #include <asm/dma.h>
18 #include <asm/bfin5xx_spi.h>
19 #include <asm/reboot.h>
20 #include <linux/spi/ad7877.h>
23 * Name the Board for the /proc/cpuinfo
25 char *bfin_board_name = "CamSig Minotaur BF537";
27 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
28 static struct resource bfin_pcmcia_cf_resources[] = {
30 .start = 0x20310000, /* IO PORT */
31 .end = 0x20312000,
32 .flags = IORESOURCE_MEM,
33 }, {
34 .start = 0x20311000, /* Attribute Memory */
35 .end = 0x20311FFF,
36 .flags = IORESOURCE_MEM,
37 }, {
38 .start = IRQ_PF4,
39 .end = IRQ_PF4,
40 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
41 }, {
42 .start = IRQ_PF6, /* Card Detect PF6 */
43 .end = IRQ_PF6,
44 .flags = IORESOURCE_IRQ,
48 static struct platform_device bfin_pcmcia_cf_device = {
49 .name = "bfin_cf_pcmcia",
50 .id = -1,
51 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
52 .resource = bfin_pcmcia_cf_resources,
54 #endif
56 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
57 static struct platform_device rtc_device = {
58 .name = "rtc-bfin",
59 .id = -1,
61 #endif
63 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
64 static struct platform_device bfin_mii_bus = {
65 .name = "bfin_mii_bus",
68 static struct platform_device bfin_mac_device = {
69 .name = "bfin_mac",
70 .dev.platform_data = &bfin_mii_bus,
72 #endif
74 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
75 static struct resource net2272_bfin_resources[] = {
77 .start = 0x20300000,
78 .end = 0x20300000 + 0x100,
79 .flags = IORESOURCE_MEM,
80 }, {
81 .start = IRQ_PF7,
82 .end = IRQ_PF7,
83 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
87 static struct platform_device net2272_bfin_device = {
88 .name = "net2272",
89 .id = -1,
90 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
91 .resource = net2272_bfin_resources,
93 #endif
95 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
96 /* all SPI peripherals info goes here */
98 #if defined(CONFIG_MTD_M25P80) \
99 || defined(CONFIG_MTD_M25P80_MODULE)
101 /* Partition sizes */
102 #define FLASH_SIZE 0x00400000
103 #define PSIZE_UBOOT 0x00030000
104 #define PSIZE_INITRAMFS 0x00240000
106 static struct mtd_partition bfin_spi_flash_partitions[] = {
108 .name = "bootloader(spi)",
109 .size = PSIZE_UBOOT,
110 .offset = 0x000000,
111 .mask_flags = MTD_CAP_ROM
112 }, {
113 .name = "initramfs(spi)",
114 .size = PSIZE_INITRAMFS,
115 .offset = PSIZE_UBOOT
116 }, {
117 .name = "opt(spi)",
118 .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
119 .offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
123 static struct flash_platform_data bfin_spi_flash_data = {
124 .name = "m25p80",
125 .parts = bfin_spi_flash_partitions,
126 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
127 .type = "m25p64",
130 /* SPI flash chip (m25p64) */
131 static struct bfin5xx_spi_chip spi_flash_chip_info = {
132 .enable_dma = 0, /* use dma transfer with this chip*/
133 .bits_per_word = 8,
135 #endif
137 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
138 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
139 .enable_dma = 0,
140 .bits_per_word = 8,
142 #endif
144 static struct spi_board_info bfin_spi_board_info[] __initdata = {
145 #if defined(CONFIG_MTD_M25P80) \
146 || defined(CONFIG_MTD_M25P80_MODULE)
148 /* the modalias must be the same as spi device driver name */
149 .modalias = "m25p80", /* Name of spi_driver for this device */
150 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
151 .bus_num = 0, /* Framework bus number */
152 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
153 .platform_data = &bfin_spi_flash_data,
154 .controller_data = &spi_flash_chip_info,
155 .mode = SPI_MODE_3,
157 #endif
159 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
161 .modalias = "mmc_spi",
162 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
163 .bus_num = 0,
164 .chip_select = 5,
165 .controller_data = &mmc_spi_chip_info,
166 .mode = SPI_MODE_3,
168 #endif
171 /* SPI controller data */
172 static struct bfin5xx_spi_master bfin_spi0_info = {
173 .num_chipselect = 8,
174 .enable_dma = 1, /* master has the ability to do dma transfer */
177 /* SPI (0) */
178 static struct resource bfin_spi0_resource[] = {
179 [0] = {
180 .start = SPI0_REGBASE,
181 .end = SPI0_REGBASE + 0xFF,
182 .flags = IORESOURCE_MEM,
184 [1] = {
185 .start = CH_SPI,
186 .end = CH_SPI,
187 .flags = IORESOURCE_DMA,
189 [2] = {
190 .start = IRQ_SPI,
191 .end = IRQ_SPI,
192 .flags = IORESOURCE_IRQ,
196 static struct platform_device bfin_spi0_device = {
197 .name = "bfin-spi",
198 .id = 0, /* Bus number */
199 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
200 .resource = bfin_spi0_resource,
201 .dev = {
202 .platform_data = &bfin_spi0_info, /* Passed to driver */
205 #endif /* spi master and devices */
207 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
208 static struct resource bfin_uart_resources[] = {
210 .start = 0xFFC00400,
211 .end = 0xFFC004FF,
212 .flags = IORESOURCE_MEM,
213 }, {
214 .start = 0xFFC02000,
215 .end = 0xFFC020FF,
216 .flags = IORESOURCE_MEM,
220 static struct platform_device bfin_uart_device = {
221 .name = "bfin-uart",
222 .id = 1,
223 .num_resources = ARRAY_SIZE(bfin_uart_resources),
224 .resource = bfin_uart_resources,
226 #endif
228 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
229 #ifdef CONFIG_BFIN_SIR0
230 static struct resource bfin_sir0_resources[] = {
232 .start = 0xFFC00400,
233 .end = 0xFFC004FF,
234 .flags = IORESOURCE_MEM,
237 .start = IRQ_UART0_RX,
238 .end = IRQ_UART0_RX+1,
239 .flags = IORESOURCE_IRQ,
242 .start = CH_UART0_RX,
243 .end = CH_UART0_RX+1,
244 .flags = IORESOURCE_DMA,
248 static struct platform_device bfin_sir0_device = {
249 .name = "bfin_sir",
250 .id = 0,
251 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
252 .resource = bfin_sir0_resources,
254 #endif
255 #ifdef CONFIG_BFIN_SIR1
256 static struct resource bfin_sir1_resources[] = {
258 .start = 0xFFC02000,
259 .end = 0xFFC020FF,
260 .flags = IORESOURCE_MEM,
263 .start = IRQ_UART1_RX,
264 .end = IRQ_UART1_RX+1,
265 .flags = IORESOURCE_IRQ,
268 .start = CH_UART1_RX,
269 .end = CH_UART1_RX+1,
270 .flags = IORESOURCE_DMA,
274 static struct platform_device bfin_sir1_device = {
275 .name = "bfin_sir",
276 .id = 1,
277 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
278 .resource = bfin_sir1_resources,
280 #endif
281 #endif
283 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
284 static struct resource bfin_twi0_resource[] = {
285 [0] = {
286 .start = TWI0_REGBASE,
287 .end = TWI0_REGBASE + 0xFF,
288 .flags = IORESOURCE_MEM,
290 [1] = {
291 .start = IRQ_TWI,
292 .end = IRQ_TWI,
293 .flags = IORESOURCE_IRQ,
297 static struct platform_device i2c_bfin_twi_device = {
298 .name = "i2c-bfin-twi",
299 .id = 0,
300 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
301 .resource = bfin_twi0_resource,
303 #endif
305 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
306 static struct platform_device bfin_sport0_uart_device = {
307 .name = "bfin-sport-uart",
308 .id = 0,
311 static struct platform_device bfin_sport1_uart_device = {
312 .name = "bfin-sport-uart",
313 .id = 1,
315 #endif
317 static struct platform_device *minotaur_devices[] __initdata = {
318 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
319 &bfin_pcmcia_cf_device,
320 #endif
322 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
323 &rtc_device,
324 #endif
326 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
327 &bfin_mii_bus,
328 &bfin_mac_device,
329 #endif
331 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
332 &net2272_bfin_device,
333 #endif
335 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
336 &bfin_spi0_device,
337 #endif
339 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
340 &bfin_uart_device,
341 #endif
343 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
344 #ifdef CONFIG_BFIN_SIR0
345 &bfin_sir0_device,
346 #endif
347 #ifdef CONFIG_BFIN_SIR1
348 &bfin_sir1_device,
349 #endif
350 #endif
352 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
353 &i2c_bfin_twi_device,
354 #endif
356 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
357 &bfin_sport0_uart_device,
358 &bfin_sport1_uart_device,
359 #endif
363 static int __init minotaur_init(void)
365 printk(KERN_INFO "%s(): registering device resources\n", __func__);
366 platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
367 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
368 spi_register_board_info(bfin_spi_board_info,
369 ARRAY_SIZE(bfin_spi_board_info));
370 #endif
372 return 0;
375 arch_initcall(minotaur_init);
377 void native_machine_restart(char *cmd)
379 /* workaround reboot hang when booting from SPI */
380 if ((bfin_read_SYSCR() & 0x7) == 0x3)
381 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);