Linux 4.1.16
[linux/fpc-iii.git] / drivers / clk / bcm / clk-kona-setup.c
blobe5aededdd3221cf34313228767eb72e755215b72
1 /*
2 * Copyright (C) 2013 Broadcom Corporation
3 * Copyright 2013 Linaro Limited
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation version 2.
9 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
10 * kind, whether express or implied; without even the implied warranty
11 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/io.h>
16 #include <linux/of_address.h>
18 #include "clk-kona.h"
20 /* These are used when a selector or trigger is found to be unneeded */
21 #define selector_clear_exists(sel) ((sel)->width = 0)
22 #define trigger_clear_exists(trig) FLAG_CLEAR(trig, TRIG, EXISTS)
24 LIST_HEAD(ccu_list); /* The list of set up CCUs */
26 /* Validity checking */
28 static bool ccu_data_offsets_valid(struct ccu_data *ccu)
30 struct ccu_policy *ccu_policy = &ccu->policy;
31 u32 limit;
33 limit = ccu->range - sizeof(u32);
34 limit = round_down(limit, sizeof(u32));
35 if (ccu_policy_exists(ccu_policy)) {
36 if (ccu_policy->enable.offset > limit) {
37 pr_err("%s: bad policy enable offset for %s "
38 "(%u > %u)\n", __func__,
39 ccu->name, ccu_policy->enable.offset, limit);
40 return false;
42 if (ccu_policy->control.offset > limit) {
43 pr_err("%s: bad policy control offset for %s "
44 "(%u > %u)\n", __func__,
45 ccu->name, ccu_policy->control.offset, limit);
46 return false;
50 return true;
53 static bool clk_requires_trigger(struct kona_clk *bcm_clk)
55 struct peri_clk_data *peri = bcm_clk->u.peri;
56 struct bcm_clk_sel *sel;
57 struct bcm_clk_div *div;
59 if (bcm_clk->type != bcm_clk_peri)
60 return false;
62 sel = &peri->sel;
63 if (sel->parent_count && selector_exists(sel))
64 return true;
66 div = &peri->div;
67 if (!divider_exists(div))
68 return false;
70 /* Fixed dividers don't need triggers */
71 if (!divider_is_fixed(div))
72 return true;
74 div = &peri->pre_div;
76 return divider_exists(div) && !divider_is_fixed(div);
79 static bool peri_clk_data_offsets_valid(struct kona_clk *bcm_clk)
81 struct peri_clk_data *peri;
82 struct bcm_clk_policy *policy;
83 struct bcm_clk_gate *gate;
84 struct bcm_clk_hyst *hyst;
85 struct bcm_clk_div *div;
86 struct bcm_clk_sel *sel;
87 struct bcm_clk_trig *trig;
88 const char *name;
89 u32 range;
90 u32 limit;
92 BUG_ON(bcm_clk->type != bcm_clk_peri);
93 peri = bcm_clk->u.peri;
94 name = bcm_clk->init_data.name;
95 range = bcm_clk->ccu->range;
97 limit = range - sizeof(u32);
98 limit = round_down(limit, sizeof(u32));
100 policy = &peri->policy;
101 if (policy_exists(policy)) {
102 if (policy->offset > limit) {
103 pr_err("%s: bad policy offset for %s (%u > %u)\n",
104 __func__, name, policy->offset, limit);
105 return false;
109 gate = &peri->gate;
110 hyst = &peri->hyst;
111 if (gate_exists(gate)) {
112 if (gate->offset > limit) {
113 pr_err("%s: bad gate offset for %s (%u > %u)\n",
114 __func__, name, gate->offset, limit);
115 return false;
118 if (hyst_exists(hyst)) {
119 if (hyst->offset > limit) {
120 pr_err("%s: bad hysteresis offset for %s "
121 "(%u > %u)\n", __func__,
122 name, hyst->offset, limit);
123 return false;
126 } else if (hyst_exists(hyst)) {
127 pr_err("%s: hysteresis but no gate for %s\n", __func__, name);
128 return false;
131 div = &peri->div;
132 if (divider_exists(div)) {
133 if (div->u.s.offset > limit) {
134 pr_err("%s: bad divider offset for %s (%u > %u)\n",
135 __func__, name, div->u.s.offset, limit);
136 return false;
140 div = &peri->pre_div;
141 if (divider_exists(div)) {
142 if (div->u.s.offset > limit) {
143 pr_err("%s: bad pre-divider offset for %s "
144 "(%u > %u)\n",
145 __func__, name, div->u.s.offset, limit);
146 return false;
150 sel = &peri->sel;
151 if (selector_exists(sel)) {
152 if (sel->offset > limit) {
153 pr_err("%s: bad selector offset for %s (%u > %u)\n",
154 __func__, name, sel->offset, limit);
155 return false;
159 trig = &peri->trig;
160 if (trigger_exists(trig)) {
161 if (trig->offset > limit) {
162 pr_err("%s: bad trigger offset for %s (%u > %u)\n",
163 __func__, name, trig->offset, limit);
164 return false;
168 trig = &peri->pre_trig;
169 if (trigger_exists(trig)) {
170 if (trig->offset > limit) {
171 pr_err("%s: bad pre-trigger offset for %s (%u > %u)\n",
172 __func__, name, trig->offset, limit);
173 return false;
177 return true;
180 /* A bit position must be less than the number of bits in a 32-bit register. */
181 static bool bit_posn_valid(u32 bit_posn, const char *field_name,
182 const char *clock_name)
184 u32 limit = BITS_PER_BYTE * sizeof(u32) - 1;
186 if (bit_posn > limit) {
187 pr_err("%s: bad %s bit for %s (%u > %u)\n", __func__,
188 field_name, clock_name, bit_posn, limit);
189 return false;
191 return true;
195 * A bitfield must be at least 1 bit wide. Both the low-order and
196 * high-order bits must lie within a 32-bit register. We require
197 * fields to be less than 32 bits wide, mainly because we use
198 * shifting to produce field masks, and shifting a full word width
199 * is not well-defined by the C standard.
201 static bool bitfield_valid(u32 shift, u32 width, const char *field_name,
202 const char *clock_name)
204 u32 limit = BITS_PER_BYTE * sizeof(u32);
206 if (!width) {
207 pr_err("%s: bad %s field width 0 for %s\n", __func__,
208 field_name, clock_name);
209 return false;
211 if (shift + width > limit) {
212 pr_err("%s: bad %s for %s (%u + %u > %u)\n", __func__,
213 field_name, clock_name, shift, width, limit);
214 return false;
216 return true;
219 static bool
220 ccu_policy_valid(struct ccu_policy *ccu_policy, const char *ccu_name)
222 struct bcm_lvm_en *enable = &ccu_policy->enable;
223 struct bcm_policy_ctl *control;
225 if (!bit_posn_valid(enable->bit, "policy enable", ccu_name))
226 return false;
228 control = &ccu_policy->control;
229 if (!bit_posn_valid(control->go_bit, "policy control GO", ccu_name))
230 return false;
232 if (!bit_posn_valid(control->atl_bit, "policy control ATL", ccu_name))
233 return false;
235 if (!bit_posn_valid(control->ac_bit, "policy control AC", ccu_name))
236 return false;
238 return true;
241 static bool policy_valid(struct bcm_clk_policy *policy, const char *clock_name)
243 if (!bit_posn_valid(policy->bit, "policy", clock_name))
244 return false;
246 return true;
250 * All gates, if defined, have a status bit, and for hardware-only
251 * gates, that's it. Gates that can be software controlled also
252 * have an enable bit. And a gate that can be hardware or software
253 * controlled will have a hardware/software select bit.
255 static bool gate_valid(struct bcm_clk_gate *gate, const char *field_name,
256 const char *clock_name)
258 if (!bit_posn_valid(gate->status_bit, "gate status", clock_name))
259 return false;
261 if (gate_is_sw_controllable(gate)) {
262 if (!bit_posn_valid(gate->en_bit, "gate enable", clock_name))
263 return false;
265 if (gate_is_hw_controllable(gate)) {
266 if (!bit_posn_valid(gate->hw_sw_sel_bit,
267 "gate hw/sw select",
268 clock_name))
269 return false;
271 } else {
272 BUG_ON(!gate_is_hw_controllable(gate));
275 return true;
278 static bool hyst_valid(struct bcm_clk_hyst *hyst, const char *clock_name)
280 if (!bit_posn_valid(hyst->en_bit, "hysteresis enable", clock_name))
281 return false;
283 if (!bit_posn_valid(hyst->val_bit, "hysteresis value", clock_name))
284 return false;
286 return true;
290 * A selector bitfield must be valid. Its parent_sel array must
291 * also be reasonable for the field.
293 static bool sel_valid(struct bcm_clk_sel *sel, const char *field_name,
294 const char *clock_name)
296 if (!bitfield_valid(sel->shift, sel->width, field_name, clock_name))
297 return false;
299 if (sel->parent_count) {
300 u32 max_sel;
301 u32 limit;
304 * Make sure the selector field can hold all the
305 * selector values we expect to be able to use. A
306 * clock only needs to have a selector defined if it
307 * has more than one parent. And in that case the
308 * highest selector value will be in the last entry
309 * in the array.
311 max_sel = sel->parent_sel[sel->parent_count - 1];
312 limit = (1 << sel->width) - 1;
313 if (max_sel > limit) {
314 pr_err("%s: bad selector for %s "
315 "(%u needs > %u bits)\n",
316 __func__, clock_name, max_sel,
317 sel->width);
318 return false;
320 } else {
321 pr_warn("%s: ignoring selector for %s (no parents)\n",
322 __func__, clock_name);
323 selector_clear_exists(sel);
324 kfree(sel->parent_sel);
325 sel->parent_sel = NULL;
328 return true;
332 * A fixed divider just needs to be non-zero. A variable divider
333 * has to have a valid divider bitfield, and if it has a fraction,
334 * the width of the fraction must not be no more than the width of
335 * the divider as a whole.
337 static bool div_valid(struct bcm_clk_div *div, const char *field_name,
338 const char *clock_name)
340 if (divider_is_fixed(div)) {
341 /* Any fixed divider value but 0 is OK */
342 if (div->u.fixed == 0) {
343 pr_err("%s: bad %s fixed value 0 for %s\n", __func__,
344 field_name, clock_name);
345 return false;
347 return true;
349 if (!bitfield_valid(div->u.s.shift, div->u.s.width,
350 field_name, clock_name))
351 return false;
353 if (divider_has_fraction(div))
354 if (div->u.s.frac_width > div->u.s.width) {
355 pr_warn("%s: bad %s fraction width for %s (%u > %u)\n",
356 __func__, field_name, clock_name,
357 div->u.s.frac_width, div->u.s.width);
358 return false;
361 return true;
365 * If a clock has two dividers, the combined number of fractional
366 * bits must be representable in a 32-bit unsigned value. This
367 * is because we scale up a dividend using both dividers before
368 * dividing to improve accuracy, and we need to avoid overflow.
370 static bool kona_dividers_valid(struct kona_clk *bcm_clk)
372 struct peri_clk_data *peri = bcm_clk->u.peri;
373 struct bcm_clk_div *div;
374 struct bcm_clk_div *pre_div;
375 u32 limit;
377 BUG_ON(bcm_clk->type != bcm_clk_peri);
379 if (!divider_exists(&peri->div) || !divider_exists(&peri->pre_div))
380 return true;
382 div = &peri->div;
383 pre_div = &peri->pre_div;
384 if (divider_is_fixed(div) || divider_is_fixed(pre_div))
385 return true;
387 limit = BITS_PER_BYTE * sizeof(u32);
389 return div->u.s.frac_width + pre_div->u.s.frac_width <= limit;
393 /* A trigger just needs to represent a valid bit position */
394 static bool trig_valid(struct bcm_clk_trig *trig, const char *field_name,
395 const char *clock_name)
397 return bit_posn_valid(trig->bit, field_name, clock_name);
400 /* Determine whether the set of peripheral clock registers are valid. */
401 static bool
402 peri_clk_data_valid(struct kona_clk *bcm_clk)
404 struct peri_clk_data *peri;
405 struct bcm_clk_policy *policy;
406 struct bcm_clk_gate *gate;
407 struct bcm_clk_hyst *hyst;
408 struct bcm_clk_sel *sel;
409 struct bcm_clk_div *div;
410 struct bcm_clk_div *pre_div;
411 struct bcm_clk_trig *trig;
412 const char *name;
414 BUG_ON(bcm_clk->type != bcm_clk_peri);
417 * First validate register offsets. This is the only place
418 * where we need something from the ccu, so we do these
419 * together.
421 if (!peri_clk_data_offsets_valid(bcm_clk))
422 return false;
424 peri = bcm_clk->u.peri;
425 name = bcm_clk->init_data.name;
427 policy = &peri->policy;
428 if (policy_exists(policy) && !policy_valid(policy, name))
429 return false;
431 gate = &peri->gate;
432 if (gate_exists(gate) && !gate_valid(gate, "gate", name))
433 return false;
435 hyst = &peri->hyst;
436 if (hyst_exists(hyst) && !hyst_valid(hyst, name))
437 return false;
439 sel = &peri->sel;
440 if (selector_exists(sel)) {
441 if (!sel_valid(sel, "selector", name))
442 return false;
444 } else if (sel->parent_count > 1) {
445 pr_err("%s: multiple parents but no selector for %s\n",
446 __func__, name);
448 return false;
451 div = &peri->div;
452 pre_div = &peri->pre_div;
453 if (divider_exists(div)) {
454 if (!div_valid(div, "divider", name))
455 return false;
457 if (divider_exists(pre_div))
458 if (!div_valid(pre_div, "pre-divider", name))
459 return false;
460 } else if (divider_exists(pre_div)) {
461 pr_err("%s: pre-divider but no divider for %s\n", __func__,
462 name);
463 return false;
466 trig = &peri->trig;
467 if (trigger_exists(trig)) {
468 if (!trig_valid(trig, "trigger", name))
469 return false;
471 if (trigger_exists(&peri->pre_trig)) {
472 if (!trig_valid(trig, "pre-trigger", name)) {
473 return false;
476 if (!clk_requires_trigger(bcm_clk)) {
477 pr_warn("%s: ignoring trigger for %s (not needed)\n",
478 __func__, name);
479 trigger_clear_exists(trig);
481 } else if (trigger_exists(&peri->pre_trig)) {
482 pr_err("%s: pre-trigger but no trigger for %s\n", __func__,
483 name);
484 return false;
485 } else if (clk_requires_trigger(bcm_clk)) {
486 pr_err("%s: required trigger missing for %s\n", __func__,
487 name);
488 return false;
491 return kona_dividers_valid(bcm_clk);
494 static bool kona_clk_valid(struct kona_clk *bcm_clk)
496 switch (bcm_clk->type) {
497 case bcm_clk_peri:
498 if (!peri_clk_data_valid(bcm_clk))
499 return false;
500 break;
501 default:
502 pr_err("%s: unrecognized clock type (%d)\n", __func__,
503 (int)bcm_clk->type);
504 return false;
506 return true;
510 * Scan an array of parent clock names to determine whether there
511 * are any entries containing BAD_CLK_NAME. Such entries are
512 * placeholders for non-supported clocks. Keep track of the
513 * position of each clock name in the original array.
515 * Allocates an array of pointers to to hold the names of all
516 * non-null entries in the original array, and returns a pointer to
517 * that array in *names. This will be used for registering the
518 * clock with the common clock code. On successful return,
519 * *count indicates how many entries are in that names array.
521 * If there is more than one entry in the resulting names array,
522 * another array is allocated to record the parent selector value
523 * for each (defined) parent clock. This is the value that
524 * represents this parent clock in the clock's source selector
525 * register. The position of the clock in the original parent array
526 * defines that selector value. The number of entries in this array
527 * is the same as the number of entries in the parent names array.
529 * The array of selector values is returned. If the clock has no
530 * parents, no selector is required and a null pointer is returned.
532 * Returns a null pointer if the clock names array supplied was
533 * null. (This is not an error.)
535 * Returns a pointer-coded error if an error occurs.
537 static u32 *parent_process(const char *clocks[],
538 u32 *count, const char ***names)
540 static const char **parent_names;
541 static u32 *parent_sel;
542 const char **clock;
543 u32 parent_count;
544 u32 bad_count = 0;
545 u32 orig_count;
546 u32 i;
547 u32 j;
549 *count = 0; /* In case of early return */
550 *names = NULL;
551 if (!clocks)
552 return NULL;
555 * Count the number of names in the null-terminated array,
556 * and find out how many of those are actually clock names.
558 for (clock = clocks; *clock; clock++)
559 if (*clock == BAD_CLK_NAME)
560 bad_count++;
561 orig_count = (u32)(clock - clocks);
562 parent_count = orig_count - bad_count;
564 /* If all clocks are unsupported, we treat it as no clock */
565 if (!parent_count)
566 return NULL;
568 /* Avoid exceeding our parent clock limit */
569 if (parent_count > PARENT_COUNT_MAX) {
570 pr_err("%s: too many parents (%u > %u)\n", __func__,
571 parent_count, PARENT_COUNT_MAX);
572 return ERR_PTR(-EINVAL);
576 * There is one parent name for each defined parent clock.
577 * We also maintain an array containing the selector value
578 * for each defined clock. If there's only one clock, the
579 * selector is not required, but we allocate space for the
580 * array anyway to keep things simple.
582 parent_names = kmalloc(parent_count * sizeof(parent_names), GFP_KERNEL);
583 if (!parent_names) {
584 pr_err("%s: error allocating %u parent names\n", __func__,
585 parent_count);
586 return ERR_PTR(-ENOMEM);
589 /* There is at least one parent, so allocate a selector array */
591 parent_sel = kmalloc(parent_count * sizeof(*parent_sel), GFP_KERNEL);
592 if (!parent_sel) {
593 pr_err("%s: error allocating %u parent selectors\n", __func__,
594 parent_count);
595 kfree(parent_names);
597 return ERR_PTR(-ENOMEM);
600 /* Now fill in the parent names and selector arrays */
601 for (i = 0, j = 0; i < orig_count; i++) {
602 if (clocks[i] != BAD_CLK_NAME) {
603 parent_names[j] = clocks[i];
604 parent_sel[j] = i;
605 j++;
608 *names = parent_names;
609 *count = parent_count;
611 return parent_sel;
614 static int
615 clk_sel_setup(const char **clocks, struct bcm_clk_sel *sel,
616 struct clk_init_data *init_data)
618 const char **parent_names = NULL;
619 u32 parent_count = 0;
620 u32 *parent_sel;
623 * If a peripheral clock has multiple parents, the value
624 * used by the hardware to select that parent is represented
625 * by the parent clock's position in the "clocks" list. Some
626 * values don't have defined or supported clocks; these will
627 * have BAD_CLK_NAME entries in the parents[] array. The
628 * list is terminated by a NULL entry.
630 * We need to supply (only) the names of defined parent
631 * clocks when registering a clock though, so we use an
632 * array of parent selector values to map between the
633 * indexes the common clock code uses and the selector
634 * values we need.
636 parent_sel = parent_process(clocks, &parent_count, &parent_names);
637 if (IS_ERR(parent_sel)) {
638 int ret = PTR_ERR(parent_sel);
640 pr_err("%s: error processing parent clocks for %s (%d)\n",
641 __func__, init_data->name, ret);
643 return ret;
646 init_data->parent_names = parent_names;
647 init_data->num_parents = parent_count;
649 sel->parent_count = parent_count;
650 sel->parent_sel = parent_sel;
652 return 0;
655 static void clk_sel_teardown(struct bcm_clk_sel *sel,
656 struct clk_init_data *init_data)
658 kfree(sel->parent_sel);
659 sel->parent_sel = NULL;
660 sel->parent_count = 0;
662 init_data->num_parents = 0;
663 kfree(init_data->parent_names);
664 init_data->parent_names = NULL;
667 static void peri_clk_teardown(struct peri_clk_data *data,
668 struct clk_init_data *init_data)
670 clk_sel_teardown(&data->sel, init_data);
674 * Caller is responsible for freeing the parent_names[] and
675 * parent_sel[] arrays in the peripheral clock's "data" structure
676 * that can be assigned if the clock has one or more parent clocks
677 * associated with it.
679 static int
680 peri_clk_setup(struct peri_clk_data *data, struct clk_init_data *init_data)
682 init_data->flags = CLK_IGNORE_UNUSED;
684 return clk_sel_setup(data->clocks, &data->sel, init_data);
687 static void bcm_clk_teardown(struct kona_clk *bcm_clk)
689 switch (bcm_clk->type) {
690 case bcm_clk_peri:
691 peri_clk_teardown(bcm_clk->u.data, &bcm_clk->init_data);
692 break;
693 default:
694 break;
696 bcm_clk->u.data = NULL;
697 bcm_clk->type = bcm_clk_none;
700 static void kona_clk_teardown(struct clk *clk)
702 struct clk_hw *hw;
703 struct kona_clk *bcm_clk;
705 if (!clk)
706 return;
708 hw = __clk_get_hw(clk);
709 if (!hw) {
710 pr_err("%s: clk %p has null hw pointer\n", __func__, clk);
711 return;
713 clk_unregister(clk);
715 bcm_clk = to_kona_clk(hw);
716 bcm_clk_teardown(bcm_clk);
719 struct clk *kona_clk_setup(struct kona_clk *bcm_clk)
721 struct clk_init_data *init_data = &bcm_clk->init_data;
722 struct clk *clk = NULL;
724 switch (bcm_clk->type) {
725 case bcm_clk_peri:
726 if (peri_clk_setup(bcm_clk->u.data, init_data))
727 return NULL;
728 break;
729 default:
730 pr_err("%s: clock type %d invalid for %s\n", __func__,
731 (int)bcm_clk->type, init_data->name);
732 return NULL;
735 /* Make sure everything makes sense before we set it up */
736 if (!kona_clk_valid(bcm_clk)) {
737 pr_err("%s: clock data invalid for %s\n", __func__,
738 init_data->name);
739 goto out_teardown;
742 bcm_clk->hw.init = init_data;
743 clk = clk_register(NULL, &bcm_clk->hw);
744 if (IS_ERR(clk)) {
745 pr_err("%s: error registering clock %s (%ld)\n", __func__,
746 init_data->name, PTR_ERR(clk));
747 goto out_teardown;
749 BUG_ON(!clk);
751 return clk;
752 out_teardown:
753 bcm_clk_teardown(bcm_clk);
755 return NULL;
758 static void ccu_clks_teardown(struct ccu_data *ccu)
760 u32 i;
762 for (i = 0; i < ccu->clk_data.clk_num; i++)
763 kona_clk_teardown(ccu->clk_data.clks[i]);
764 kfree(ccu->clk_data.clks);
767 static void kona_ccu_teardown(struct ccu_data *ccu)
769 kfree(ccu->clk_data.clks);
770 ccu->clk_data.clks = NULL;
771 if (!ccu->base)
772 return;
774 of_clk_del_provider(ccu->node); /* safe if never added */
775 ccu_clks_teardown(ccu);
776 list_del(&ccu->links);
777 of_node_put(ccu->node);
778 ccu->node = NULL;
779 iounmap(ccu->base);
780 ccu->base = NULL;
783 static bool ccu_data_valid(struct ccu_data *ccu)
785 struct ccu_policy *ccu_policy;
787 if (!ccu_data_offsets_valid(ccu))
788 return false;
790 ccu_policy = &ccu->policy;
791 if (ccu_policy_exists(ccu_policy))
792 if (!ccu_policy_valid(ccu_policy, ccu->name))
793 return false;
795 return true;
799 * Set up a CCU. Call the provided ccu_clks_setup callback to
800 * initialize the array of clocks provided by the CCU.
802 void __init kona_dt_ccu_setup(struct ccu_data *ccu,
803 struct device_node *node)
805 struct resource res = { 0 };
806 resource_size_t range;
807 unsigned int i;
808 int ret;
810 if (ccu->clk_data.clk_num) {
811 size_t size;
813 size = ccu->clk_data.clk_num * sizeof(*ccu->clk_data.clks);
814 ccu->clk_data.clks = kzalloc(size, GFP_KERNEL);
815 if (!ccu->clk_data.clks) {
816 pr_err("%s: unable to allocate %u clocks for %s\n",
817 __func__, ccu->clk_data.clk_num, node->name);
818 return;
822 ret = of_address_to_resource(node, 0, &res);
823 if (ret) {
824 pr_err("%s: no valid CCU registers found for %s\n", __func__,
825 node->name);
826 goto out_err;
829 range = resource_size(&res);
830 if (range > (resource_size_t)U32_MAX) {
831 pr_err("%s: address range too large for %s\n", __func__,
832 node->name);
833 goto out_err;
836 ccu->range = (u32)range;
838 if (!ccu_data_valid(ccu)) {
839 pr_err("%s: ccu data not valid for %s\n", __func__, node->name);
840 goto out_err;
843 ccu->base = ioremap(res.start, ccu->range);
844 if (!ccu->base) {
845 pr_err("%s: unable to map CCU registers for %s\n", __func__,
846 node->name);
847 goto out_err;
849 ccu->node = of_node_get(node);
850 list_add_tail(&ccu->links, &ccu_list);
853 * Set up each defined kona clock and save the result in
854 * the clock framework clock array (in ccu->data). Then
855 * register as a provider for these clocks.
857 for (i = 0; i < ccu->clk_data.clk_num; i++) {
858 if (!ccu->kona_clks[i].ccu)
859 continue;
860 ccu->clk_data.clks[i] = kona_clk_setup(&ccu->kona_clks[i]);
863 ret = of_clk_add_provider(node, of_clk_src_onecell_get, &ccu->clk_data);
864 if (ret) {
865 pr_err("%s: error adding ccu %s as provider (%d)\n", __func__,
866 node->name, ret);
867 goto out_err;
870 if (!kona_ccu_init(ccu))
871 pr_err("Broadcom %s initialization had errors\n", node->name);
873 return;
874 out_err:
875 kona_ccu_teardown(ccu);
876 pr_err("Broadcom %s setup aborted\n", node->name);