Linux 4.1.16
[linux/fpc-iii.git] / drivers / edac / highbank_l2_edac.c
blob2f193668ebc75b7a75d4eb9ceebaa5f89a1eaba8
1 /*
2 * Copyright 2011-2012 Calxeda, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
16 #include <linux/types.h>
17 #include <linux/kernel.h>
18 #include <linux/ctype.h>
19 #include <linux/edac.h>
20 #include <linux/interrupt.h>
21 #include <linux/platform_device.h>
22 #include <linux/of_platform.h>
24 #include "edac_core.h"
25 #include "edac_module.h"
27 #define SR_CLR_SB_ECC_INTR 0x0
28 #define SR_CLR_DB_ECC_INTR 0x4
30 struct hb_l2_drvdata {
31 void __iomem *base;
32 int sb_irq;
33 int db_irq;
36 static irqreturn_t highbank_l2_err_handler(int irq, void *dev_id)
38 struct edac_device_ctl_info *dci = dev_id;
39 struct hb_l2_drvdata *drvdata = dci->pvt_info;
41 if (irq == drvdata->sb_irq) {
42 writel(1, drvdata->base + SR_CLR_SB_ECC_INTR);
43 edac_device_handle_ce(dci, 0, 0, dci->ctl_name);
45 if (irq == drvdata->db_irq) {
46 writel(1, drvdata->base + SR_CLR_DB_ECC_INTR);
47 edac_device_handle_ue(dci, 0, 0, dci->ctl_name);
50 return IRQ_HANDLED;
53 static const struct of_device_id hb_l2_err_of_match[] = {
54 { .compatible = "calxeda,hb-sregs-l2-ecc", },
55 {},
57 MODULE_DEVICE_TABLE(of, hb_l2_err_of_match);
59 static int highbank_l2_err_probe(struct platform_device *pdev)
61 const struct of_device_id *id;
62 struct edac_device_ctl_info *dci;
63 struct hb_l2_drvdata *drvdata;
64 struct resource *r;
65 int res = 0;
67 dci = edac_device_alloc_ctl_info(sizeof(*drvdata), "cpu",
68 1, "L", 1, 2, NULL, 0, 0);
69 if (!dci)
70 return -ENOMEM;
72 drvdata = dci->pvt_info;
73 dci->dev = &pdev->dev;
74 platform_set_drvdata(pdev, dci);
76 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
77 return -ENOMEM;
79 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
80 if (!r) {
81 dev_err(&pdev->dev, "Unable to get mem resource\n");
82 res = -ENODEV;
83 goto err;
86 if (!devm_request_mem_region(&pdev->dev, r->start,
87 resource_size(r), dev_name(&pdev->dev))) {
88 dev_err(&pdev->dev, "Error while requesting mem region\n");
89 res = -EBUSY;
90 goto err;
93 drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
94 if (!drvdata->base) {
95 dev_err(&pdev->dev, "Unable to map regs\n");
96 res = -ENOMEM;
97 goto err;
100 id = of_match_device(hb_l2_err_of_match, &pdev->dev);
101 dci->mod_name = pdev->dev.driver->name;
102 dci->ctl_name = id ? id->compatible : "unknown";
103 dci->dev_name = dev_name(&pdev->dev);
105 if (edac_device_add_device(dci))
106 goto err;
108 drvdata->db_irq = platform_get_irq(pdev, 0);
109 res = devm_request_irq(&pdev->dev, drvdata->db_irq,
110 highbank_l2_err_handler,
111 0, dev_name(&pdev->dev), dci);
112 if (res < 0)
113 goto err2;
115 drvdata->sb_irq = platform_get_irq(pdev, 1);
116 res = devm_request_irq(&pdev->dev, drvdata->sb_irq,
117 highbank_l2_err_handler,
118 0, dev_name(&pdev->dev), dci);
119 if (res < 0)
120 goto err2;
122 devres_close_group(&pdev->dev, NULL);
123 return 0;
124 err2:
125 edac_device_del_device(&pdev->dev);
126 err:
127 devres_release_group(&pdev->dev, NULL);
128 edac_device_free_ctl_info(dci);
129 return res;
132 static int highbank_l2_err_remove(struct platform_device *pdev)
134 struct edac_device_ctl_info *dci = platform_get_drvdata(pdev);
136 edac_device_del_device(&pdev->dev);
137 edac_device_free_ctl_info(dci);
138 return 0;
141 static struct platform_driver highbank_l2_edac_driver = {
142 .probe = highbank_l2_err_probe,
143 .remove = highbank_l2_err_remove,
144 .driver = {
145 .name = "hb_l2_edac",
146 .of_match_table = hb_l2_err_of_match,
150 module_platform_driver(highbank_l2_edac_driver);
152 MODULE_LICENSE("GPL v2");
153 MODULE_AUTHOR("Calxeda, Inc.");
154 MODULE_DESCRIPTION("EDAC Driver for Calxeda Highbank L2 Cache");