drivers/gpu/drm/radeon/radeon_agp.c

   1 /*
   2  * Copyright 2008 Red Hat Inc.
   3  * Copyright 2009 Jerome Glisse.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21  * OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Dave Airlie
  25  *    Jerome Glisse <glisse@freedesktop.org>
  26  */
  27 #include <drm/drmP.h>
  28 #include "radeon.h"
  29 #include <drm/radeon_drm.h>
  30
  31 #if __OS_HAS_AGP
  32
  33 struct radeon_agpmode_quirk {
  34         u32 hostbridge_vendor;
  35         u32 hostbridge_device;
  36         u32 chip_vendor;
  37         u32 chip_device;
  38         u32 subsys_vendor;
  39         u32 subsys_device;
  40         u32 default_mode;
  41 };
  42
  43 static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
  44         /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */
  45         { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4},
  46         /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */
  47         { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4},
  48         /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */
  49         { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964,
  50                 0x148c, 0x2073, 4},
  51         /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */
  52         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59,
  53                 PCI_VENDOR_ID_IBM, 0x052f, 1},
  54         /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */
  55         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50,
  56                 PCI_VENDOR_ID_IBM, 0x0550, 1},
  57         /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */
  58         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57,
  59                 PCI_VENDOR_ID_IBM, 0x0530, 1},
  60         /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */
  61         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54,
  62                 PCI_VENDOR_ID_IBM, 0x054f, 2},
  63         /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */
  64         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,
  65                 PCI_VENDOR_ID_SONY, 0x816b, 2},
  66         /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */
  67         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,
  68                 PCI_VENDOR_ID_SONY, 0x8195, 8},
  69         /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/
  70         { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59,
  71                 PCI_VENDOR_ID_DELL, 0x00e3, 2},
  72         /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */
  73         { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66,
  74                 PCI_VENDOR_ID_DELL, 0x0149, 1},
  75         /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */
  76         { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,
  77                 PCI_VENDOR_ID_IBM, 0x0531, 1},
  78         /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */
  79         { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
  80                 0x1025, 0x0061, 1},
  81         /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */
  82         { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
  83                 0x1025, 0x0064, 1},
  84         /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */
  85         { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
  86                 PCI_VENDOR_ID_ASUSTEK, 0x1942, 1},
  87         /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */
  88         { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
  89                 0x10cf, 0x127f, 1},
  90         /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */
  91         { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,
  92                 0x1787, 0x5960, 4},
  93         /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */
  94         { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960,
  95                 0x17af, 0x2020, 4},
  96         /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */
  97         { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153,
  98                 PCI_VENDOR_ID_ASUSTEK, 0x003c, 4},
  99         /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */
 100         { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c,
 101                 PCI_VENDOR_ID_ATI, 0x013a, 2},
 102         /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */
 103         { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,
 104                 PCI_VENDOR_ID_ASUSTEK, 0x004c, 2},
 105         /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */
 106         { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,
 107                 PCI_VENDOR_ID_ASUSTEK, 0x0054, 2},
 108         /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */
 109         { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d,
 110                 0x174b, 0x7149, 4},
 111         /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */
 112         { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,
 113                 0x1462, 0x0380, 4},
 114         /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */
 115         { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964,
 116                 0x148c, 0x2073, 4},
 117         /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */
 118         { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61,
 119                 PCI_VENDOR_ID_SONY, 0x8175, 1},
 120         { 0, 0, 0, 0, 0, 0, 0 },
 121 };
 122 #endif
 123
 124 int radeon_agp_init(struct radeon_device *rdev)
 125 {
 126 #if __OS_HAS_AGP
 127         struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list;
 128         struct drm_agp_mode mode;
 129         struct drm_agp_info info;
 130         uint32_t agp_status;
 131         int default_mode;
 132         bool is_v3;
 133         int ret;
 134
 135         /* Acquire AGP. */
 136         ret = drm_agp_acquire(rdev->ddev);
 137         if (ret) {
 138                 DRM_ERROR("Unable to acquire AGP: %d\n", ret);
 139                 return ret;
 140         }
 141
 142         ret = drm_agp_info(rdev->ddev, &info);
 143         if (ret) {
 144                 drm_agp_release(rdev->ddev);
 145                 DRM_ERROR("Unable to get AGP info: %d\n", ret);
 146                 return ret;
 147         }
 148
 149         if (rdev->ddev->agp->agp_info.aper_size < 32) {
 150                 drm_agp_release(rdev->ddev);
 151                 dev_warn(rdev->dev, "AGP aperture too small (%zuM) "
 152                         "need at least 32M, disabling AGP\n",
 153                         rdev->ddev->agp->agp_info.aper_size);
 154                 return -EINVAL;
 155         }
 156
 157         mode.mode = info.mode;
 158         /* chips with the agp to pcie bridge don't have the AGP_STATUS register
 159          * Just use the whatever mode the host sets up.
 160          */
 161         if (rdev->family <= CHIP_RV350)
 162                 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode;
 163         else
 164                 agp_status = mode.mode;
 165         is_v3 = !!(agp_status & RADEON_AGPv3_MODE);
 166
 167         if (is_v3) {
 168                 default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4;
 169         } else {
 170                 if (agp_status & RADEON_AGP_4X_MODE) {
 171                         default_mode = 4;
 172                 } else if (agp_status & RADEON_AGP_2X_MODE) {
 173                         default_mode = 2;
 174                 } else {
 175                         default_mode = 1;
 176                 }
 177         }
 178
 179         /* Apply AGPMode Quirks */
 180         while (p && p->chip_device != 0) {
 181                 if (info.id_vendor == p->hostbridge_vendor &&
 182                     info.id_device == p->hostbridge_device &&
 183                     rdev->pdev->vendor == p->chip_vendor &&
 184                     rdev->pdev->device == p->chip_device &&
 185                     rdev->pdev->subsystem_vendor == p->subsys_vendor &&
 186                     rdev->pdev->subsystem_device == p->subsys_device) {
 187                         default_mode = p->default_mode;
 188                 }
 189                 ++p;
 190         }
 191
 192         if (radeon_agpmode > 0) {
 193                 if ((radeon_agpmode < (is_v3 ? 4 : 1)) ||
 194                     (radeon_agpmode > (is_v3 ? 8 : 4)) ||
 195                     (radeon_agpmode & (radeon_agpmode - 1))) {
 196                         DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n",
 197                                   radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4",
 198                                   default_mode);
 199                         radeon_agpmode = default_mode;
 200                 } else {
 201                         DRM_INFO("AGP mode requested: %d\n", radeon_agpmode);
 202                 }
 203         } else {
 204                 radeon_agpmode = default_mode;
 205         }
 206
 207         mode.mode &= ~RADEON_AGP_MODE_MASK;
 208         if (is_v3) {
 209                 switch (radeon_agpmode) {
 210                 case 8:
 211                         mode.mode |= RADEON_AGPv3_8X_MODE;
 212                         break;
 213                 case 4:
 214                 default:
 215                         mode.mode |= RADEON_AGPv3_4X_MODE;
 216                         break;
 217                 }
 218         } else {
 219                 switch (radeon_agpmode) {
 220                 case 4:
 221                         mode.mode |= RADEON_AGP_4X_MODE;
 222                         break;
 223                 case 2:
 224                         mode.mode |= RADEON_AGP_2X_MODE;
 225                         break;
 226                 case 1:
 227                 default:
 228                         mode.mode |= RADEON_AGP_1X_MODE;
 229                         break;
 230                 }
 231         }
 232
 233         mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */
 234         ret = drm_agp_enable(rdev->ddev, mode);
 235         if (ret) {
 236                 DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);
 237                 drm_agp_release(rdev->ddev);
 238                 return ret;
 239         }
 240
 241         rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base;
 242         rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20;
 243         rdev->mc.gtt_start = rdev->mc.agp_base;
 244         rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1;
 245         dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n",
 246                 rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end);
 247
 248         /* workaround some hw issues */
 249         if (rdev->family < CHIP_R200) {
 250                 WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000);
 251         }
 252         return 0;
 253 #else
 254         return 0;
 255 #endif
 256 }
 257
 258 void radeon_agp_resume(struct radeon_device *rdev)
 259 {
 260 #if __OS_HAS_AGP
 261         int r;
 262         if (rdev->flags & RADEON_IS_AGP) {
 263                 r = radeon_agp_init(rdev);
 264                 if (r)
 265                         dev_warn(rdev->dev, "radeon AGP reinit failed\n");
 266         }
 267 #endif
 268 }
 269
 270 void radeon_agp_fini(struct radeon_device *rdev)
 271 {
 272 #if __OS_HAS_AGP
 273         if (rdev->ddev->agp && rdev->ddev->agp->acquired) {
 274                 drm_agp_release(rdev->ddev);
 275         }
 276 #endif
 277 }
 278
 279 void radeon_agp_suspend(struct radeon_device *rdev)
 280 {
 281         radeon_agp_fini(rdev);
 282 }