2 * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
3 * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 * This file contains the x86-specific lguest code. It used to be all
22 * mixed in with drivers/lguest/core.c but several foolhardy code slashers
23 * wrestled most of the dependencies out to here in preparation for porting
24 * lguest to other architectures (see what I mean by foolhardy?).
26 * This also contains a couple of non-obvious setup and teardown pieces which
27 * were implemented after days of debugging pain.
29 #include <linux/kernel.h>
30 #include <linux/start_kernel.h>
31 #include <linux/string.h>
32 #include <linux/console.h>
33 #include <linux/screen_info.h>
34 #include <linux/irq.h>
35 #include <linux/interrupt.h>
36 #include <linux/clocksource.h>
37 #include <linux/clockchips.h>
38 #include <linux/cpu.h>
39 #include <linux/lguest.h>
40 #include <linux/lguest_launcher.h>
41 #include <asm/paravirt.h>
42 #include <asm/param.h>
44 #include <asm/pgtable.h>
46 #include <asm/setup.h>
47 #include <asm/lguest.h>
48 #include <asm/uaccess.h>
50 #include <asm/tlbflush.h>
53 static int cpu_had_pge
;
57 unsigned short segment
;
60 /* Offset from where switcher.S was compiled to where we've copied it */
61 static unsigned long switcher_offset(void)
63 return switcher_addr
- (unsigned long)start_switcher_text
;
66 /* This cpu's struct lguest_pages (after the Switcher text page) */
67 static struct lguest_pages
*lguest_pages(unsigned int cpu
)
69 return &(((struct lguest_pages
*)(switcher_addr
+ PAGE_SIZE
))[cpu
]);
72 static DEFINE_PER_CPU(struct lg_cpu
*, lg_last_cpu
);
75 * We approach the Switcher.
77 * Remember that each CPU has two pages which are visible to the Guest when it
78 * runs on that CPU. This has to contain the state for that Guest: we copy the
79 * state in just before we run the Guest.
81 * Each Guest has "changed" flags which indicate what has changed in the Guest
82 * since it last ran. We saw this set in interrupts_and_traps.c and
85 static void copy_in_guest_info(struct lg_cpu
*cpu
, struct lguest_pages
*pages
)
88 * Copying all this data can be quite expensive. We usually run the
89 * same Guest we ran last time (and that Guest hasn't run anywhere else
90 * meanwhile). If that's not the case, we pretend everything in the
93 if (__this_cpu_read(lg_last_cpu
) != cpu
|| cpu
->last_pages
!= pages
) {
94 __this_cpu_write(lg_last_cpu
, cpu
);
95 cpu
->last_pages
= pages
;
96 cpu
->changed
= CHANGED_ALL
;
100 * These copies are pretty cheap, so we do them unconditionally: */
101 /* Save the current Host top-level page directory.
103 pages
->state
.host_cr3
= __pa(current
->mm
->pgd
);
105 * Set up the Guest's page tables to see this CPU's pages (and no
106 * other CPU's pages).
108 map_switcher_in_guest(cpu
, pages
);
110 * Set up the two "TSS" members which tell the CPU what stack to use
111 * for traps which do directly into the Guest (ie. traps at privilege
114 pages
->state
.guest_tss
.sp1
= cpu
->esp1
;
115 pages
->state
.guest_tss
.ss1
= cpu
->ss1
;
117 /* Copy direct-to-Guest trap entries. */
118 if (cpu
->changed
& CHANGED_IDT
)
119 copy_traps(cpu
, pages
->state
.guest_idt
, default_idt_entries
);
121 /* Copy all GDT entries which the Guest can change. */
122 if (cpu
->changed
& CHANGED_GDT
)
123 copy_gdt(cpu
, pages
->state
.guest_gdt
);
124 /* If only the TLS entries have changed, copy them. */
125 else if (cpu
->changed
& CHANGED_GDT_TLS
)
126 copy_gdt_tls(cpu
, pages
->state
.guest_gdt
);
128 /* Mark the Guest as unchanged for next time. */
132 /* Finally: the code to actually call into the Switcher to run the Guest. */
133 static void run_guest_once(struct lg_cpu
*cpu
, struct lguest_pages
*pages
)
135 /* This is a dummy value we need for GCC's sake. */
136 unsigned int clobber
;
139 * Copy the guest-specific information into this CPU's "struct
142 copy_in_guest_info(cpu
, pages
);
145 * Set the trap number to 256 (impossible value). If we fault while
146 * switching to the Guest (bad segment registers or bug), this will
147 * cause us to abort the Guest.
149 cpu
->regs
->trapnum
= 256;
152 * Now: we push the "eflags" register on the stack, then do an "lcall".
153 * This is how we change from using the kernel code segment to using
154 * the dedicated lguest code segment, as well as jumping into the
157 * The lcall also pushes the old code segment (KERNEL_CS) onto the
158 * stack, then the address of this call. This stack layout happens to
159 * exactly match the stack layout created by an interrupt...
161 asm volatile("pushf; lcall *%4"
163 * This is how we tell GCC that %eax ("a") and %ebx ("b")
164 * are changed by this routine. The "=" means output.
166 : "=a"(clobber
), "=b"(clobber
)
168 * %eax contains the pages pointer. ("0" refers to the
169 * 0-th argument above, ie "a"). %ebx contains the
170 * physical address of the Guest's top-level page
174 "1"(__pa(cpu
->lg
->pgdirs
[cpu
->cpu_pgd
].pgdir
)),
177 * We tell gcc that all these registers could change,
178 * which means we don't have to save and restore them in
181 : "memory", "%edx", "%ecx", "%edi", "%esi");
185 unsigned long *lguest_arch_regptr(struct lg_cpu
*cpu
, size_t reg_off
, bool any
)
188 case offsetof(struct pt_regs
, bx
):
189 return &cpu
->regs
->ebx
;
190 case offsetof(struct pt_regs
, cx
):
191 return &cpu
->regs
->ecx
;
192 case offsetof(struct pt_regs
, dx
):
193 return &cpu
->regs
->edx
;
194 case offsetof(struct pt_regs
, si
):
195 return &cpu
->regs
->esi
;
196 case offsetof(struct pt_regs
, di
):
197 return &cpu
->regs
->edi
;
198 case offsetof(struct pt_regs
, bp
):
199 return &cpu
->regs
->ebp
;
200 case offsetof(struct pt_regs
, ax
):
201 return &cpu
->regs
->eax
;
202 case offsetof(struct pt_regs
, ip
):
203 return &cpu
->regs
->eip
;
204 case offsetof(struct pt_regs
, sp
):
205 return &cpu
->regs
->esp
;
208 /* Launcher can read these, but we don't allow any setting. */
211 case offsetof(struct pt_regs
, ds
):
212 return &cpu
->regs
->ds
;
213 case offsetof(struct pt_regs
, es
):
214 return &cpu
->regs
->es
;
215 case offsetof(struct pt_regs
, fs
):
216 return &cpu
->regs
->fs
;
217 case offsetof(struct pt_regs
, gs
):
218 return &cpu
->regs
->gs
;
219 case offsetof(struct pt_regs
, cs
):
220 return &cpu
->regs
->cs
;
221 case offsetof(struct pt_regs
, flags
):
222 return &cpu
->regs
->eflags
;
223 case offsetof(struct pt_regs
, ss
):
224 return &cpu
->regs
->ss
;
232 * There are hooks in the scheduler which we can register to tell when we
233 * get kicked off the CPU (preempt_notifier_register()). This would allow us
234 * to lazily disable SYSENTER which would regain some performance, and should
235 * also simplify copy_in_guest_info(). Note that we'd still need to restore
236 * things when we exit to Launcher userspace, but that's fairly easy.
238 * We could also try using these hooks for PGE, but that might be too expensive.
240 * The hooks were designed for KVM, but we can also put them to good use.
244 * This is the i386-specific code to setup and run the Guest. Interrupts
245 * are disabled: we own the CPU.
247 void lguest_arch_run_guest(struct lg_cpu
*cpu
)
250 * Remember the awfully-named TS bit? If the Guest has asked to set it
251 * we set it now, so we can trap and pass that trap to the Guest if it
254 if (cpu
->ts
&& user_has_fpu())
258 * SYSENTER is an optimized way of doing system calls. We can't allow
259 * it because it always jumps to privilege level 0. A normal Guest
260 * won't try it because we don't advertise it in CPUID, but a malicious
261 * Guest (or malicious Guest userspace program) could, so we tell the
262 * CPU to disable it before running the Guest.
264 if (boot_cpu_has(X86_FEATURE_SEP
))
265 wrmsr(MSR_IA32_SYSENTER_CS
, 0, 0);
268 * Now we actually run the Guest. It will return when something
269 * interesting happens, and we can examine its registers to see what it
272 run_guest_once(cpu
, lguest_pages(raw_smp_processor_id()));
275 * Note that the "regs" structure contains two extra entries which are
276 * not really registers: a trap number which says what interrupt or
277 * trap made the switcher code come back, and an error code which some
281 /* Restore SYSENTER if it's supposed to be on. */
282 if (boot_cpu_has(X86_FEATURE_SEP
))
283 wrmsr(MSR_IA32_SYSENTER_CS
, __KERNEL_CS
, 0);
285 /* Clear the host TS bit if it was set above. */
286 if (cpu
->ts
&& user_has_fpu())
290 * If the Guest page faulted, then the cr2 register will tell us the
291 * bad virtual address. We have to grab this now, because once we
292 * re-enable interrupts an interrupt could fault and thus overwrite
293 * cr2, or we could even move off to a different CPU.
295 if (cpu
->regs
->trapnum
== 14)
296 cpu
->arch
.last_pagefault
= read_cr2();
298 * Similarly, if we took a trap because the Guest used the FPU,
299 * we have to restore the FPU it expects to see.
300 * math_state_restore() may sleep and we may even move off to
301 * a different CPU. So all the critical stuff should be done
304 else if (cpu
->regs
->trapnum
== 7 && !user_has_fpu())
305 math_state_restore();
309 * Now we've examined the hypercall code; our Guest can make requests.
310 * Our Guest is usually so well behaved; it never tries to do things it isn't
311 * allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual
312 * infrastructure isn't quite complete, because it doesn't contain replacements
313 * for the Intel I/O instructions. As a result, the Guest sometimes fumbles
314 * across one during the boot process as it probes for various things which are
315 * usually attached to a PC.
317 * When the Guest uses one of these instructions, we get a trap (General
318 * Protection Fault) and come here. We queue this to be sent out to the
319 * Launcher to handle.
323 * The eip contains the *virtual* address of the Guest's instruction:
324 * we copy the instruction here so the Launcher doesn't have to walk
325 * the page tables to decode it. We handle the case (eg. in a kernel
326 * module) where the instruction is over two pages, and the pages are
327 * virtually but not physically contiguous.
329 * The longest possible x86 instruction is 15 bytes, but we don't handle
330 * anything that strange.
332 static void copy_from_guest(struct lg_cpu
*cpu
,
333 void *dst
, unsigned long vaddr
, size_t len
)
335 size_t to_page_end
= PAGE_SIZE
- (vaddr
% PAGE_SIZE
);
338 BUG_ON(len
> PAGE_SIZE
);
340 /* If it goes over a page, copy in two parts. */
341 if (len
> to_page_end
) {
342 /* But make sure the next page is mapped! */
343 if (__guest_pa(cpu
, vaddr
+ to_page_end
, &paddr
))
344 copy_from_guest(cpu
, dst
+ to_page_end
,
348 /* Otherwise fill with zeroes. */
349 memset(dst
+ to_page_end
, 0, len
- to_page_end
);
353 /* This will kill the guest if it isn't mapped, but that
354 * shouldn't happen. */
355 __lgread(cpu
, dst
, guest_pa(cpu
, vaddr
), len
);
359 static void setup_emulate_insn(struct lg_cpu
*cpu
)
361 cpu
->pending
.trap
= 13;
362 copy_from_guest(cpu
, cpu
->pending
.insn
, cpu
->regs
->eip
,
363 sizeof(cpu
->pending
.insn
));
366 static void setup_iomem_insn(struct lg_cpu
*cpu
, unsigned long iomem_addr
)
368 cpu
->pending
.trap
= 14;
369 cpu
->pending
.addr
= iomem_addr
;
370 copy_from_guest(cpu
, cpu
->pending
.insn
, cpu
->regs
->eip
,
371 sizeof(cpu
->pending
.insn
));
374 /*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
375 void lguest_arch_handle_trap(struct lg_cpu
*cpu
)
377 unsigned long iomem_addr
;
379 switch (cpu
->regs
->trapnum
) {
380 case 13: /* We've intercepted a General Protection Fault. */
381 /* Hand to Launcher to emulate those pesky IN and OUT insns */
382 if (cpu
->regs
->errcode
== 0) {
383 setup_emulate_insn(cpu
);
387 case 14: /* We've intercepted a Page Fault. */
389 * The Guest accessed a virtual address that wasn't mapped.
390 * This happens a lot: we don't actually set up most of the page
391 * tables for the Guest at all when we start: as it runs it asks
392 * for more and more, and we set them up as required. In this
393 * case, we don't even tell the Guest that the fault happened.
395 * The errcode tells whether this was a read or a write, and
396 * whether kernel or userspace code.
398 if (demand_page(cpu
, cpu
->arch
.last_pagefault
,
399 cpu
->regs
->errcode
, &iomem_addr
))
402 /* Was this an access to memory mapped IO? */
404 /* Tell Launcher, let it handle it. */
405 setup_iomem_insn(cpu
, iomem_addr
);
410 * OK, it's really not there (or not OK): the Guest needs to
411 * know. We write out the cr2 value so it knows where the
414 * Note that if the Guest were really messed up, this could
415 * happen before it's done the LHCALL_LGUEST_INIT hypercall, so
416 * lg->lguest_data could be NULL
418 if (cpu
->lg
->lguest_data
&&
419 put_user(cpu
->arch
.last_pagefault
,
420 &cpu
->lg
->lguest_data
->cr2
))
421 kill_guest(cpu
, "Writing cr2");
423 case 7: /* We've intercepted a Device Not Available fault. */
425 * If the Guest doesn't want to know, we already restored the
426 * Floating Point Unit, so we just continue without telling it.
433 * These values mean a real interrupt occurred, in which case
434 * the Host handler has already been run. We just do a
435 * friendly check if another process should now be run, then
436 * return to run the Guest again.
440 case LGUEST_TRAP_ENTRY
:
442 * Our 'struct hcall_args' maps directly over our regs: we set
443 * up the pointer now to indicate a hypercall is pending.
445 cpu
->hcall
= (struct hcall_args
*)cpu
->regs
;
449 /* We didn't handle the trap, so it needs to go to the Guest. */
450 if (!deliver_trap(cpu
, cpu
->regs
->trapnum
))
452 * If the Guest doesn't have a handler (either it hasn't
453 * registered any yet, or it's one of the faults we don't let
454 * it handle), it dies with this cryptic error message.
456 kill_guest(cpu
, "unhandled trap %li at %#lx (%#lx)",
457 cpu
->regs
->trapnum
, cpu
->regs
->eip
,
458 cpu
->regs
->trapnum
== 14 ? cpu
->arch
.last_pagefault
459 : cpu
->regs
->errcode
);
463 * Now we can look at each of the routines this calls, in increasing order of
464 * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
465 * deliver_trap() and demand_page(). After all those, we'll be ready to
466 * examine the Switcher, and our philosophical understanding of the Host/Guest
467 * duality will be complete.
469 static void adjust_pge(void *on
)
472 cr4_set_bits(X86_CR4_PGE
);
474 cr4_clear_bits(X86_CR4_PGE
);
478 * Now the Switcher is mapped and every thing else is ready, we need to do
479 * some more i386-specific initialization.
481 void __init
lguest_arch_host_init(void)
486 * Most of the x86/switcher_32.S doesn't care that it's been moved; on
487 * Intel, jumps are relative, and it doesn't access any references to
488 * external code or data.
490 * The only exception is the interrupt handlers in switcher.S: their
491 * addresses are placed in a table (default_idt_entries), so we need to
492 * update the table with the new addresses. switcher_offset() is a
493 * convenience function which returns the distance between the
494 * compiled-in switcher code and the high-mapped copy we just made.
496 for (i
= 0; i
< IDT_ENTRIES
; i
++)
497 default_idt_entries
[i
] += switcher_offset();
500 * Set up the Switcher's per-cpu areas.
502 * Each CPU gets two pages of its own within the high-mapped region
503 * (aka. "struct lguest_pages"). Much of this can be initialized now,
504 * but some depends on what Guest we are running (which is set up in
505 * copy_in_guest_info()).
507 for_each_possible_cpu(i
) {
508 /* lguest_pages() returns this CPU's two pages. */
509 struct lguest_pages
*pages
= lguest_pages(i
);
510 /* This is a convenience pointer to make the code neater. */
511 struct lguest_ro_state
*state
= &pages
->state
;
514 * The Global Descriptor Table: the Host has a different one
515 * for each CPU. We keep a descriptor for the GDT which says
516 * where it is and how big it is (the size is actually the last
517 * byte, not the size, hence the "-1").
519 state
->host_gdt_desc
.size
= GDT_SIZE
-1;
520 state
->host_gdt_desc
.address
= (long)get_cpu_gdt_table(i
);
523 * All CPUs on the Host use the same Interrupt Descriptor
524 * Table, so we just use store_idt(), which gets this CPU's IDT
527 store_idt(&state
->host_idt_desc
);
530 * The descriptors for the Guest's GDT and IDT can be filled
531 * out now, too. We copy the GDT & IDT into ->guest_gdt and
532 * ->guest_idt before actually running the Guest.
534 state
->guest_idt_desc
.size
= sizeof(state
->guest_idt
)-1;
535 state
->guest_idt_desc
.address
= (long)&state
->guest_idt
;
536 state
->guest_gdt_desc
.size
= sizeof(state
->guest_gdt
)-1;
537 state
->guest_gdt_desc
.address
= (long)&state
->guest_gdt
;
540 * We know where we want the stack to be when the Guest enters
541 * the Switcher: in pages->regs. The stack grows upwards, so
542 * we start it at the end of that structure.
544 state
->guest_tss
.sp0
= (long)(&pages
->regs
+ 1);
546 * And this is the GDT entry to use for the stack: we keep a
547 * couple of special LGUEST entries.
549 state
->guest_tss
.ss0
= LGUEST_DS
;
552 * x86 can have a finegrained bitmap which indicates what I/O
553 * ports the process can use. We set it to the end of our
554 * structure, meaning "none".
556 state
->guest_tss
.io_bitmap_base
= sizeof(state
->guest_tss
);
559 * Some GDT entries are the same across all Guests, so we can
562 setup_default_gdt_entries(state
);
563 /* Most IDT entries are the same for all Guests, too.*/
564 setup_default_idt_entries(state
, default_idt_entries
);
567 * The Host needs to be able to use the LGUEST segments on this
568 * CPU, too, so put them in the Host GDT.
570 get_cpu_gdt_table(i
)[GDT_ENTRY_LGUEST_CS
] = FULL_EXEC_SEGMENT
;
571 get_cpu_gdt_table(i
)[GDT_ENTRY_LGUEST_DS
] = FULL_SEGMENT
;
575 * In the Switcher, we want the %cs segment register to use the
576 * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
577 * it will be undisturbed when we switch. To change %cs and jump we
578 * need this structure to feed to Intel's "lcall" instruction.
580 lguest_entry
.offset
= (long)switch_to_guest
+ switcher_offset();
581 lguest_entry
.segment
= LGUEST_CS
;
584 * Finally, we need to turn off "Page Global Enable". PGE is an
585 * optimization where page table entries are specially marked to show
586 * they never change. The Host kernel marks all the kernel pages this
587 * way because it's always present, even when userspace is running.
589 * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
590 * switch to the Guest kernel. If you don't disable this on all CPUs,
591 * you'll get really weird bugs that you'll chase for two days.
593 * I used to turn PGE off every time we switched to the Guest and back
594 * on when we return, but that slowed the Switcher down noticibly.
598 * We don't need the complexity of CPUs coming and going while we're
602 if (cpu_has_pge
) { /* We have a broader idea of "global". */
603 /* Remember that this was originally set (for cleanup). */
606 * adjust_pge is a helper function which sets or unsets the PGE
607 * bit on its CPU, depending on the argument (0 == unset).
609 on_each_cpu(adjust_pge
, (void *)0, 1);
610 /* Turn off the feature in the global feature set. */
611 clear_cpu_cap(&boot_cpu_data
, X86_FEATURE_PGE
);
617 void __exit
lguest_arch_host_fini(void)
619 /* If we had PGE before we started, turn it back on now. */
622 set_cpu_cap(&boot_cpu_data
, X86_FEATURE_PGE
);
623 /* adjust_pge's argument "1" means set PGE. */
624 on_each_cpu(adjust_pge
, (void *)1, 1);
630 /*H:122 The i386-specific hypercalls simply farm out to the right functions. */
631 int lguest_arch_do_hcall(struct lg_cpu
*cpu
, struct hcall_args
*args
)
633 switch (args
->arg0
) {
634 case LHCALL_LOAD_GDT_ENTRY
:
635 load_guest_gdt_entry(cpu
, args
->arg1
, args
->arg2
, args
->arg3
);
637 case LHCALL_LOAD_IDT_ENTRY
:
638 load_guest_idt_entry(cpu
, args
->arg1
, args
->arg2
, args
->arg3
);
640 case LHCALL_LOAD_TLS
:
641 guest_load_tls(cpu
, args
->arg1
);
644 /* Bad Guest. Bad! */
650 /*H:126 i386-specific hypercall initialization: */
651 int lguest_arch_init_hypercalls(struct lg_cpu
*cpu
)
656 * The pointer to the Guest's "struct lguest_data" is the only argument.
657 * We check that address now.
659 if (!lguest_address_ok(cpu
->lg
, cpu
->hcall
->arg1
,
660 sizeof(*cpu
->lg
->lguest_data
)))
664 * Having checked it, we simply set lg->lguest_data to point straight
665 * into the Launcher's memory at the right place and then use
666 * copy_to_user/from_user from now on, instead of lgread/write. I put
667 * this in to show that I'm not immune to writing stupid
670 cpu
->lg
->lguest_data
= cpu
->lg
->mem_base
+ cpu
->hcall
->arg1
;
673 * We insist that the Time Stamp Counter exist and doesn't change with
674 * cpu frequency. Some devious chip manufacturers decided that TSC
675 * changes could be handled in software. I decided that time going
676 * backwards might be good for benchmarks, but it's bad for users.
678 * We also insist that the TSC be stable: the kernel detects unreliable
679 * TSCs for its own purposes, and we use that here.
681 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC
) && !check_tsc_unstable())
685 if (put_user(tsc_speed
, &cpu
->lg
->lguest_data
->tsc_khz
))
688 /* The interrupt code might not like the system call vector. */
689 if (!check_syscall_vector(cpu
->lg
))
690 kill_guest(cpu
, "bad syscall vector");
697 * Most of the Guest's registers are left alone: we used get_zeroed_page() to
698 * allocate the structure, so they will be 0.
700 void lguest_arch_setup_regs(struct lg_cpu
*cpu
, unsigned long start
)
702 struct lguest_regs
*regs
= cpu
->regs
;
705 * There are four "segment" registers which the Guest needs to boot:
706 * The "code segment" register (cs) refers to the kernel code segment
707 * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
708 * refer to the kernel data segment __KERNEL_DS.
710 * The privilege level is packed into the lower bits. The Guest runs
711 * at privilege level 1 (GUEST_PL).
713 regs
->ds
= regs
->es
= regs
->ss
= __KERNEL_DS
|GUEST_PL
;
714 regs
->cs
= __KERNEL_CS
|GUEST_PL
;
717 * The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
718 * is supposed to always be "1". Bit 9 (0x200) controls whether
719 * interrupts are enabled. We always leave interrupts enabled while
722 regs
->eflags
= X86_EFLAGS_IF
| X86_EFLAGS_FIXED
;
725 * The "Extended Instruction Pointer" register says where the Guest is
731 * %esi points to our boot information, at physical address 0, so don't
735 /* There are a couple of GDT entries the Guest expects at boot. */
736 setup_guest_gdt(cpu
);