2 bool "Mailbox Hardware Support"
4 Mailbox is a framework to control hardware communication between
5 on-chip processors through queued messages and interrupt driven
6 signals. Say Y if your platform supports hardware mailboxes.
11 tristate "ARM MHU Mailbox"
14 Say Y here if you want to build the ARM MHU controller driver.
15 The controller has 3 mailbox channels, the last of which can be
16 used in Secure mode only.
19 bool "ARM PL320 Mailbox"
22 An implementation of the ARM PL320 Interprocessor Communication
23 Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
24 send short messages between Highbank's A9 cores and the EnergyCore
25 Management Engine, primarily for cpufreq. Say Y here if you want
26 to use the PL320 IPCM support.
29 tristate "OMAP2+ Mailbox framework support"
30 depends on ARCH_OMAP2PLUS
32 Mailbox implementation for OMAP family chips with hardware for
33 interprocessor communication involving DSP, IVA1.0 and IVA2 in
34 OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
35 want to use OMAP2+ Mailbox framework support.
37 config OMAP_MBOX_KFIFO_SIZE
38 int "Mailbox kfifo default buffer size (bytes)"
39 depends on OMAP2PLUS_MBOX
42 Specify the default size of mailbox's kfifo buffers (bytes).
43 This can also be changed at runtime (via the mbox_kfifo_size
47 bool "Platform Communication Channel Driver"
50 ACPI 5.0+ spec defines a generic mode of communication
51 between the OS and a platform such as the BMC. This medium
52 (PCC) is typically used by CPPC (ACPI CPU Performance management),
53 RAS (ACPI reliability protocol) and MPST (ACPI Memory power
54 states). Select this driver if your platform implements the
55 PCC clients mentioned above.
58 tristate "Altera Mailbox"
60 An implementation of the Altera Mailbox soft core. It is used
61 to send message between processors. Say Y here if you want to use the
62 Altera mailbox support.